Abstract: A watchdog monitors and terminates applications that have been initiated through a data link between a local unit and a remote unit. A data link session is established between the local and remote units. When the status of the data link indicates that the link has been lost, the watchdog process terminates the applications initiated by the remote unit.

Abstract: Power control circuits that control the power sequencing and ramp rate of voltages applied to integrated circuits are disclosed. In one embodiment, a power control circuit comprises a delay resistor, a delay capacitor and an input transistor. The delay resistor is adapted to be coupled to an input power supply. The delay capacitor is coupled in series with the delay resistor. The input transistor has an emitter that is adapted to be coupled to the input power supply through the delay resister. The input transistor conducts current when a voltage across the delay capacitor rises above a selected voltage threshold of the input transistor. A power source is applied to a load in response to the conduction of the input transistor which is delayed by the time it takes to charge the delay capacitor to the selected voltage threshold.

Abstract: A housing having a shell, a first compartment, and a second compartment within the first compartment is provided. A first cover is pivotally attached to the shell for selectively opening and closing the first compartment. The first cover has a resilient latch biased for grasping the shell and a lead-out for wires. A second cover is pivotally attached to the shell for selectively opening and closing the second compartment. A plurality of pivot connectors is located in the first compartment. Each of the plurality of pivot connectors is oriented to receive a wire in a direction parallel to a plane of the lead-out for wires. A plurality of jacks is also located in the first compartment. Each of the plurality of jacks has at least one resilient conductor. Each of the plurality of jacks is oriented so that the resilient conductor lies in a plane perpendicular to the plane of the lead-out for wires.

Abstract: An apparatus and method are described that allows for improved wander jitter reduction in communication devices and associated communication links, in particular on HDSL communication devices and links. The improved device apparatus and method detects the current data rate offset of the HDSL data rate being utilized and the data rate of the datastream being transmitted through the HDSL communication link and allows for the transmitting HDSL communication device to adjust the HDSL data rate to avoid high wander jitter “sweet spots”. The improved device apparatus and method also allows for the profiling of communication devices for their specific high wander jitter sweet spot maximum points by sweeping the input data rate being transmitted at differing HDSL data rates.

Abstract: A method for controlling fan operation that includes detecting a stopped fan and attempting to start the stopped fan. The method includes attempting to start the stopped fan again after at least one first time interval when the fan does not start. The method includes attempting to start the stopped fan again after at least one second time interval when the fan does not start after a predetermined number of first time intervals, where the at least one second time interval is longer than the first time interval.

Abstract: An apparatus and method are described that allows for improved wander jitter reduction in communication devices and associated communication links, in particular on HDSL communication devices and links. The improved device apparatus and method detects the current data rate offset of the HDSL data rate being utilized and the data rate of the datastream being transmitted through the HDSL communication link and allows for the transmitting HDSL communication device to adjust the HDSL data rate to promote instantaneous data rate offsets that are close to wander jitter minimum points. The improved device apparatus and method also allows for the characterization of communication devices for their specific wander jitter low activity points by sweeping the input data rate being transmitted at differing HDSL data rates.

Abstract: Testing an oscillator and other electronic devices on a circuit board. One method of the present invention comprises powering the oscillator. Providing test instructions to a microprocessor on the circuit board to place the microprocessor in a test mode. Receiving a clock signal from the oscillator at a multiplexer in a field programmable gate array. Receiving operating instructions at the multiplexer from the microprocessor. Multiplexing the clock signal to an external access port with the multiplexer in response to the operating instructions and measuring the frequency of the clock signal at the external access port.

Abstract: A modular fan unit having a frame receivable within a baffle of a chassis for containing electronic components is provided. Each of a pair of brackets is connected to an end of the frame to form a slot for receiving a wall of the baffle. Moreover, each of the pair of brackets is respectively attachable to a pair of walls of a rack containing the chassis. A fan is attached to the frame so as to align with an aperture located between the pair of brackets and passing through the frame. A controller is attached to the frame and is electrically connected to the fan.

Abstract: Apparatus and method for increasing the bandwidth of an optocoupler includes cascode coupling the optocoupler driver transistor with a buffer so as to reduce voltage variations across the driver transistor.

Abstract: A fan control system uses a closed loop system to adjust the actual operating speed of a fan or fans to a desired operating speed. The desired speed and actual speed are compared in a high gain amplifier to generate a control signal to adjust the actual operating speed of the fan given the feedback.

Abstract: A method for correlating an input signal to a signature is provided. The method compares an input stream with a signature element-by-element as the input stream is received. The method restarts the comparison using the first element of the signature when an element in the input stream does not match the compared element in the signature and declares correlation when consecutive elements in the input stream match corresponding elements of the entire signature.

Abstract: A junction field effect transistor (JFET), acting as a switch, is coupled between the source and gate of a metal oxide semiconductor field effect transistor (MOSFET). A capacitor is connected in parallel with the MOSFET's “Miller capacitance” by being coupled between the gate and drain of the MOSFET in series with a current limiting resistor. When the JFET is on, it has a low impedance with zero gate voltage and forces the gate to source voltage of the MOSFET to remain near zero and, thus, the MOSFET in a high impedance state, until the capacitor charges to the supply voltage.

Abstract: An apparatus and method is described that allows for improved transmission of EOC data over the EOC channels of communication devices and links, reducing the number of dropped EOC packets and increasing the bandwidth and robustness of the EOC channel. The improved device apparatus and method also allows for the reduction of the overhead of EOC channel error detection and correction on the limited resources of the communication device by aborting a corrupted or blocked EOC packet transmission and automatically resending. The improved device apparatus and method additionally allows the reduction of dropped EOC data packets due to corrupted transmission and the resultant miscommunication and corruption of high-level applications of the communication device, such as operation commands, remote configuration and management programs, and operation displays.

Abstract: An electronic module having a circuit card with a power supply is provided. The electronic module has two independent battery-return paths. One of the two independent battery-return paths is connectable to a battery-return side of a primary battery, and another of the two independent battery-return paths is connectable to a battery-return side of a secondary battery that replaces the primary battery when the primary battery fails. The two independent battery-return paths are connected together at a battery-return pin of the power supply.

Abstract: A user identification is input to a system. The system uses the user identification to select a set of default alarm severity levels. An indication of the selected set of default alarm severity levels is stored in memory. When a predetermined condition occurs in one of the system's function cards, the alarm that is generated is based on the selected default alarm severity level.

Abstract: A method for testing a digital loop carrier is provided. The method includes initiating at least one test with a test request, communicating the test request to a remote terminal of the digital loop carrier over a digital communication channel, conducting the at least one test at the remote terminal and reporting the results of the at least one test over the digital communication channel.

Abstract: Testing of analog-to-digital and digital-to-analog converters formed in integrated circuits. In one embodiment, a method of testing an analog-to-digital (A/D) converter comprises applying an analog test signal of a first frequency to an input of the A/D converter. Sampling digital byte samples from an output of the A/D converter at a second sampling frequency and comparing select digital byte samples with each other. When the select digital byte samples match, storing a verify bit in a memory to verify the A/D converter is working. In another embodiment, a method of testing a digital-to-analog (D/A) comprises creating repeating digital byte samples with a logic circuit formed in the integrated circuit. Converting the repeating digital byte samples into an analog test signal with the D/A converter. Comparing the frequency of the analog test signal with the frequency of an expected analog signal to determine if the D/A converter is working.

Abstract: A low cost differential voltage limiter circuit provides a feedback to regulate a voltage output of a voltage source. In one embodiment, the limiter circuit includes a transistor coupled to outputs of first and second voltage sources. If a differential voltage between the two sources exceeds a predetermined threshold, the output voltage of the higher source is reduced. In one embodiment, a PNP transistor is used to regulate the high voltage source.

Abstract: A housing for a plurality of electronic circuit cards is provided. The housing includes a shell and a single door adapted to selectively close the shell. The housing has a first shelf having opposing first and second edges in frictional engagement with the shell to thermally couple the first shelf to the shell. Moreover, the housing has a second shelf having opposing first and second edges directly contacting the shell to thermally couple the second shelf to the shell. The first and second shelves define a space therebetween for containing the plurality of electronic circuit cards. A backplane is disposed within the shell. The second shelf is removably attached to the shell to enable the backplane to be installed or removed via the single door.

Abstract: A housing for circuit cards is provided. The housing has a shell. A thermally conductive liner integral with the shell lines an interior of the shell. A protrusion of the liner extends through the shell and contacts the shell to form a pressure seal between the liner and the shell. A heat sink is disposed on an exterior surface of the shell and is thermally coupled to the protrusion of the liner. A case is disposed within the liner and is thermally coupled to the liner. The case is adapted to receive a plurality of circuit cards so that the plurality of circuit cards is thermally coupled to the case.