Abstract: A method for testing a digital loop carrier is provided. The method includes initiating at least one test with a test request, communicating the test request to a remote terminal of the digital loop carrier over a digital communication channel, conducting the at least one test at the remote terminal and reporting the results of the at least one test over the digital communication channel.

Abstract: An electronic module having a circuit card with a power supply is provided. The electronic module has two independent battery-return paths. One of the two independent battery-return paths is connectable to a battery-return side of a primary battery, and another of the two independent battery-return paths is connectable to a battery-return side of a secondary battery that replaces the primary battery when the primary battery fails. The two independent battery-return paths are connected together at a battery-return pin of the power supply.

Abstract: Testing of analog-to-digital and digital-to-analog converters formed in integrated circuits. In one embodiment, a method of testing an analog-to-digital (A/D) converter comprises applying an analog test signal of a first frequency to an input of the A/D converter. Sampling digital byte samples from an output of the A/D converter at a second sampling frequency and comparing select digital byte samples with each other. When the select digital byte samples match, storing a verify bit in a memory to verify the A/D converter is working. In another embodiment, a method of testing a digital-to-analog (D/A) comprises creating repeating digital byte samples with a logic circuit formed in the integrated circuit. Converting the repeating digital byte samples into an analog test signal with the D/A converter. Comparing the frequency of the analog test signal with the frequency of an expected analog signal to determine if the D/A converter is working.

Abstract: A low cost differential voltage limiter circuit provides a feedback to regulate a voltage output of a voltage source. In one embodiment, the limiter circuit includes a transistor coupled to outputs of first and second voltage sources. If a differential voltage between the two sources exceeds a predetermined threshold, the output voltage of the higher source is reduced. In one embodiment, a PNP transistor is used to regulate the high voltage source.

Abstract: A housing for a plurality of electronic circuit cards is provided. The housing includes a shell and a single door adapted to selectively close the shell. The housing has a first shelf having opposing first and second edges in frictional engagement with the shell to thermally couple the first shelf to the shell. Moreover, the housing has a second shelf having opposing first and second edges directly contacting the shell to thermally couple the second shelf to the shell. The first and second shelves define a space therebetween for containing the plurality of electronic circuit cards. A backplane is disposed within the shell. The second shelf is removably attached to the shell to enable the backplane to be installed or removed via the single door.

Abstract: A method for processing cells at a user-network interface with automatic identification of virtual circuit identifiers and a testing function is provided. The method includes distinguishing the source of the cell. When the cell is from a first source, the method tests the cell against at least one selected criteria. When at least one test determines the cell is invalid, the cell is marked. When the tests determine that the cell is valid, the method translates a virtual circuit identifier to a default setting and forwards the cell to a queue for further processing.

Abstract: A housing for circuit cards is provided. The housing has a shell. A thermally conductive liner integral with the shell lines an interior of the shell. A protrusion of the liner extends through the shell and contacts the shell to form a pressure seal between the liner and the shell. A heat sink is disposed on an exterior surface of the shell and is thermally coupled to the protrusion of the liner. A case is disposed within the liner and is thermally coupled to the liner. The case is adapted to receive a plurality of circuit cards so that the plurality of circuit cards is thermally coupled to the case.

Abstract: A system uses a resource locking token to allow various processes to have exclusive access to a system resource. The process that receives the token then requests that a local database be updated/synchronized with a master database. The process continues checking the synchronization status every time it gets the token. When the process receives the token and the synchronization is complete, the local database is accessed and the data is used in accessing the system resource. The token is then returned to the system.

Abstract: A communication system includes a local unit that has a lower data link layer and a session layer running a data pass-through application and a user interface. The data pass-through application lets the data link layer in the local unit pass data through to a remote unit. The remote unit has a lower data link layer and a session layer executing a user interface. When the data link layer detects that the session layer is unstable and/or locked up, the data link layer transmits a disconnect request to the local unit's data link layer. All further user data sent to the local unit's data link layer is routed to the local unit's user interface.

Abstract: A housing for a plurality of electronic circuit cards is provided. The housing includes a shell and a single door adapted to selectively close the shell. The housing has a first shelf having opposing first and second edges in frictional engagement with the shell to thermally couple the first shelf to the shell. Moreover, the housing has a second shelf having opposing first and second edges directly contacting the shell to thermally couple the second shelf to the shell. The first and second shelves define a space therebetween for containing the plurality of electronic circuit cards. A backplane is disposed within the shell. The second shelf is removably attached to the shell to enable the backplane to be installed or removed via the single door.

Abstract: A system and method for extending a simple network management protocol (SNMP), or other IP network management messaging protocol to one or more non-IP addressed nodes includes a gateway agent addressable by an IP address, at least one non-IP addressed agent to receive and respond to network management messages; and a process for routing network management messages to and from one or more one non-IP addressed agents based on a unique identifier contained in the message.

Abstract: Multiple local databases are coupled to a master database. The master database includes a number of data objects to be synchronized with the local databases. The state of the objects stored in the local databases is initially set to a pending state. A request is made to synchronize the local database with the master database. The state of the last object to be synchronized is periodically read. Read access to the local database is blocked until the last object indicates that it has been synchronized.

Abstract: A method and system for performing simultaneous tests and avoiding task collisions using a hardware description language includes designating a timeslot for one or more of the simultaneous tests, associating the designated timeslot with one or more of the tasks to be performed in a test, determining if the designated timeslot is available before executing the tasks associated with timeslots and executing the tasks when the designated timeslots become available.

Abstract: A pulse width modulation controller is coupled to a feedback voltage that is proportional to the power supply output voltage. The controller adjusts a current sense threshold in the controller in response to the feedback voltage. An offset voltage is generated for a predetermined time after the power-up of the power supply. A sum of the offset voltage and a primary current sense node voltage is applied to a current sense input of the controller. The controller generates a switch control signal in response to the sum voltage being less than the current sense threshold. The duty cycle of an output control switch is changed by the switch control signal thus adjusting the output voltage ramp.

Abstract: A system for managing power from a power source for at least one line powered network element in an access network is provided. The system includes a power manager that establishes at least one power criterion for the at least one network element. Further, the system includes a power controller that is responsive to the power manager. The power controller and the power manager communicate to manage operation of the at least one network element based on the at least one power criterion.

Abstract: A device to audibly verify the activation of a solid state relay. The device includes an audio output device that is coupled to the solid state relay to produce a sound when the solid state relay is activated. The sound produced by the audio output devices emulates the sound of an electromechanical relay when switched.

Abstract: A method of operating a processing device is provided. The method includes defining an effective memory address space with a cached address space and a non-cached address space wherein the cached address space and the non-cached address space each translate to overlap a single physical memory space. Further, the method includes accessing a memory address of the physical memory space without accessing a cache memory system from the non-cached effective address space. The method also includes accessing a memory address of the physical memory space from the cached effective address space with the benefit of the cache memory system.

Abstract: Methods for bit-level control of dynamic bandwidth allocation are adapted for use in multi-node channelized transport systems. A single status bit is used to indicate the desired allocation status of each transport channel for which dynamic allocation is permitted or desired. The status bit has a first logic level indicative of a desire to have a first allocation status, such as allocated for data traffic, and a second logic level indicative of a desire to have a second allocation status, such as allocated for voice traffic. The status bit may be repeated multiple times within a frame to mitigate the effects of transmission errors. The values of the status bit or bits can be maintained across node boundaries without regard to the framing mechanisms or multiplexing techniques used by the transport system, thus permitting dynamic bandwidth allocation beyond the local loop.

Abstract: An integrated plain old telephone service (POTS) and metallic loop testing (MLT) card provides lifeline telephone service with multiple channel data service. The integrated card can be piggybacked with an ADSL card to provide a single package of POTS, MLT, and ADSL services.

Abstract: A circuit card that includes a single ground plane connectable to a chassis-ground and a logic device having a ground pin connected to the single ground plane. The connection between the ground pin and the single ground plane provides a direct path between the logic device and the chassis-ground. A power supply is connected to an input pin of the logic device for providing a logic voltage to the logic device. The power supply is connectable to a battery.