Patents Assigned to ADC DSL Systems, Inc.
  • Patent number: 6704393
    Abstract: A conditioner unit is wired in parallel with a pair gain test controller used to test a digital loop carrier telephone network. The conditioner unit senses a signal intended to request test results from the pair gain test controller and provides a response signal which indicates that the pair gain test controller performed a successful test, even though the pair gain test controller was not activated. This allows testing of the network without use of a bypass pair or the need to interface the digital loop carrier network with the pair gain test controller.
    Type: Grant
    Filed: April 26, 2002
    Date of Patent: March 9, 2004
    Assignee: ADC DSL Systems, Inc.
    Inventor: John Beck
  • Patent number: 6703952
    Abstract: Testing of analog-to-digital and digital-to-analog converters formed in integrated circuits. In one embodiment, a method of testing an analog-to-digital (A/D) converter comprises applying an analog test signal of a first frequency to an input of the A/D converter. Sampling digital byte samples from an output of the A/D converter at a second sampling frequency and comparing select digital byte samples with each other. When the select digital byte samples match, storing a verify bit in a memory to verify the A/D converter is working. In another embodiment, a method of testing a digital-to-analog (D/A) comprises creating repeating digital byte samples with a logic circuit formed in the integrated circuit. Converting the repeating digital byte samples into an analog test signal with the D/A converter. Comparing the frequency of the analog test signal with the frequency of an expected analog signal to determine if the D/A converter is working.
    Type: Grant
    Filed: June 10, 2002
    Date of Patent: March 9, 2004
    Assignee: ADC DSL Systems, Inc.
    Inventors: L. Grant Giddens, Juan A. Espinoza
  • Patent number: 6703889
    Abstract: A circuit for controlling inrush current to a load is provided. The circuit includes a variable impedance device having a control input. The variable impedance device is coupled between a power supply interface and a load interface. The circuit also includes a control circuit coupled to the control input of the variable impedance device and also coupled to the load interface. The control circuit is adapted to provide a signal at the control input of the variable impedance device which results in a linear increase in applied voltage to the load when the circuit is coupled to an input power source. A resistor is coupled between the first and second terminals of the power supply interface to provide a current discharge path for the control circuit when the circuit is disconnected from the power supply.
    Type: Grant
    Filed: February 14, 2002
    Date of Patent: March 9, 2004
    Assignee: ADC DSL Systems, Inc.
    Inventor: George Bertran Dodson, III
  • Publication number: 20040042191
    Abstract: An electronic module having a chassis and a single backplane disposed within the chassis. A plurality of bridge circuit cards is disposed within the chassis and is electrically connected to the single backplane. Each of the plurality of bridge circuit cards is for converting between a local area network protocol and a wide area network protocol. A hub circuit card is disposed within the chassis and is electrically connected to the single backplane so that the hub circuit card is electrically connected to each of the plurality of bridge circuit cards. The single backplane is connectable to each of a plurality of remote units for respectively electrically connecting each of the plurality of remote units to each of the plurality of bridge circuit cards. The single backplane is connectable to a data network for electrically connecting the data network to the hub circuit card.
    Type: Application
    Filed: August 28, 2002
    Publication date: March 4, 2004
    Applicant: ADC DSL Systems, Inc.
    Inventors: Douglas G. Gilliland, Donald J. Glaser, Dennis Patrick Miller
  • Patent number: 6701494
    Abstract: A method and system for performing simultaneous tests and avoiding task collisions using a hardware description language includes designating a timeslot for one or more of the simultaneous tests, associating the designated timeslot with one or more of the tasks to be performed in a test, determining if the designated timeslot is available before executing the tasks associated with timeslots and executing the tasks when the designated timeslots become available.
    Type: Grant
    Filed: May 1, 2002
    Date of Patent: March 2, 2004
    Assignee: ADC DSL Systems, Inc.
    Inventors: L. Grant Giddens, Ronald R. Munoz
  • Patent number: 6700779
    Abstract: A modular fan unit having a frame receivable within a baffle of a chassis for containing electronic components is provided. Each of a pair of brackets is connected to an end of the frame to form a slot for receiving a wall of the baffle. Moreover, each of the pair of brackets is respectively attachable to a pair of walls of a rack containing the chassis. A fan is attached to the frame so as to align with an aperture located between the pair of brackets and passing through the frame. A controller is attached to the frame and is electrically connected to the fan.
    Type: Grant
    Filed: July 12, 2002
    Date of Patent: March 2, 2004
    Assignee: ADC DSL Systems, Inc.
    Inventors: Jeffrey W. Hanson, Douglas G. Gilliland, Darrell E. Falke, Dennis Patrick Miller
  • Publication number: 20040034701
    Abstract: A watchdog monitors and terminates applications that have been initiated through a data link between a local unit and a remote unit. A data link session is established between the local and remote units. When the status of the data link indicates that the link has been lost, the watchdog process terminates the applications initiated by the remote unit.
    Type: Application
    Filed: August 14, 2002
    Publication date: February 19, 2004
    Applicant: ADC DSL Systems, Inc.
    Inventor: David J. Kasper
  • Patent number: 6693410
    Abstract: Power control circuits that control the power sequencing and ramp rate of voltages applied to integrated circuits are disclosed. In one embodiment, a power control circuit comprises a delay resistor, a delay capacitor and an input transistor. The delay resistor is adapted to be coupled to an input power supply. The delay capacitor is coupled in series with the delay resistor. The input transistor has an emitter that is adapted to be coupled to the input power supply through the delay resister. The input transistor conducts current when a voltage across the delay capacitor rises above a selected voltage threshold of the input transistor. A power source is applied to a load in response to the conduction of the input transistor which is delayed by the time it takes to charge the delay capacitor to the selected voltage threshold.
    Type: Grant
    Filed: December 16, 2002
    Date of Patent: February 17, 2004
    Assignee: ADC DSL Systems, Inc.
    Inventor: Dale M. Terrien
  • Patent number: 6688919
    Abstract: A housing having a shell, a first compartment, and a second compartment within the first compartment is provided. A first cover is pivotally attached to the shell for selectively opening and closing the first compartment. The first cover has a resilient latch biased for grasping the shell and a lead-out for wires. A second cover is pivotally attached to the shell for selectively opening and closing the second compartment. A plurality of pivot connectors is located in the first compartment. Each of the plurality of pivot connectors is oriented to receive a wire in a direction parallel to a plane of the lead-out for wires. A plurality of jacks is also located in the first compartment. Each of the plurality of jacks has at least one resilient conductor. Each of the plurality of jacks is oriented so that the resilient conductor lies in a plane perpendicular to the plane of the lead-out for wires.
    Type: Grant
    Filed: October 16, 2001
    Date of Patent: February 10, 2004
    Assignee: ADC DSL Systems, Inc.
    Inventors: Suleyman Oguz Sumer, James Edward Bartlett, Brian Donald Van Voorhis
  • Publication number: 20040017848
    Abstract: An apparatus and method are described that allows for improved wander jitter reduction in communication devices and associated communication links, in particular on HDSL communication devices and links. The improved device apparatus and method detects the current data rate offset of the HDSL data rate being utilized and the data rate of the datastream being transmitted through the HDSL communication link and allows for the transmitting HDSL communication device to adjust the HDSL data rate to avoid high wander jitter “sweet spots”. The improved device apparatus and method also allows for the profiling of communication devices for their specific high wander jitter sweet spot maximum points by sweeping the input data rate being transmitted at differing HDSL data rates.
    Type: Application
    Filed: July 25, 2002
    Publication date: January 29, 2004
    Applicant: ADC DSL Systems, Inc.
    Inventors: Harrison Doan, Dung Quoc Nguyen, Ramya Niroshana Dissanayake
  • Publication number: 20040019449
    Abstract: Testing an oscillator and other electronic devices on a circuit board. One method of the present invention comprises powering the oscillator. Providing test instructions to a microprocessor on the circuit board to place the microprocessor in a test mode. Receiving a clock signal from the oscillator at a multiplexer in a field programmable gate array. Receiving operating instructions at the multiplexer from the microprocessor. Multiplexing the clock signal to an external access port with the multiplexer in response to the operating instructions and measuring the frequency of the clock signal at the external access port.
    Type: Application
    Filed: July 23, 2002
    Publication date: January 29, 2004
    Applicant: ADC DSL Systems, Inc.
    Inventors: Juan A. Espinoza, L. Grant Giddens, Clark Tollerson
  • Publication number: 20040018079
    Abstract: A method for controlling fan operation that includes detecting a stopped fan and attempting to start the stopped fan. The method includes attempting to start the stopped fan again after at least one first time interval when the fan does not start. The method includes attempting to start the stopped fan again after at least one second time interval when the fan does not start after a predetermined number of first time intervals, where the at least one second time interval is longer than the first time interval.
    Type: Application
    Filed: July 26, 2002
    Publication date: January 29, 2004
    Applicant: ADC DSL Systems, Inc.
    Inventors: Dennis Patrick Miller, Douglas G. Gilliland
  • Publication number: 20040017822
    Abstract: An apparatus and method are described that allows for improved wander jitter reduction in communication devices and associated communication links, in particular on HDSL communication devices and links. The improved device apparatus and method detects the current data rate offset of the HDSL data rate being utilized and the data rate of the datastream being transmitted through the HDSL communication link and allows for the transmitting HDSL communication device to adjust the HDSL data rate to promote instantaneous data rate offsets that are close to wander jitter minimum points. The improved device apparatus and method also allows for the characterization of communication devices for their specific wander jitter low activity points by sweeping the input data rate being transmitted at differing HDSL data rates.
    Type: Application
    Filed: July 25, 2002
    Publication date: January 29, 2004
    Applicant: ADC DSL Systems, Inc.
    Inventors: Harrison Doan, Dung Quoc Nguyen, Ramya Niroshana Dissanayake
  • Publication number: 20040011973
    Abstract: Apparatus and method for increasing the bandwidth of an optocoupler includes cascode coupling the optocoupler driver transistor with a buffer so as to reduce voltage variations across the driver transistor.
    Type: Application
    Filed: July 16, 2002
    Publication date: January 22, 2004
    Applicant: ADC DSL Systems, Inc.
    Inventor: George Bertram Dodson, III
  • Publication number: 20040012924
    Abstract: A modular fan unit having a frame receivable within a baffle of a chassis for containing electronic components is provided. Each of a pair of brackets is connected to an end of the frame to form a slot for receiving a wall of the baffle. Moreover, each of the pair of brackets is respectively attachable to a pair of walls of a rack containing the chassis. A fan is attached to the frame so as to align with an aperture located between the pair of brackets and passing through the frame. A controller is attached to the frame and is electrically connected to the fan.
    Type: Application
    Filed: July 12, 2002
    Publication date: January 22, 2004
    Applicant: ADC DSL Systems, Inc.
    Inventors: Jeffrey W. Hanson, Douglas G. Gilliland, Darrell E. Falke, Dennis Patrick Miller
  • Publication number: 20040009074
    Abstract: A fan control system uses a closed loop system to adjust the actual operating speed of a fan or fans to a desired operating speed. The desired speed and actual speed are compared in a high gain amplifier to generate a control signal to adjust the actual operating speed of the fan given the feedback.
    Type: Application
    Filed: July 15, 2002
    Publication date: January 15, 2004
    Applicant: ADC DSL Systems, Inc.
    Inventor: George Bertram Dodson
  • Publication number: 20040010529
    Abstract: A method for correlating an input signal to a signature is provided. The method compares an input stream with a signature element-by-element as the input stream is received. The method restarts the comparison using the first element of the signature when an element in the input stream does not match the compared element in the signature and declares correlation when consecutive elements in the input stream match corresponding elements of the entire signature.
    Type: Application
    Filed: July 15, 2002
    Publication date: January 15, 2004
    Applicant: ADC DSL Systems, Inc.
    Inventor: David J. Kasper
  • Publication number: 20040004798
    Abstract: A junction field effect transistor (JFET), acting as a switch, is coupled between the source and gate of a metal oxide semiconductor field effect transistor (MOSFET). A capacitor is connected in parallel with the MOSFET's “Miller capacitance” by being coupled between the gate and drain of the MOSFET in series with a current limiting resistor. When the JFET is on, it has a low impedance with zero gate voltage and forces the gate to source voltage of the MOSFET to remain near zero and, thus, the MOSFET in a high impedance state, until the capacitor charges to the supply voltage.
    Type: Application
    Filed: July 8, 2002
    Publication date: January 8, 2004
    Applicant: ADC DSL Systems, Inc.
    Inventor: Joel F. Priest
  • Publication number: 20030235201
    Abstract: An apparatus and method is described that allows for improved transmission of EOC data over the EOC channels of communication devices and links, reducing the number of dropped EOC packets and increasing the bandwidth and robustness of the EOC channel. The improved device apparatus and method also allows for the reduction of the overhead of EOC channel error detection and correction on the limited resources of the communication device by aborting a corrupted or blocked EOC packet transmission and automatically resending. The improved device apparatus and method additionally allows the reduction of dropped EOC data packets due to corrupted transmission and the resultant miscommunication and corruption of high-level applications of the communication device, such as operation commands, remote configuration and management programs, and operation displays.
    Type: Application
    Filed: June 25, 2002
    Publication date: December 25, 2003
    Applicant: ADC DSL Systems, Inc.
    Inventors: David J. Kasper, Laxman Anne
  • Publication number: 20030236876
    Abstract: A user identification is input to a system. The system uses the user identification to select a set of default alarm severity levels. An indication of the selected set of default alarm severity levels is stored in memory. When a predetermined condition occurs in one of the system's function cards, the alarm that is generated is based on the selected default alarm severity level.
    Type: Application
    Filed: June 20, 2002
    Publication date: December 25, 2003
    Applicant: ADC DSL Systems, Inc.
    Inventors: Michael E. Curtin, Anthony Barrera, Charles Campbell Gorlinski