Abstract: An input power sharing control circuit is provided. The control circuit includes a plurality of current limiting circuits each circuit adapted to receive power from one of a plurality of independent power sources, a power switching control circuit adapted to receive power from the plurality of independent power sources and provide a variable power output and a load coupled to the output of the power switching control circuit, wherein the value of the load impedance and the value of the voltage of the output power controls the variable power output.

Abstract: The present invention relates to a method and apparatus for testing components in ATM networks utilizing loop-back based ATM layer testing. The method and apparatus utilize interfaces and identifier codes to send and loop-back test cells along portions of virtual channels to test the virtual channels.

Abstract: Testing an oscillator and other electronic devices on a circuit board. One method of the present invention comprises powering the oscillator. Providing test instructions to a microprocessor on the circuit board to place the microprocessor in a test mode. Receiving a clock signal from the oscillator at a multiplexer in a field programmable gate array. Receiving operating instructions at the multiplexer from the microprocessor. Multiplexing the clock signal to an external access port with the multiplexer in response to the operating instructions and measuring the frequency of the clock signal at the external access port.

Abstract: A method for controlling fan operation that includes detecting a stopped fan and attempting to start the stopped fan. The method includes attempting to start the stopped fan again after at least one first time interval when the fan does not start. The method includes attempting to start the stopped fan again after at least one second time interval when the fan does not start after a predetermined number of first time intervals, where the at least one second time interval is longer than the first time interval.

Abstract: Resistance in parallel with inductors in a series leg of the low-pass filter facilitates changing input and output resistance of the filter with little or no change in the reactance of the inductors. Furthermore, the reactance of the capacitors in the shunt legs of the filter will be substantially unaffected. This assists the designer in matching the impedance of the filter in the pass-band while still providing substantial impedance mismatching in the stop-band without substantially affecting the characteristics of the filter. Facilitating impedance matching in the pass-band and impedance mismatching in the stop-band is accomplished without the need for more complex active components. POTS splitters making use of such filters can facilitate impedance matching of line and load termination in a telecommunications system in response to signals within the frequencies of typical analog telephony service while providing impedance mismatching in response to signals within the frequencies of typical xDSL service.

Abstract: The present invention relates to a method and apparatus for testing components in ATM networks utilizing loop-back based ATM layer testing. The method and apparatus utilize interfaces and identifier codes to send and loop-back test cells along portions of virtual channels to test the virtual channels.

Abstract: An electronics enclosure is provided. The enclosure includes a cylindrical body, one or more modular card cages adapted to receive one or more electronic circuit cards. The one or more modular card cages including an outer frame member in direct physical and thermal contact with an inner wall of the cylindrical body, an inner frame member, one or more support members coupled between the outer frame member and the inner frame member, and a plurality of electronic device retainers adapted to couple to the modular card cage and hold each of the one or more electronic circuit cards in direct physical and thermal contact with one of the one or more support members. The support members provide an isolated heat dissipation path for heat, produced by each of the one or more electronic circuit cards, to be removed from the enclosure.

Abstract: A housing for circuit cards is provided. The housing has a shell. A thermally conductive liner integral with the shell lines an interior of the shell. A protrusion of the liner extends through the shell and contacts the shell to form a pressure seal between the liner and the shell. A heat sink is disposed on an exterior surface of the shell and is thermally coupled to the protrusion of the liner. A case is disposed within the liner and is thermally coupled to the liner. The case is adapted to receive a plurality of circuit cards so that the plurality of circuit cards is thermally coupled to the case.

Abstract: Cascade low-pass filters are useful in attenuating the xDSL band in a POTS splitter. The design of the low-pass filter is a sixth-order filter having two stages. A first stage includes a fourth-order filter, preferably with a stop-band frequency of approximately 48 kHz. A second stage includes a second-order filter in cascade with the fourth-order filter. For this filter, the stop-band frequency is preferably approximately 29 kHz. The inductance value of the second stage is relatively small in comparison to the inductance values of the first stage. In this manner, improvements in xDSL band attenuation are facilitated with little or no eroding of the voice band performance such as insertion loss, pass-band attenuation and return loss.

Abstract: An input power sharing control circuit is provided. The control circuit includes a plurality of current limiting circuits each circuit adapted to receive power from one of a plurality of independent power sources, a power switching control circuit adapted to receive power from the plurality of independent power sources and provide a variable power output and a load coupled to the output of the power switching control circuit, wherein the value of the load impedance and the value of the voltage of the output power controls the variable power output.

Abstract: A protection circuit for a DSL transceiver unit includes a capacitor connected in series between a first and second portion of a primary winding of a transformer. The first and second portions are coupled to first and second lines, respectively, of a twisted-pair telephone line. A first voltage controlled device is coupled to the first line and a chassis ground. The first voltage controlled device has a first threshold turn-on voltage at which the first voltage controlled device provides a first current path from the first line to chassis ground. A resistive device and a second voltage controlled device are coupled across the capacitor in series. The second voltage controlled device has a second threshold turn-on voltage at which the second voltage controlled device provides a second current path from a first capacitor terminal of the capacitor to a second capacitor terminal of the capacitor. The second threshold turn-on voltage is lower than the first threshold turn-on voltage.

Abstract: A fault warning system controls light sources and a warning signal to provide an indication of fatal and non-fatal faults in a communication system. The circuitry uses a pull-down circuit in electrical communication with light and signal control circuits. The circuit can be operated to activate a first light emitting diode (LED) if an operational status of a monitored circuit is either fatal or non-fatal fault. The circuit can be operated to deactivate a second LED if an operational status of a monitored circuit is fatal, and the second LED remains active if the operational status of the circuit is a non-fatal fault.

Abstract: Methods and systems of monitoring voltage input to network elements are provided. One method includes receiving an input voltage for a line-powered network element, applying the input voltage across a primary winding of a flyback power converter during an on-time of a primary switch, and transferring the input voltage from the primary winding to a secondary winding of the flyback power converter during an off-time of the primary switch. The method further includes sensing the voltage of the secondary winding during the on-time of the primary switch; and drawing minimal current from the flyback power converter.

Abstract: A method of responding to an overload condition includes supplying power on a communication medium in order to provide power to a network element coupled to the communication medium. The method further includes determining if an overload condition exists. If the overload condition exists, the supply of power on the communication medium is stopped for a predetermined period of time. After the predetermined period of time has elapsed, resuming supplying power on the communication medium. If the overload condition still exists after resuming supplying power on the communication medium, signaling a first alarm and/or shutting down a power supply used to supply power on the communication medium.

Abstract: A method of ramping up a power supply that supplies power on a communication medium. The method includes supplying power on the communication medium with the power supply operating at a first set point, determining if an overload condition exists, and, if the overload condition does not exist, signaling a first alarm. If the overload condition exists, power is supplied on the communication medium with the power supply operating at a second set point. It is determined if the overload condition continues to exist while operating the power supply at the second set point. If the overload condition continues to exist while operating the power supply at the second set point, a second alarm is signaled.

Abstract: A fan control system uses a closed loop system to adjust the actual operating speed of a fan or fans to a desired operating speed. The desired speed and actual speed are compared in a high gain amplifier to generate a control signal to adjust the actual operating speed of the fan given the feedback.

Abstract: A circuit card that includes a single ground plane connectable to a chassis-ground and a logic device having a ground pin connected to the single ground plane. The connection between the ground pin and the single ground plane provides a direct path between the logic device and the chassis-ground. A power supply is connected to an input pin of the logic device for providing a logic voltage to the logic device. The power supply is connectable to a battery.

Abstract: A integrated access device in a communication network. The integrated access device in one embodiment includes a network port, a plurality of telephony ports, a data port and communication circuit. The network port is adapted to provide dynamic time division multiplex (TDM) interface to a communication network. The plurality of telephony ports are adapted to provide telephony service to subscriber premises equipment. The data port is adapted to provide digital subscriber line (DSL) service to subscriber premises equipment. The communication circuit is coupled to the network port, the plurality of telephony ports and the data port. Moreover, the communication circuit is adapted to carry voice and data signals between the network port and the plurality of telephony ports and the data port. In addition, the integrated access device is line powered over the network port.

Abstract: A junction field effect transistor (JFET), acting as a switch, is coupled between the source and gate of a metal oxide semiconductor field effect transistor (MOSFET). A capacitor is connected in parallel with the MOSFET's “Miller capacitance” by being coupled between the gate and drain of the MOSFET in series with a current limiting resistor. When the JFET is on, it has a low impedance with zero gate voltage and forces the gate to source voltage of the MOSFET to remain near zero and, thus, the MOSFET in a high impedance state, until the capacitor charges to the supply voltage.

Abstract: An electronic module having a chassis and a single backplane disposed within the chassis. A plurality of bridge circuit cards is disposed within the chassis and is electrically connected to the single backplane. Each of the plurality of bridge circuit cards is for converting between a local area network protocol and a wide area network protocol. A hub circuit card is disposed within the chassis and is electrically connected to the single backplane so that the hub circuit card is electrically connected to each of the plurality of bridge circuit cards. The single backplane is connectable to each of a plurality of remote units for respectively electrically connecting each of the plurality of remote units to each of the plurality of bridge circuit cards. The single backplane is connectable to a data network for electrically connecting the data network to the hub circuit card.