Patents Assigned to Advanced Analogic Technologies (Hong Kong) Limited
  • Publication number: 20130038974
    Abstract: Devices, such as mobile devices, may be exposed to short circuit and output overload events. To protect against such events, mobile devices typically include current limit circuits. Some current limit circuits may involve user programmable function. User programmable function may need accurate current limit detectors. Various embodiments of the present invention include devices and methods for detecting one or more programmed current limits. Some embodiments allow for a user application to select among parallel or serial configurations of current detection circuitry. Each such configuration may include multiple resistive devices of different resistive values.
    Type: Application
    Filed: September 24, 2012
    Publication date: February 14, 2013
    Applicant: Advanced Analogic Technologies, Inc.
    Inventor: Advanced Analogic Technologies, Inc.
  • Patent number: 8354831
    Abstract: A reverse current comparator for use in switching regulators includes a differential stage configured to encode the difference in voltage between an N and a P input. The differential stage feeds one or more gain stages. At least one of the gain stages includes one or more hysteresis devices. When the voltage of the N input exceeds the voltage of the P input by a predetermined margin, the hysteresis device causes the regulator to enter a triggered state in which it outputs a non-zero output voltage. Subsequent changes to the N and P inputs do not change the regulator output until a RESET input is asserted and which point the regulator enters a reset state and is ready to be triggered.
    Type: Grant
    Filed: February 22, 2008
    Date of Patent: January 15, 2013
    Assignee: Advanced Analogic Technologies, Inc.
    Inventor: Robert Wrathall
  • Patent number: 8350546
    Abstract: A SEPIC converter with over-voltage protection includes a high-side inductor that connects a node Vw to a node Vx. The node Vx is connected, in turn to ground by a power MOSFET. The node Vx is also connected to a node Vy by a first capacitor. The node Vy is connected to ground by a low-side inductor. A rectifier diode further connects the node Vy and a node Vout and an output capacitor is connected between the node Vout and ground. A PWM control circuit is connected to drive the power MOSFET. An over-voltage protection MOSFET connects an input supply to the PWM control circuit and the node Vw. A comparator monitors the voltage of the input supply. If that voltage exceeds a predetermined value Vref the comparator output causes the over-voltage protection MOSFET to disconnect the node Vw and the PWM control circuit from the input supply.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: January 8, 2013
    Assignee: Advanced Analogic Technologies, Inc.
    Inventors: Richard K. Williams, Kevin D'Angelo, Charles Coles
  • Patent number: 8310218
    Abstract: A multiple output DC-to-DC voltage converter using a new time-multiplexed-capacitor converter algorithm and related circuit topologies is herein disclosed. One embodiment of this invention includes a flying capacitor, a first output node, a second output node, and a switching network. The switching network configured to provide the following modes of circuit operation: 1) a first mode where the positive electrode of the flying capacitor is connected to an input voltage and the negative electrode of the flying capacitor is connected to ground; 2) a second mode where the negative electrode of the flying capacitor is connected to the input voltage and the positive electrode of the flying capacitor is connected to the first output node; and 3) a third mode where the positive electrode of the flying capacitor is connected to ground and the negative electrode of the flying capacitor is connected to the second output node.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: November 13, 2012
    Assignee: Advanced Analogic Technologies, Inc.
    Inventor: Richard K. Williams
  • Patent number: 8295023
    Abstract: Devices, such as mobile devices, may be exposed to short circuit and output overload events. To protect against such events, mobile devices typically include current limit circuits. Some current limit circuits may involve user programmable function. User programmable function may need accurate current limit detectors. Various embodiments of the present invention include devices and methods for detecting one or more programmed current limits. Some embodiments allow for a user application to select among parallel or serial configurations of current detection circuitry. Each such configuration may include multiple resistive devices of different resistive values.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: October 23, 2012
    Assignee: Advanced Analogic Technologies, Inc.
    Inventor: John So
  • Patent number: 8278887
    Abstract: A DC/DC converter including an inductor and a capacitor is started by connecting an input voltage to the inductor and shunting a current around the inductor so as to pre-charge the capacitor to a predetermined voltage.
    Type: Grant
    Filed: June 22, 2011
    Date of Patent: October 2, 2012
    Assignee: Advanced Analogic Technologies, Inc.
    Inventor: Richard K. Williams
  • Patent number: 8274268
    Abstract: A control circuit comprises a PWM control circuit and a PWM skip control circuit. The PWM control circuit controls a switching circuit. The switching circuit acts as a current source for an output circuit and a load circuit. The PWM skip control circuit controls the operation of the PWM control circuit. When the output current of the switching circuit is below a predetermined threshold, the PWM skip control circuit stops the operation of the PWM control circuit. When the output voltage of the switching circuit is below a predetermined threshold, the PWM skip control circuit resumes the operation of the PWM control circuit.
    Type: Grant
    Filed: August 13, 2008
    Date of Patent: September 25, 2012
    Assignee: Advanced Analog Technology, Inc.
    Inventor: Chih Yueh Yen
  • Patent number: 8258575
    Abstract: A lateral MOSFET formed in a substrate of a first conductivity type includes a gate formed atop a gate dielectric layer over a surface of the substrate, a drain region of a second conductivity type, a source region of a second conductivity type, and a body region of the first conductivity type which extends under the gate. The body region may have a non-monotonic vertical doping profile with a portion located deeper in the substrate having a higher doping concentration than a portion located shallower in the substrate. The lateral MOSFET is drain-centric, with the source region and a dielectric-filled trench surrounding the drain region.
    Type: Grant
    Filed: September 10, 2010
    Date of Patent: September 4, 2012
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Donald Ray Disney, Wai Tien Chan
  • Patent number: 8138570
    Abstract: An isolation structure for a semiconductor device comprises a floor isolation region, a dielectric filled trench above the floor isolation region and a sidewall isolation region extending downward from the bottom of the trench to the floor isolation region. This structure provides a relatively deep isolated pocket in a semiconductor substrate while limiting the depth of the trench that must be etched in the substrate. An isolated junction field-effect transistor is formed in the isolated pocket.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: March 20, 2012
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Donald Ray Disney, Wai Tien Chan
  • Patent number: 8129965
    Abstract: A low dropout regulator includes an error amplifier, an N-type depletion MOSFET, a first switch, a second switch, a low-pass filter resistor, and a low-pass filter capacitor. By switching on both the first switch and the second switch, a voltage level of an output node at a negative input terminal of the error amplifier may be rapidly raised to be close to and lower than a voltage level of an input node at a gate of the N-type depletion MOSFET. Both the first switch and the second switch are then switched off immediately so that the voltage level of the output node is gradually raised to be equal to the voltage level of the input node through the low-pass filter resistor.
    Type: Grant
    Filed: December 1, 2009
    Date of Patent: March 6, 2012
    Assignee: Advanced Analog Technology, Inc.
    Inventors: Shun-Hau Kao, Mao-Chuan Chien, Chih-Liang Huang
  • Patent number: 8111493
    Abstract: Devices, such as mobile devices, may be exposed to short circuit and output overload events. To protect against such events, mobile devices typically include current limit circuits. Some current limit circuits may involve user programmable function. User programmable function may need accurate current limit detectors. One approach to improving resolution and accuracy of current limit detectors using a single resistive device is to magnify the operating current range. Various embodiments of the present invention include devices and methods for detecting pre-programmed current limits.
    Type: Grant
    Filed: March 10, 2009
    Date of Patent: February 7, 2012
    Assignee: Advanced Analogic Technologies, Inc.
    Inventor: John So
  • Patent number: 8097522
    Abstract: A variety of isolation structures for semiconductor substrates include a trench formed in the substrate that is filled with a dielectric material or filled with a conductive material and lined with a dielectric layer along the walls of the trench. The trench may be used in combination with doped sidewall isolation regions. Both the trench and the sidewall isolation regions may be annular and enclose an isolated pocket of the substrate. The isolation structures are formed by modular implant and etch processes that do not include significant thermal processing or diffusion of dopants so that the resulting structures are compact and may be tightly packed in the surface of the substrate.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: January 17, 2012
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Donald Ray Disney, Wai Tien Chan, Jun-Wei Chen, HyungSik Ryu
  • Patent number: 8089129
    Abstract: Isolated CMOS transistors formed in a P-type semiconductor substrate include an N-type submerged floor isolation region and a filled trench extending downward from the surface of the substrate to the floor isolation region. Together the floor isolation region and the filled trench form an isolated pocket of the substrate which contains a P-channel MOSFET in an N-well and an N-channel MOSFET in a P-well. The substrate does not contain an epitaxial layer, thereby overcoming the many problems associated with fabricating the same.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: January 3, 2012
    Assignee: Advanced Analogic Technologies, Inc.
    Inventors: Donald R. Disney, Richard K. Williams
  • Patent number: 8071462
    Abstract: A variety of isolation structures for semiconductor substrates include a trench formed in the substrate that is filled with a dielectric material or filled with a conductive material and lined with a dielectric layer along the walls of the trench. The trench may be used in combination with doped sidewall isolation regions. Both the trench and the sidewall isolation regions may be annular and enclose an isolated pocket of the substrate. The isolation structures are formed by modular implant and etch processes that do not include significant thermal processing or diffusion of dopants so that the resulting structures are compact and may be tightly packed in the surface of the substrate.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: December 6, 2011
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Donald Ray Disney, Wai Tien Chan
  • Publication number: 20110260246
    Abstract: A transistor is formed inside an isolation structure which includes a floor isolation region and a trench extending from the surface of the substrate to the floor isolation region. The trench may be filled with a dielectric material or may have a conductive material in a central portion with a dielectric layer lining the walls of the trench.
    Type: Application
    Filed: June 30, 2011
    Publication date: October 27, 2011
    Applicant: Advanced Analogic Technologies, Inc.
    Inventors: Donald R. Disney, Richard K. Williams
  • Patent number: 8035364
    Abstract: A freewheeling DC/DC step-down converter includes a high-side MOSFET, an inductor and an output capacitor connected between the input voltage and ground. A freewheeling clamp, which includes a freewheeling MOSFET and diode, is connected across the inductor. When the high-side MOSFET is turned off, a current circulates through the inductor and freewheeling clamp rather than to ground, improving the efficiency of the converter. The converter has softer diode recovery and less voltage overshoot and noise than conventional Buck converters and features unique benefits during light-load conditions.
    Type: Grant
    Filed: April 21, 2008
    Date of Patent: October 11, 2011
    Assignee: Advanced Analogic Technologies, Inc.
    Inventor: Richard K. Williams
  • Patent number: 8030152
    Abstract: A semiconductor substrate includes a pair of trenches filled with a dielectric material. Dopant introduced into the mesa between the trenches is limited from diffusing laterally when the substrate is subjected to thermal processing. Therefore, semiconductor devices can be spaced more closely together on the substrate, and the packing density of the devices can be increased. Also trench constrained doped region diffuse faster and deeper than unconstrained diffusions, thereby reducing the time and temperature needed to complete a desired depth diffusion. The technique may be used for semiconductor devices such as bipolar transistors as well as isolation regions that electrically isolate the devices from each other. In one group of embodiments, a buried layer is formed at an interface between an epitaxial layer and a substrate, at a location generally below the dopant in the mesa.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: October 4, 2011
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Michael E. Cornell, Wai Tien Chan
  • Patent number: 8030731
    Abstract: An isolated diode comprises a floor isolation region, a dielectric-filled trench and a sidewall region extending from a bottom of the trench at least to the floor isolation region. The floor isolation region, dielectric-filled trench and a sidewall region are comprised in one terminal (anode or cathode) of the diode and together form an isolated pocket in which the other terminal of the diode is formed. In one embodiment the terminals of the diode are separated by a second dielectric-filled trench and sidewall region.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: October 4, 2011
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Donald Ray Disney, Wai Tien Chan
  • Patent number: 8026705
    Abstract: A bootstrap circuit is utilized in a bulk circuit using an NMOS transistor as a power switch. The bootstrap circuit includes a first PMOS transistor coupled between an internal power source and an offset capacitor, and a second PMOS transistor coupled between the gate of the first PMOS transistor and the offset capacitor, and an NMOS transistor coupled between the gate of the first PMOS transistor and ground. When the power switch is turned on, the second PMOS transistor is turned on for turning off the first PMOS transistor. When the power switch is turned off, the NMOS transistor is turned on for turning on the first PMOS transistor.
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: September 27, 2011
    Assignee: Advanced Analog Technology, Inc.
    Inventors: Li-Chieh Chen, Yu-Min Sun, Yu-Lee Yeh
  • Patent number: 7994605
    Abstract: Isolation regions for semiconductor substrates include dielectric-filled trenches and field oxide regions. Protective caps of dielectric materials dissimilar from the dielectric materials in the main portions of the trenches and field oxide regions may be used to protect the structures from erosion during later process steps. The top surfaces of the isolation structures are coplanar with the surface of the substrate. Field doping regions may be formed beneath the field oxide regions. To meet the demands of different devices, the isolation structures may have varying widths and depths.
    Type: Grant
    Filed: April 30, 2008
    Date of Patent: August 9, 2011
    Assignee: Advanced Analogic Technologies, Inc.
    Inventor: Richard K. Williams