Patents Assigned to Advanced Interconnect Materials LLC
  • Patent number: 9123821
    Abstract: To make it possible to form a metal electrode of low electrical contact resistance on a conductive indium-containing oxide semiconductor layer constituting a device active layer of a thin-film transistor or the like. Between an indium-containing oxide semiconductor layer and a metal electrode layer provided above this layer for passing device operating current, which can reduce indium oxide or the like of the oxide semiconductor layer. A metallic oxide layer and a metal layer are formed using as material a metal film including an easily oxidable metal, and further an indium-rich layer in which reduced indium is accumulated is formed at a boundary between the metallic oxide layer and the metal layer.
    Type: Grant
    Filed: September 5, 2013
    Date of Patent: September 1, 2015
    Assignee: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Mayumi Naito, Pilsang Yun, Hideaki Kawakami
  • Patent number: 9082821
    Abstract: A method for forming a copper interconnection structure includes the steps of forming an opening in an insulating layer, forming a copper alloy layer including a metal element on an inner surface of the opening, and conducting a heat treatment on the copper alloy layer so as to form a barrier layer. An enthalpy of oxide formation for the metal element is lower than the enthalpy of oxide formation for copper. The heat treatment is conducted at temperatures ranging from 327° C. to 427° C. and for a time period ranging from 1 minute to 80 minutes.
    Type: Grant
    Filed: October 3, 2011
    Date of Patent: July 14, 2015
    Assignee: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Akihiro Shibatomi
  • Patent number: 8895978
    Abstract: An ohmic contact between an electrode and a semiconductor layer is more stably formed and an electrical contact resistance between them is further reduced. A semiconductor device comprises a semiconductor layer 103 composed of an oxide semiconductor material containing indium, an ohmic electrode 107 provided on the semiconductor layer 103 and having an ohmic contact with the semiconductor layer 103, and an intermediate layer 106 provided between the semiconductor layer 103 and the ohmic electrode 107, wherein the intermediate layer 106 includes a first region 106a whose indium atomic concentration is greater than that of an interior of the semiconductor layer 103 and a second region 106b whose indium atomic concentration is less than that of the first region.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: November 25, 2014
    Assignee: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Pilsang Yun, Hideaki Kawakami
  • Patent number: 8866140
    Abstract: Making it possible to improve adhesion between the semiconductor layer and the electrodes, realize high-speed operation of the thin-film transistor by enhancing ohmic contact between these members, reliably prevent oxidation of the electrode surfaces, and realize an electrode fabrication process with few processing steps. The thin-film transistor 10 of the present invention includes a semiconductor layer 4 composed of oxide semiconductor, a source electrode 5 and a drain electrode 6 that are layers composed mainly of copper, and oxide reaction layers 22 provided between the semiconductor layer 4 and each of the source electrode 5 and drain electrode 6, and high-conductance layers 21 provided between the oxide reaction layers 22 and semiconductor layer 4.
    Type: Grant
    Filed: January 2, 2013
    Date of Patent: October 21, 2014
    Assignee: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Pilsang Yun, Hideaki Kawakami
  • Patent number: 8531033
    Abstract: A contact plug structure formed on a contact hole of an insulating layer of a semiconductor device includes a metal silicide layer formed on a bottom part of the contact hole of the insulating layer, a manganese oxide layer formed on the metal silicide layer in the contact hole, and a buried copper formed on the manganese oxide layer which substantially fills the contact hole.
    Type: Grant
    Filed: September 7, 2010
    Date of Patent: September 10, 2013
    Assignee: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Akihiro Shibatomi, Kouji Neishi
  • Patent number: 8420535
    Abstract: A copper interconnection structure includes an insulating layer, an interconnection body including copper and a barrier layer surrounding the interconnection body. The barrier layer includes a first barrier layer formed between a first portion of the interconnection body and the insulating layer. The first portion of the interconnection body is part of the interconnection body that faces the insulating layer. The barrier layer also includes a second barrier layer formed on a second portion of the interconnection body. The second portion of the interconnection body is part of the interconnection body not facing the insulating layer. Each of the first and the second barrier layers is formed of an oxide layer including manganese, and each of the first and the second barrier layers has a position where the atomic concentration of manganese is maximized in their thickness direction of the first and the second barrier layers.
    Type: Grant
    Filed: August 1, 2012
    Date of Patent: April 16, 2013
    Assignee: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Akihiro Shibatomi
  • Patent number: 8372745
    Abstract: A semiconductor device enables a barrier layer to fully acquire a barriering property against the diffusion of Cu from a wiring main body and the diffusion of Si from an insulating film, enhances the adhesiveness of the barrier layer and the insulating film and excels in reliability of operation over a long period of time. In this invention, a semiconductor device provided on an insulating film with a wiring includes the insulating film containing silicon, a wiring main body formed of copper in a groove-like opening disposed in the insulating film, and a barrier layer formed between the wiring main body and the insulating film and made of an oxide containing Cu and Si and Mn.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: February 12, 2013
    Assignee: Advanced Interconnect Materials, LLC
    Inventor: Junichi Koike
  • Patent number: 8324730
    Abstract: A copper interconnection structure includes an insulating layer, an interconnection body including copper in an opening provided on the insulating layer, and a diffusion barrier layer formed between the insulating layer and the interconnection body. The diffusion barrier layer includes an oxide layer including manganese having a compositional ratio of oxygen to manganese (y/x) less than 2.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: December 4, 2012
    Assignee: Advanced Interconnect Materials LLC
    Inventors: Junichi Koike, Akihiro Shibatomi
  • Patent number: 8258626
    Abstract: A copper interconnection structure includes an insulating layer, an interconnection body including copper and a barrier layer surrounding the interconnection body. The barrier layer includes a first barrier layer formed between a first portion of the interconnection body and the insulating layer. The first portion of the interconnection body is part of the interconnection body that faces the insulating layer. The barrier layer also includes a second barrier layer formed on a second portion of the interconnection body. The second portion of the interconnection body is part of the interconnection body not facing the insulating layer. Each of the first and the second barrier layers is formed of an oxide layer including manganese, and each of the first and the second barrier layers has a position where the atomic concentration of manganese is maximized in their thickness direction of the first and the second barrier layers.
    Type: Grant
    Filed: September 15, 2009
    Date of Patent: September 4, 2012
    Assignee: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Akihiro Shibatomi
  • Patent number: 8188599
    Abstract: A semiconductor device enables a barrier layer to fully acquire a barriering property against the diffusion of Cu from a wiring main body and the diffusion of Si from an insulating film, enhances the adhesiveness of the barrier layer and the insulating film and excels in reliability of operation over a long period of time.
    Type: Grant
    Filed: February 27, 2007
    Date of Patent: May 29, 2012
    Assignee: Advanced Interconnect Materials, LLC
    Inventor: Junichi Koike
  • Patent number: 8169079
    Abstract: A copper interconnection structure includes an insulating layer, an interconnection body including copper in an opening provided on the insulating layer and a barrier layer including a metal element and copper, formed between the insulating layer and the interconnection body. An atomic concentration of the metal element in the barrier layer is accumulated toward an outer surface of the barrier layer facing the insulating layer, and an atomic concentration of copper in the barrier layer is accumulated toward an inner surface of the barrier layer facing the interconnection body. The inner surface of the barrier layer comprises copper surface orientation of {111} and {200}, and an intensity of X-ray diffraction peak from the inner surface of the barrier layer is stronger for the {111} peak than for the {200} peak.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: May 1, 2012
    Assignee: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Akihiro Shibatomi
  • Patent number: 8163649
    Abstract: A copper interconnection structure includes an insulating layer, an interconnection and a barrier layer. The insulating layer includes silicon (element symbol: Si), carbon (element symbol: C), hydrogen (element symbol: H) and oxygen (element symbol: O). The interconnection is located on the insulating layer, and the interconnection includes copper (element symbol: Cu). The barrier layer is located between the insulating layer and the interconnection. The barrier layer includes an additional element, carbon (element symbol: C) and hydrogen (element symbol: H). The barrier layer has atomic concentrations of carbon (element symbol: C) and hydrogen (element symbol: H) maximized in a region of a thickness of the barrier layer where the atomic concentration of the additional element is maximized.
    Type: Grant
    Filed: June 24, 2010
    Date of Patent: April 24, 2012
    Assignee: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Akihiro Shibatomi
  • Patent number: 8164701
    Abstract: In a liquid crystal display (LCD) device having a thin film transistor (TFT), the TFT includes a source electrode, a drain electrode and a semiconductor layer. At least one of the source electrode and drain electrode includes a first layer including copper and a second layer forming an oxide layer and covering the first layer. The semiconductor layer has a substantially linear current-voltage relationship with said source electrode or drain electrode including said first and second layers, when a voltage is applied between the semiconductor layer and said source electrode or drain electrode.
    Type: Grant
    Filed: August 13, 2009
    Date of Patent: April 24, 2012
    Assignee: Advanced Interconnect Materials, LLC.
    Inventors: Junichi Koike, Hideaki Kawakami
  • Patent number: 8112885
    Abstract: A method for forming a copper interconnection structure includes the steps of forming an opening in an insulating layer, forming a copper alloy layer including a metal element on an inner surface of the opening, and conducting a heat treatment on the copper alloy layer so as to form a barrier layer. An enthalpy of oxide formation for the metal element is lower than the enthalpy of oxide formation for copper. The heat treatment is conducted at temperatures ranging from 327° C. to 427° C. and for a time period ranging from 1 minute to 80 minutes.
    Type: Grant
    Filed: October 28, 2009
    Date of Patent: February 14, 2012
    Assignee: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Akihiro Shibatomi
  • Publication number: 20120021603
    Abstract: A method for forming a copper interconnection structure includes the steps of forming an opening in an insulating layer, forming a copper alloy layer including a metal element on an inner surface of the opening, and conducting a heat treatment on the copper alloy layer so as to form a barrier layer. An enthalpy of oxide formation for the metal element is lower than the enthalpy of oxide formation for copper. The heat treatment is conducted at temperatures ranging from 327° C. to 427° C. and for a time period ranging from 1 minute to 80 minutes.
    Type: Application
    Filed: October 3, 2011
    Publication date: January 26, 2012
    Applicant: Advanced Interconnect Materials, LLC
    Inventors: Junichi KOIKE, Akihiro Shibatomi
  • Publication number: 20120003390
    Abstract: A copper interconnection structure includes an insulating layer, an interconnection body including copper in an opening provided on the insulating layer, and a diffusion barrier layer formed between the insulating layer and the interconnection body. The diffusion barrier layer includes an oxide layer including manganese having a compositional ratio of oxygen to manganese (y/x) less than 2.
    Type: Application
    Filed: September 12, 2011
    Publication date: January 5, 2012
    Applicant: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Akihiro Shibatomi
  • Patent number: 8089158
    Abstract: The present invention includes a liquid crystal display device having an oxide film having high adhesiveness to a substrate to thereby prevent oxidation of a wiring material or the like, and includes, an electrode or a terminal electrode having high conductivity, and a manufacturing method therefor. Consequently, in the present invention, a liquid crystal display device has an electrode terminal of a TFT substrate, wherein the electrode is formed on an insulator and is comprised of a conductive layer mainly consisting of copper and an oxide covering an outer part, further the oxide is a layered structure of transparent electrodes, the layered portion having ohmic contact, and the oxide mainly consists of manganese oxide.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: January 3, 2012
    Assignee: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Hideaki Kawakami
  • Patent number: 8084860
    Abstract: The present invention includes a liquid crystal display device having an oxide film having high adhesiveness to a substrate to thereby prevent oxidation of a wiring material or the like, and includes, an electrode or a terminal electrode having high conductivity, and a manufacturing method therefor. Consequently, in the present invention, a liquid crystal display device has an electrode terminal of a TFT substrate, wherein the electrode is formed on an insulator and is comprised of a conductive layer mainly consisting of copper and an oxide covering an outer part, further the oxide is a layered structure of transparent electrodes, the layered portion having ohmic contact, and the oxide mainly consists of manganese oxide.
    Type: Grant
    Filed: September 23, 2009
    Date of Patent: December 27, 2011
    Assignee: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Hideaki Kawakami
  • Publication number: 20110233560
    Abstract: An electrode for silicon carbide includes a silicide region which is provided in contact with a surface of a silicon carbide (SiC) layer and a carbide region which is provided on the silicide region. The silicide region contains a silicide of a first metal in more amount than a carbide of a second metal whose free energy of carbide formation is less than that of silicon (Si). The carbide region contains the carbide of the second metal in more amount than the silicide of the first metal.
    Type: Application
    Filed: March 16, 2011
    Publication date: September 29, 2011
    Applicant: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Akihiro Shibatomi, Kunhwa Jung, Yuji Sutou
  • Patent number: 7940361
    Abstract: A liquid crystal display device including, a pair of substrates, a gate electrode of a thin film transistor (TFT) formed on one of the substrates, and a wiring layer connected to the gate electrode or an electrode of the thin film transistor, wherein at least a part of the gate electrode or a part the wiring layer is formed by a layer structured by a pure copper layer and a Cu—Mn alloy layer including Mn, wherein a concentration of Mn in the Cu—Mn alloy layer is more than 0.1 and not more than 20 atomic percentage within a solubility limit of Mn in the copper, and wherein a boundary surface between the Cu—Mn alloy layer and said one of the substrate includes an oxide layer having a Mn oxide layer.
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: May 10, 2011
    Assignee: Advanced Interconnect Materials, LLC
    Inventor: Junichi Koike