Patents Assigned to Advanced Semiconductor Engineering, Inc.
  • Patent number: 12660669
    Abstract: A semiconductor device and method for manufacturing the same are provided. The method includes providing a first substrate. The method also includes forming a first metal layer on the first substrate. The first metal layer includes a first metal material. The method further includes treating a first surface of the first metal layer with a solution including an ion of a second metal material. In addition, the method includes forming a plurality of metal particles including the second metal material on a portion of the first surface of the first metal layer.
    Type: Grant
    Filed: September 30, 2022
    Date of Patent: June 16, 2026
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Jhao-Cheng Chen, Huang-Hsien Chang, Wen-Long Lu, Shao Hsuan Chuang, Ching-Ju Chen, Tse-Chuan Chou
  • Patent number: 12658587
    Abstract: An electronic device is disclosed. The electronic device includes a first pattern, a second pattern adjacent to the first pattern, and a third pattern disposed between the first pattern and the second pattern. The electronic device also includes a first feeding element and a second feeding element. The first feeding element is spaced apart from the first pattern and the third pattern and configured to electrically couple the first pattern and the third pattern to constitute a first antenna. The second feeding element is configured to electrically couple the second pattern and the third pattern to constitute a second antenna.
    Type: Grant
    Filed: January 17, 2024
    Date of Patent: June 16, 2026
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Po-An Lin, Shao-En Hsu
  • Patent number: 12660360
    Abstract: An optical device includes an emitter, a receiver, a transparent element, and a block layer. The transparent element is disposed over the emitter and the receiver. The transparent element defines a recess between the emitter and the receiver. The block layer is conformally disposed over the transparent element and the recess.
    Type: Grant
    Filed: December 30, 2022
    Date of Patent: June 16, 2026
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventor: Ying-Chung Chen
  • Patent number: 12660704
    Abstract: The present disclosure provides an electronic device, which includes a circuit structure, a processing component, a first storage unit, and a second storage unit. The processing component is disposed over the circuit structure. The first storage unit is supported by the circuit structure, and electrically connected to the processing component. The second storage unit is disposed under the circuit structure and electrically connected to the processing component via the circuit structure.
    Type: Grant
    Filed: July 18, 2023
    Date of Patent: June 16, 2026
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Jung Jui Kang, Chang Chi Lee, Hung-Chun Kuo, Chun-Yen Ting
  • Patent number: 12660609
    Abstract: An electronic device is provided. The electronic device includes an inductor and a dielectric layer. The inductor includes a first magnetic layer, a conductive trace over the first magnetic layer, and a second magnetic layer over the conductive trace. The dielectric layer includes a first portion between the second magnetic layer and an inclined surface of the first magnetic layer. A substantially constant distance between the second magnetic layer and the inclined surface of the first magnetic layer is defined by the dielectric layer.
    Type: Grant
    Filed: January 23, 2023
    Date of Patent: June 16, 2026
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chien Lin Chang Chien, Yuan-Chun Tai, Chiu-Wen Lee, Yu-Hsun Chang, Tai-Yuan Huang
  • Publication number: 20260165198
    Abstract: The present disclosure provides an electronic device. The electronic device includes a first module, a second module, and an encapsulant. The first module includes a first power die with a first dimension. The second module is stacked over the first module and includes a component with a second dimension different from the first dimension. The encapsulant encapsulates the first module and the second module. The encapsulant defines a recess configured to accommodate an external device.
    Type: Application
    Filed: December 5, 2024
    Publication date: June 11, 2026
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Fangwen LIN, Peinung WU, Chingyao HSU, Jenchun CHEN
  • Publication number: 20260153679
    Abstract: A package structure is provided. The package structure includes a first photonic component, a second photonic component, and an optical connector. The optical connector includes a first metasurface and a second metasurface opposite to the first metasurface. The optical connector is configured to optically couple the first photonic component to the second photonic component.
    Type: Application
    Filed: December 2, 2024
    Publication date: June 4, 2026
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Ying-Chung CHEN
  • Publication number: 20260155573
    Abstract: An electronic device is disclosed. An electronic device includes a first pattern having a first corner and a second corner and a feeding element configured to electrically couple to the first pattern. The feeding element is closer to the first corner than to the second corner. The first pattern has a first tab adjacent to the first corner.
    Type: Application
    Filed: December 3, 2024
    Publication date: June 4, 2026
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Po-I WU, Hung-Chun KUO, Ming-Fong JHONG
  • Patent number: 12648427
    Abstract: An electronic device is disclosed. The electronic device includes a first electronic component, a second electronic component, and a circuit structure. The circuit structure is supported by the first electronic component and the second electronic component. The circuit structure electrically connects the first electronic component to the second electronic component and is configured to provide the first electronic component and the second electronic component with a power.
    Type: Grant
    Filed: June 16, 2023
    Date of Patent: June 2, 2026
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Pao-Nan Lee, Syu-Tang Liu, Yu-Hsun Chang
  • Patent number: 12648484
    Abstract: An electronic device is disclosed. The electronic device includes a first conductive plate and a first electronic component. The first conductive plate includes a first connecting portion. The first electronic component supports the first conductive plate through the first connecting portion. The first connecting portion is electrically connected to the first electronic component and configured to buffer stress from the first conductive plate to the first electronic component.
    Type: Grant
    Filed: November 9, 2022
    Date of Patent: June 2, 2026
    Assignees: Advanced Semiconductor Engineering, Inc., UNIVERSAL SCIENTIFIC INDUSTRIAL (SHANGHAI) CO., LTD.
    Inventors: Yi-Hung Hou, Yung-Fa Chen, Sheng-Chia Chen
  • Publication number: 20260150710
    Abstract: The present disclosure relates to a package structure. The package structure includes a die, a leadframe and an encapsulant. The die includes a first surface and a second surface opposite to the first surface. The die includes a gate and a source on the first surface and a drain on the second surface. The leadframe includes a first lead connected to the gate and a second lead connected to the source. The encapsulant covering a lateral surface of the die and exposing the second surface of the die.
    Type: Application
    Filed: November 22, 2024
    Publication date: May 28, 2026
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chia Hsiu HUANG, Kuang-Hsiung CHEN, Chun Chen CHEN, Shao-Lun YANG, Yueh-Chen HSU
  • Publication number: 20260150714
    Abstract: An electronic device is disclosed. The electronic device includes a first conductive plate, a plurality of first electronic components, and a plurality of second electronic components. The plurality of first electronic components are disposed on the first conductive plate and electrically connected in parallel. The plurality of second electronic components are disposed on the first conductive plate and electrically connected in parallel. The first electronic components and the second electronic components are electrically connected in series.
    Type: Application
    Filed: November 27, 2024
    Publication date: May 28, 2026
    Applicants: Advanced Semiconductor Engineering, Inc., Universal Scientific Industrial (Shanghai) Co., Ltd.
    Inventors: Yi-Hung HOU, Jenchun CHEN, Yi Chieh CHIANG, Yung-Fa CHEN, Chengchao LIAO
  • Publication number: 20260150694
    Abstract: The present disclosure relates to a semiconductor device. The semiconductor device includes a package structure, a first shielding layer, and a second shielding layer. The package structure has a first surface and a second surface opposite to the first surface, wherein the package structure has a recess recessed from the first surface. The first shielding layer is disposed on the first surface and an inner surface of the recess of the package structure. The second shielding layer is disposed in the recess and laterally connected to the first shielding layer. The first shielding layer is spaced apart from the second shielding layer.
    Type: Application
    Filed: November 27, 2024
    Publication date: May 28, 2026
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chih-Hung HSU, Chih-Chun Hung, Shao-Lun Yang, Hsin-Wei Chang
  • Patent number: 12641710
    Abstract: The present disclosure provides an electronic device. The electronic device includes a substrate, an electronic component, a circuit structure, and a shielding layer. The electronic component is disposed under the substrate. The circuit structure is disposed under the substrate. The shielding layer is disposed under the substrate and covers the electronic component and connected to the circuit structure. The circuit structure and the shielding layer are collectively configured to block the electronic component from electromagnetic interference.
    Type: Grant
    Filed: November 15, 2023
    Date of Patent: May 26, 2026
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Meng-Jen Wang, Chien-Yuan Tseng, Zhong Kai Chang, Shao-Chang Lee, Shih-Wei Tien, Jyun-Jhih Yang, You-Chi Wang, Dian-Yong Li, Yi Min Lin, Jung-Liang Yeh
  • Patent number: 12642109
    Abstract: A semiconductor substrate and a manufacturing method thereof are provided. The semiconductor substrate includes a dielectric layer, a circuit layer, a first protection layer and a plurality of conductive posts. The dielectric layer has a first surface and a second surface that are opposite to each other. The circuit layer is embedded in the dielectric layer and is exposed from the first surface. The first protection layer covers a portion of the first circuit layer and defines a plurality of holes that expose a remaining portion of the first circuit layer. The conductive posts are formed in the holes.
    Type: Grant
    Filed: July 25, 2022
    Date of Patent: May 26, 2026
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chun-Che Lee, Ming-Chiang Lee, Yuan-Chang Su, Tien-Szu Chen, Chih-Cheng Lee, You-Lung Yen
  • Patent number: 12640460
    Abstract: A semiconductor package includes: (1) a package substrate including an upper surface; (2) a semiconductor device disposed adjacent to the upper surface of the package substrate, the semiconductor device including an inactive surface; and (3) an antenna substrate disposed on the inactive surface of the semiconductor device.
    Type: Grant
    Filed: May 30, 2023
    Date of Patent: May 26, 2026
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventor: Han-Chee Yen
  • Patent number: 12640477
    Abstract: The present disclosure provides an antenna package structure, including a first antenna and a first frequency selective surface structure. The first frequency selective surface structure is disposed above the first antenna, and includes a plurality of first patterns and a plurality of second patterns geometrically distinct from the plurality of the first patterns. The plurality of first patterns and the plurality of second patterns are configured to enhance gain and directivity of the first antenna.
    Type: Grant
    Filed: April 13, 2023
    Date of Patent: May 26, 2026
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Shao-En Hsu, Huei-Shyong Cho, Shih-Wen Lu
  • Publication number: 20260142368
    Abstract: The present disclosure provides an electronic device. The electronic device includes a carrier and an interconnection structure disposed over the carrier and having a plurality of conductive pads. One of the plurality of conductive pads is adjustable to function as a functional pad or a non-functional pad for an antenna unit.
    Type: Application
    Filed: January 14, 2026
    Publication date: May 21, 2026
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wei-Chih CHO
  • Publication number: 20260142369
    Abstract: The present disclosure provides an electronic device. The electronic device includes a carrier and an interconnection structure disposed over the carrier and having a plurality of conductive pads. One of the plurality of conductive pads is adjustable to function as a functional pad or a non-functional pad for an antenna unit.
    Type: Application
    Filed: January 14, 2026
    Publication date: May 21, 2026
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wei-Chih CHO
  • Publication number: 20260142364
    Abstract: The present disclosure provides an electronic device, which includes an encapsulant, an electronic component, an antenna structure, and a first conductive element. The electronic component is disposed in the encapsulant. The antenna structure has an antenna pattern exposed to air and facing the encapsulant, and a first supporting element separating the antenna pattern from the encapsulant. At least a portion of the first conductive element is within the encapsulant, and electrically connects the antenna pattern to the electronic component by the first supporting element.
    Type: Application
    Filed: January 6, 2026
    Publication date: May 21, 2026
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yauanhao YU, Weifan WU, Yong-Chang SYU, Chung Ju YU