Patents Assigned to Advanced Semiconductor Engineering, Inc.
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Publication number: 20240250080Abstract: An optoelectronic package structure is provided. The optoelectronic package includes a carrier, an electronic component, a photonic component and a first power supply path in the carrier. The carrier includes a first region and the electronic component is disposed over the first region of the carrier. A first power supply path is electrically connects the electronic component.Type: ApplicationFiled: March 12, 2024Publication date: July 25, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Jr-Wei LIN, Mei-Ju LU
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Publication number: 20240250427Abstract: The present disclosure provides an electronic device. The electronic device includes an antenna. The antenna includes a first conductive element, a second conductive element, and a switch circuit. The first conductive element is configured to transmit a first signal along a first direction. The second conductive element is configured to transmit a second signal along a second direction different from the first direction. The switch circuit is configured to electrically couple a ground to the first conductive element and/or the second conductive element.Type: ApplicationFiled: January 23, 2023Publication date: July 25, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wei-Hao CHANG, Wei-Chun LEE
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Publication number: 20240250030Abstract: An electronic device is provided. The electronic device includes an inductor and a dielectric layer. The inductor includes a first magnetic layer, a conductive trace over the first magnetic layer, and a second magnetic layer over the conductive trace. The dielectric layer includes a first portion between the second magnetic layer and an inclined surface of the first magnetic layer. A substantially constant distance between the second magnetic layer and the inclined surface of the first magnetic layer is defined by the dielectric layer.Type: ApplicationFiled: January 23, 2023Publication date: July 25, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chien Lin CHANG CHIEN, Yuan-Chun TAI, Chiu-Wen LEE, Yu-Hsun CHANG, Tai-Yuan HUANG
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Publication number: 20240250053Abstract: A semiconductor device includes a semiconductor die having a first surface and a second surface opposite to the first surface, a plurality of first real conductive pillars in a first region on the first surface, and a plurality of supporters in a second region adjacent to the first region. An area density of the plurality of supporters in the second region is in a range of from about 50% to about 100% to an area density of the plurality of first real conductive pillars in the first region. A method for manufacturing a semiconductor package including the semiconductor device is also disclosed in the present disclosure.Type: ApplicationFiled: March 5, 2024Publication date: July 25, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Hsin He HUANG
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Publication number: 20240249988Abstract: A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a substrate, an electronic component, an intermediate structure and a protective layer. The electronic component is disposed over the substrate. The intermediate structure is disposed over the substrate and comprises an interposer and a conductive element on the interposer. The protective layer is disposed over the substrate and has an upper surface covering the electronic component and being substantially level with an upper surface of the conductive element.Type: ApplicationFiled: January 19, 2023Publication date: July 25, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yu-Chang CHEN, Wei-Tung CHANG, Jen-Chieh KAO
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Publication number: 20240249958Abstract: A method for manufacturing a semiconductor package and an apparatus for flattening a workpiece are provided. The method includes providing a panel over a stage, wherein the panel includes a lower surface facing the stage and an upper surface opposite to the lower surface; applying a first force to a first region of the upper surface of the panel along at least one direction from the panel toward the stage; and transferring the first force from the first region to a second region of the upper surface of the panel different from the first region.Type: ApplicationFiled: January 20, 2023Publication date: July 25, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Ya Fang CHAN, Cong-Wei CHEN, Kuoching CHENG, Shih-Yu WANG
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Publication number: 20240250006Abstract: The present disclosure provides a package structure. The package structure includes a die bonding region and a first lead region. The first lead region extends along a first direction. The first direction is along a first edge of the die bonding region. The first lead region includes a first high density lead region and a first low density lead region. The first high density lead region overlaps the first low density lead region in the first direction.Type: ApplicationFiled: January 19, 2023Publication date: July 25, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventor: I-Jen CHEN
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Patent number: 12046558Abstract: An electronic device package includes a substrate, a first semiconductor die, a second semiconductor die and an encapsulant. The substrate includes a first surface, and a second surface opposite to the first surface. The substrate defines a cavity recessed from the first surface. The first semiconductor die is disposed in the cavity. The second semiconductor die is disposed over and electrically connected to the first semiconductor die. The encapsulant is disposed in the cavity of the substrate. The encapsulant encapsulates a first sidewall of the first semiconductor die, and exposes a second sidewall of the first semiconductor die.Type: GrantFiled: February 22, 2022Date of Patent: July 23, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Mei-Ju Lu, Jr-Wei Lin
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Patent number: 12046523Abstract: A semiconductor device package includes a substrate; an electronic component disposed on the substrate; multiple supporting structures disposed on the substrate; and a reinforced structure disposed on the supporting structures and extending in parallel with the substrate.Type: GrantFiled: November 12, 2019Date of Patent: July 23, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventor: Wen-Long Lu
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Publication number: 20240243039Abstract: At least some embodiments of the present disclosure relate to an electronic structure. The package structure includes a lead frame, an electronic component, and a conductive wire physically and electrically connecting the electronic component to the lead frame. An elevation of a first end of the conductive wire is substantially equal to an elevation of a second end of the conductive wire.Type: ApplicationFiled: January 18, 2023Publication date: July 18, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Ying-Chung CHEN
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Publication number: 20240243207Abstract: An optical device package is provided. The optical device package includes a sensor and a light-transmitting region. The sensor includes a sensing region. The light-transmitting region is at least partially in the sensor, and the light-transmitting region allows an external light to transmit therethrough and reach the sensing region. A width of the light-transmitting region adjacent to a level of the sensing region is equal to or smaller than a width of the sensing region.Type: ApplicationFiled: January 12, 2023Publication date: July 18, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Hsiang-Cheng TSAI, Ying-Chung CHEN, Kuo-Hua LAI
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Publication number: 20240237907Abstract: An optical module is disclosed. The optical module includes a carrier, an optical device disposed over the carrier, and a sensing surface facing away from the carrier. The sensing surface includes a transmissive region and a non-transmissive region adjacent to the transmissive region.Type: ApplicationFiled: January 12, 2023Publication date: July 18, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Shih-Chieh TANG, Hsun-Wei CHAN, Hsin-Ying HO
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Publication number: 20240243086Abstract: An electronic device is disclosed. The electronic device includes a chip, a component, and a plurality of first interlayer elements. The chip has an upper surface and a first pad disposed over the upper surface. The component is disposed over the electronic component and configured to filter noise from the electronic component. The plurality of first interlayer elements connect the first pad.Type: ApplicationFiled: January 18, 2023Publication date: July 18, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Sheng-Hsiang HSU, Cheng-Hung KO, Jan-Feng YEN
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Patent number: 12040261Abstract: A substrate structure includes a wiring structure, a first bump pad, a second bump pad and a compensation structure. The wiring structure includes a plurality of redistribution layers. The first bump pad and the second bump pad are bonded to and electrically connected to the wiring structure. An amount of redistribution layers disposed under the first bump pad is greater than an amount of redistribution layers disposed under the second bump pad. The compensation structure is disposed under the second bump pad.Type: GrantFiled: March 29, 2022Date of Patent: July 16, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Syu-Tang Liu, Tsung-Tang Tsai, Huang-Hsien Chang, Ching-Ju Chen
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Patent number: 12040422Abstract: An optical device includes a substrate, an electronic component and a lid. The electronic component is disposed on the substrate. The lid is disposed on the substrate. The lid has a first cavity over the electronic component and a second cavity over the first cavity. The sidewall of the second cavity is inclined.Type: GrantFiled: August 30, 2022Date of Patent: July 16, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chang Chin Tsai, Yu-Che Huang, Hsun-Wei Chan
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Patent number: 12040321Abstract: An optical device includes an optical component and an electrical component. The optical component has a sensing surface and a backside surface opposite to the sensing surface. The electrical component is disposed adjacent to the backside surface of the optical component and configured to support the optical component. A portion of the backside surface of the optical component is exposed from the electrical component.Type: GrantFiled: September 20, 2022Date of Patent: July 16, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Hsiang-Cheng Tsai, Ying-Chung Chen
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Patent number: 12040287Abstract: A semiconductor device package and method for manufacturing the same are provided. The semiconductor device package includes a first conductive structure, a stress buffering layer and a second conductive structure. The first conductive structure includes a substrate, and a first circuit layer disposed on the substrate. The first circuit layer includes a conductive wiring pattern, and the conductive wiring pattern is an uppermost conductive pattern of the first circuit layer. The stress buffering structure is disposed on the first conductive structure. The second conductive structure is disposed over the stress buffering structure. The conductive wiring pattern extends through the stress buffering structure and electrically connected to the second conductive structure, and an upper surface of the conductive wiring pattern is substantially coplanar with an upper surface of the stress buffering structure.Type: GrantFiled: October 10, 2022Date of Patent: July 16, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Hsing Kuo Tien, Chih-Cheng Lee
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Patent number: 12040312Abstract: A semiconductor package structure includes a conductive structure, at least one semiconductor element, an encapsulant, a redistribution structure and a plurality of bonding wires. The semiconductor element is disposed on and electrically connected to the conductive structure. The encapsulant is disposed on the conductive structure to cover the semiconductor element. The redistribution structure is disposed on the encapsulant, and includes a redistribution layer. The bonding wires electrically connect the redistribution structure and the conductive structure.Type: GrantFiled: August 22, 2022Date of Patent: July 16, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chien-Wei Chang, Shang-Wei Yeh, Chung-Hsi Wu, Min Lung Huang
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Publication number: 20240234298Abstract: A semiconductor substrate structure and a method of manufacturing a semiconductor substrate structure are provided. The semiconductor substrate structure includes a substrate, an electronic device, and a filling material. The substrate defines a cavity. The electronic device is disposed in the cavity and spaced apart from the substrate by a gap. The filling material is disposed in the gap and covers a first region of an upper surface of the electronic device.Type: ApplicationFiled: March 22, 2024Publication date: July 11, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Wen Hung HUANG
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Publication number: 20240230739Abstract: A measurement device and a method of measuring a radiation pattern by using the same are provided. The measurement device includes at least one positioner configured to move a first antenna for measuring a main lobe and a back lobe of an electromagnetic wave radiated from the first antenna.Type: ApplicationFiled: January 6, 2023Publication date: July 11, 2024Applicants: Advanced Semiconductor Engineering, Inc., National Chung Cheng UniversityInventors: Sheng-Chi HSIEH, Chen-Chao WANG, Sheng-Fuh CHANG, Chia-Chan CHANG, Shih-Cheng LIN, Yuan-Chun LIN, Wei-Lun HSU, Kuo-Hung CHENG