Patents Assigned to Advanced Semiconductor Engineering, Inc.
  • Patent number: 11967559
    Abstract: An electronic package is provided. The electronic package includes a semiconductor substrate. The semiconductor substrate includes a first active region and a first passive region separated from the first active region. The first active region is configured to regulate a power signal. The first passive region is configured to transmit a data signal.
    Type: Grant
    Filed: November 24, 2021
    Date of Patent: April 23, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chang Chi Lee, Chiu-Wen Lee, Jung Jui Kang
  • Patent number: 11965905
    Abstract: An electronic module is provided. The electronic module includes a carrier, a movable component and an optical component. The movable component is on the carrier and configured to be movable with respect to the carrier. The optical component is configured to detect a movement of the movable component by an optical coupling between the optical component and the movable component.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: April 23, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Shih-Chieh Tang
  • Publication number: 20240130043
    Abstract: An electronic device is disclosed. The electronic device includes a system board and a first set of electronic devices disposed over the system board. Each of the first set of electronic devices comprises a processing unit and a carrier carrying the processing unit. The electronic device also includes a first interconnection structure electrically connected with the processing unit through the carrier and configured to receive a first power from a first power supply unit and to transmit the first power to the processing unit.
    Type: Application
    Filed: October 14, 2022
    Publication date: April 18, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chun-Yen TING, Pao-Nan LEE, Hung-Chun KUO, Jung Jui KANG, Chang Chi LEE
  • Publication number: 20240126327
    Abstract: The present disclosure provides an electronic wearable device. The electronic wearable device includes a first module having a first contact and a second module having a second contact. The first contact is configured to keep electrical connection with the second contact in moving with respect to each other during a wearing period.
    Type: Application
    Filed: October 14, 2022
    Publication date: April 18, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chao Wei LIU, Wei-Hao CHANG, Yung-I YEH, Jen-Chieh KAO, Tun-Ching PI, Ming-Hung CHEN, Hui-Ping JIAN, Shang-Lin WU
  • Publication number: 20240128206
    Abstract: A semiconductor device package comprises a semiconductor device, a first encapsulant surrounding the semiconductor device, a second encapsulant covering the semiconductor device and the first encapsulant, and a redistribution layer extending through the second encapsulant and electrically connected to the semiconductor device.
    Type: Application
    Filed: December 5, 2023
    Publication date: April 18, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Peng YANG, Yuan-Feng CHIANG, Po-Wei LU
  • Publication number: 20240128193
    Abstract: An electronic module is disclosed. The electronic module includes an electronic component and an interconnection structure disposed over the electronic component. The interconnection structure comprises a first region and a second region different from the first region. The first region is configured to transmit a power from outside of the electronic module to the electronic component. The second region is configured to dissipate heat from the electronic component.
    Type: Application
    Filed: October 14, 2022
    Publication date: April 18, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Pao-Nan LEE, Chang Chi LEE, Jung Jui KANG
  • Patent number: 11961799
    Abstract: A semiconductor substrate structure and a method of manufacturing a semiconductor substrate structure are provided. The semiconductor substrate structure includes a substrate, an electronic device, and a filling material. The substrate defines a cavity. The electronic device is disposed in the cavity and spaced apart from the substrate by a gap. The filling material is disposed in the gap and covers a first region of an upper surface of the electronic device.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: April 16, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen Hung Huang
  • Patent number: 11961808
    Abstract: At least some embodiments of the present disclosure relate to an electronic package structure. The electronic package structure includes an electronic structure, a wiring structure disposed over the electronic structure, a bonding element connecting the wiring structure and the electronic structure, and a reinforcement element attached to the wiring structure. An elevation difference between a highest point and a lowest point of a surface of the wiring structure facing the electronic structure is less than a height of the bonding element.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: April 16, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wei-Jen Wang, Po-Jen Cheng, Fu-Yuan Chen, Yi-Hsin Cheng
  • Patent number: 11961831
    Abstract: An electronic package, a semiconductor package structure and a method for manufacturing the same are provided. The electronic package includes a carrier, a first electronic component, an electrical extension structure, and an encapsulant. The carrier has a first face and a second face opposite to the first face. The first electronic component is adjacent to the first face of the carrier. The electrical extension structure is adjacent to the first face of the carrier and defines a space with the carrier for accommodating the first electronic component, the electrical extension structure is configured to connect the carrier with an external electronic component. The encapsulant encapsulates the first electronic component and at least a portion of the electrical extension structure.
    Type: Grant
    Filed: August 20, 2021
    Date of Patent: April 16, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: You-Lung Yen, Bernd Karl Appelt
  • Publication number: 20240120288
    Abstract: An electronic device and a method for manufacturing the same are provided. The electronic device includes a substrate, an encapsulant and an electronic component. The encapsulant is disposed over the substrate, and has a first top surface, a second top surface and a first lateral surface extending between the first top surface and the second top surface. A roughness of the first lateral surface is less than or equal to a roughness of the second top surface. The electronic component is disposed over the second top surface of the encapsulant and electrically connected to the substrate.
    Type: Application
    Filed: October 7, 2022
    Publication date: April 11, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chih-Hsin LAI, Chih-Cheng LEE, Shao-Lun YANG, Wei-Chih CHO
  • Publication number: 20240120640
    Abstract: An electronic device and a method for manufacturing the same are provided. The electronic device includes a carrier, an antenna element and a cladding element. The carrier defines a first area and a second area adjacent to the first area. The antenna element is in the first area. The cladding element covers the antenna element and is configured for enhancing antenna gain of the antenna element. The second area is exposed from the cladding element and is distant from the antenna element.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 11, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jenchun CHEN, Ya-Wen LIAO
  • Patent number: 11950926
    Abstract: An electronic device is provided. The electronic device includes a flexible body having a first portion and a second portion, an electronic component in the first portion and the second portion of the flexible body, a first magnetic element in the first portion of the flexible body and a second magnetic element in the second portion of the flexible body. The first magnetic and the second magnetic generate a repulsive force with each other when the flexible body is bent and the first portion and the second portion of the flexible body are moved toward each other.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: April 9, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Chao Wei Liu
  • Patent number: 11956897
    Abstract: A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.
    Type: Grant
    Filed: July 25, 2022
    Date of Patent: April 9, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ming-Ze Lin, Chia Ching Chen, Yi Chuan Ding
  • Patent number: 11955419
    Abstract: The present disclosure provides a semiconductor device package including a first substrate and an adhesive layer. The first substrate has a first surface and a conductive pad adjacent to the first surface. The conductive pad has a first surface exposed from the first substrate. The adhesive layer is disposed on the first surface of the first substrate. The adhesive layer has a first surface facing the first substrate. The first surface of the adhesive layer is spaced apart from the first surface of the conductive pad in a first direction substantially perpendicular to the first surface of the first substrate. The conductive pad and the adhesive layer are partially overlapping in the first direction.
    Type: Grant
    Filed: January 3, 2023
    Date of Patent: April 9, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Yi Chun Chou
  • Publication number: 20240112978
    Abstract: An electronic package is provided. The electronic package includes an insulating carrier, a first conductive layer, and an electronic component. The first conductive layer is disposed over the insulating carrier. The electronic component is disposed over the first conductive layer and electrically connected to the first conductive layer, wherein the insulating carrier is configured to dissipate heat from the electronic component to a second side of the insulating carrier opposite to a first side facing the electronic component.
    Type: Application
    Filed: September 29, 2022
    Publication date: April 4, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Vikas GUPTA, Mark GERBER
  • Publication number: 20240113061
    Abstract: An electronic device package includes a circuit layer, a first semiconductor die, a second semiconductor die, a plurality of first conductive structures and a second conductive structure. The first semiconductor die is disposed on the circuit layer. The second semiconductor die is disposed on the first semiconductor die, and has an active surface toward the circuit layer. The first conductive structures are disposed between a first region of the second semiconductor die and the first semiconductor die, and electrically connecting the first semiconductor die to the second semiconductor die. The second conductive structure is disposed between a second region of the second semiconductor die and the circuit layer, and electrically connecting the circuit layer to the second semiconductor die.
    Type: Application
    Filed: December 5, 2023
    Publication date: April 4, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Mei-Ju LU, Chi-Han CHEN, Chang-Yu LIN, Jr-Wei LIN, Chih-Pin HUNG
  • Publication number: 20240112848
    Abstract: A package structure is provided. The package structure includes an electronic component and a connection element. The electronic component includes a conductive wire and a magnetic layer encapsulating the conductive wire. The connection element penetrates and contacts the magnetic layer and the conductive wire.
    Type: Application
    Filed: September 29, 2022
    Publication date: April 4, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wu Chou HSU, Hung Yi CHUANG
  • Publication number: 20240109768
    Abstract: A sensor device package and method of manufacturing the same are provided. The sensor device package includes a carrier, a sensor component, an encapsulation layer and a protection film. The sensor component is disposed on the carrier, and the sensor component includes an upper surface and edges. The encapsulation layer is disposed on the carrier and encapsulates the edges of the sensor component. The protection film covers at least a portion of the upper surface of the sensor component.
    Type: Application
    Filed: December 11, 2023
    Publication date: April 4, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chieh-An YEH, Tai-Hung KUO
  • Publication number: 20240102799
    Abstract: An optical module includes: a carrier; an optical element disposed on the upper side of the carrier; and a housing disposed on the upper side of the carrier, the housing defining an aperture exposing at least a portion of the optical element, an outer sidewall of the housing including at least one singulation portion disposed on the upper side of the carrier, wherein the singulation portion of the housing is a first portion of the housing, and wherein the housing further includes a second portion and a surface of the singulation portion of the housing is rougher than a surface of the second portion of the housing.
    Type: Application
    Filed: December 5, 2023
    Publication date: March 28, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ying-Chung CHEN, Hsun-Wei CHAN, Lu-Ming LAI, Kuang-Hsiung CHEN
  • Patent number: 11942585
    Abstract: An optoelectronic package structure and a method of manufacturing an optoelectronic package structure are provided. The optoelectronic package structure includes a photonic component. The photonic component has an electrical connection region, a blocking region and a region for accommodating a device. The blocking region is located between the electrical connection region and the region for accommodating a device.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: March 26, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Hsuan Wu, Chang-Yu Lin, Yu-Sheng Huang