Patents Assigned to Advanced Semiconductor Engineering, Inc.
-
Publication number: 20260206597Abstract: A package structure and a manufacturing method are provided. The package structure includes a wiring structure, a first electronic device, a second electronic device, a first underfill, a second underfill and a stiff bonding material. The first electronic device and the second electronic device are disposed on the wiring structure, and are electrically connected to each other through the wiring structure. The first underfill is disposed in a first space between the first electronic device and the wiring structure. The second underfill is disposed in a second space between the second electronic device and the wiring structure. The stiff bonding material is disposed in a central gap between the first electronic device and the second electronic device. The stiff bonding material is different from the first underfill and the second underfill.Type: ApplicationFiled: March 13, 2026Publication date: July 16, 2026Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Po-Hsien KE, Teck-Chong LEE, Chih-Pin HUNG
-
Publication number: 20260206635Abstract: A method and a system for manufacturing a semiconductor package structure are provided. The method includes: (a) measuring an amount of a molding powder; (b) controlling the amount of a molding powder; and (c) dispensing the molding powder on an assembly structure including a carrier and at least one semiconductor device disposed on the carrier.Type: ApplicationFiled: March 9, 2026Publication date: July 16, 2026Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Chenghan SHE
-
Publication number: 20260206643Abstract: The present disclosure provides an electronic device. The electronic device includes an operating module, a first converter, and a second converter. The first converter abuts the operating module. The second converter is opposite to the first converter. The second converter is configured to convert a first voltage from the first converter to a second voltage received by the operating module.Type: ApplicationFiled: January 13, 2025Publication date: July 16, 2026Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Kuofeng HUANG, Hsin-Chin CHANG, Chih Lung Hung, Hsin-Hua HUANG, Chi Hao CHIANG
-
Patent number: 12685182Abstract: A method for manufacturing a package structure is provided. The method includes providing a package structure including a first region and a second region different from the first region, wherein the package structure comprises a package substrate having an active surface and a backside surface; and irradiating the package structure by a first light beam along a first direction from the active surface toward the backside surface, wherein the first light beam only irradiates the first region without irradiating the second region.Type: GrantFiled: August 25, 2023Date of Patent: July 14, 2026Assignee: Advanced Semiconductor Engineering, Inc.Inventors: Tung Yao Lin, Yi Dao Wang
-
Patent number: 12681246Abstract: The present disclosure provides an electronic package. The electronic package includes a photonic component including a first input/output (I/O) port and a second I/O port both at a side of the photonic component. The electronic package also includes a connector disposed adjacent to the side of the photonic component and configured to guide a first light carrying medium to be optically coupled with at least one of the first I/O port and second I/O port of the photonic component.Type: GrantFiled: June 10, 2022Date of Patent: July 14, 2026Assignee: Advanced Semiconductor Engineering, Inc.Inventors: Han-Chee Yen, Min-Yao Cheng, Hung-Yi Lin
-
Patent number: 12681234Abstract: An optoelectronic package includes a first photonic component, an optical connection element and an optical component. The optical connection element is disposed at least partially over the first photonic component. The optical component is disposed at least partially over the first photonic component. The optical connection element and the optical component are spaced apart from each other.Type: GrantFiled: February 3, 2023Date of Patent: July 14, 2026Assignee: Advanced Semiconductor Engineering, Inc.Inventors: Jr-Wei Lin, Mei-Ju Lu, Wen Chieh Yang
-
Publication number: 20260198339Abstract: The present disclosure provides an electronic device. The electronic device includes a redistribution layer (RDL), a component disposed over the RDL, and an underfill disposed between the RDL and the component. The electronic device also includes an encapsulant covering the component. The encapsulant or the underfill defines a surface adjacent to a sidewall of the component and substantially vertical to the component.Type: ApplicationFiled: July 25, 2025Publication date: July 9, 2026Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Fan-Yu MIN, Meng-Wei HSIEH
-
Publication number: 20260198370Abstract: The present disclosure provides an electronic device. The electronic device includes a redistribution layer (RDL) having a first surface and a second surface opposite the first surface, an electronic component disposed over the first surface of the RDL, and a reinforcement layer disposed over the second surface of the RDL. A method for manufacturing an electronic device is also provided.Type: ApplicationFiled: August 29, 2025Publication date: July 9, 2026Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Meng-Wei HSIEH, Fan-Yu MIN
-
Publication number: 20260198322Abstract: The present disclosure provides an electronic device and a method of manufacturing an electronic device. The electronic device includes a passive component having a lower surface and an upper surface opposite to the lower surface. The electronic device also includes a first warpage-control layer disposed under the lower surface. The electronic device further includes a second warpage-control layer disposed over the upper surface.Type: ApplicationFiled: March 7, 2025Publication date: July 9, 2026Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chien-Fan CHEN, Chia-Pin CHEN, Chia-Chun YEN, Chia Sheng TIEN
-
Publication number: 20260196732Abstract: The present disclosure relates to an electronic device. The electronic device includes a magneto-electric dipole antenna and a first conductive column adjacent to and spaced apart from the magneto-electric dipole antenna. The first conductive column is configured to adjust a mode of the electrical field of the magneto-electric dipole antenna.Type: ApplicationFiled: January 6, 2025Publication date: July 9, 2026Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Cheng-Yu WU, Hung-Hsiang CHENG, Ching-Fang LIN, Ken-Huang LIN, Ming-Lung KUNG
-
Publication number: 20260198368Abstract: An electronic package structure and a method for manufacturing the same are provided. The electronic package structure includes a metal-containing layer, an electronic component, an encapsulant and a reinforcement structure. The electronic component is disposed over the metal-containing layer. The encapsulant encapsulates the electronic component, and defines a designated cavity. The reinforcement structure contacts the metal-containing layer, and overlaps a vertical projection of the designated cavity. A rigidity of the reinforcement structure is greater than a rigidity of the metal-containing layer.Type: ApplicationFiled: June 16, 2025Publication date: July 9, 2026Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Meng-Wei HSIEH, Fan-Yu MIN, Wei-Hang TAI, Shi-Zen CHENG, Yi Chun CHOU, Wen-Hsuan WANG, Chih-En WANG, Chao Wei LIU
-
Publication number: 20260198371Abstract: The present disclosure provides an electronic device. The electronic device includes a redistribution layer (RDL) having a plurality of conductive pads, a chip disposed over the RDL, and an encapsulant disposed over the RDL. The encapsulant includes a first portion surrounding the chip and a second portion surrounding the plurality of conductive pads. The first portion and the second portion have different thicknesses. A method for manufacturing an electronic device is also provided.Type: ApplicationFiled: August 4, 2025Publication date: July 9, 2026Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chao Wei LIU, Meng-Wei HSIEH, Fan-Yu MIN
-
Publication number: 20260198369Abstract: The present disclosure provides an electronic device. The electronic device includes a metal-containing layer, a retaining structure disposed over the metal-containing layer, and an underfill connecting the metal-containing layer and the retaining structure. The retaining structure defines an opening over the metal-containing layer to accommodate a memory package. The underfill contacts a sidewall of the retaining structure. A method for manufacturing an electronic device is also provided.Type: ApplicationFiled: July 30, 2025Publication date: July 9, 2026Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Fan-Yu MIN, Meng-Wei HSIEH, Chao Wei LIU
-
Patent number: 12677668Abstract: An electronic device is disclosed. The electronic device includes a first interconnection structure, and a first electronic component disposed over the first interconnection structure and having an active surface and a lateral surface. The electronic device also includes a power connection disposed between the first interconnection structure and the active surface of the first electronic component, and a first non-power connection extending along the lateral surface of the first electronic component and electrically connected to the first interconnection structure. The electronic device also includes a second non-power connection disposed between the first interconnection structure and the active surface of the first electronic component. The second non-power connection is configured to block an electromagnetic interference (EMI) between the power connection and the first non-power connection.Type: GrantFiled: August 11, 2022Date of Patent: July 7, 2026Assignee: Advanced Semiconductor Engineering, Inc.Inventors: Po-I Wu, Jung Jui Kang, Chang Chi Lee, Pao-Nan Lee, Ming-Fong Jhong
-
Patent number: 12677500Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a substrate having a first surface and a second surface opposite to the first surface, an optical device disposed on the first surface of the substrate, and an electronic device disposed on the second surface of the substrate. A power of the electronic device is greater than a power of the optical device. A vertical projection of the optical device on the first surface is spaced apart from a vertical projection of the electronic device on the second surface by a distance greater than zero.Type: GrantFiled: January 30, 2024Date of Patent: July 7, 2026Assignee: Advanced Semiconductor Engineering, Inc.Inventors: Mei-Yi Wu, Chang Chin Tsai, Bo-Yu Huang, Ying-Chung Chen
-
Patent number: 12677681Abstract: An electronic package structure includes a lower circuit pattern structure, an upper circuit pattern structure, a reflowable material and at least one core element. The upper circuit pattern structure is disposed above the lower circuit pattern structure. The reflowable material is disposed between the upper circuit pattern structure and the lower circuit pattern structure. The core element attaches to the reflowable material and is configured to inhibit displacement of the at least one core element during a reflow process.Type: GrantFiled: December 10, 2021Date of Patent: July 7, 2026Assignee: Advanced Semiconductor Engineering, Inc.Inventors: Wei-Jen Wang, Po-Jen Cheng, Fu-Yuan Chen, Kao Hsin Chen
-
Publication number: 20260188889Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a first antenna pattern disposed at a first elevation and a second antenna pattern disposed at a second elevation different from the first elevation. The first antenna pattern and the second antenna pattern define an air cavity. The semiconductor device package also includes a circuit layer. The air cavity is between the first antenna pattern, the second antenna pattern, and the circuit layer.Type: ApplicationFiled: February 24, 2026Publication date: July 2, 2026Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Cheng-Yu HO, Meng-Wei HSIEH
-
Publication number: 20260186204Abstract: An electronic device is provided. The electronic device includes a first terminal and an optical coupler. The optical coupler includes a first segment, a second segment, and a reflective wall. The first segment is configured to optically couple to the first terminal. The reflective wall separates the first segment from the second segment.Type: ApplicationFiled: December 26, 2024Publication date: July 2, 2026Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Wen-Long LU
-
Publication number: 20260191097Abstract: An electronic device is provided. The electronic device includes a photonic component and a reinforcement module. The reinforcement module is disposed over a first surface of the photonic component and is configured to reduce a warpage of the photonic component. The reinforcement module includes a functional element and a non-functional element. The functional element and the non-functional element collectively construct a continuous structure in a direction substantially parallel to the first surface of the photonic component.Type: ApplicationFiled: December 26, 2024Publication date: July 2, 2026Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Hai-Ming CHEN, Chang-Yu LIN, Pei-Jung YANG, Chi-Han CHEN, Hung-Yi LIN
-
Publication number: 20260188887Abstract: The present disclosure provides an electronic device. The electronic device includes a circuit structure, an interconnection structure disposed over the circuit structure, and an antenna element disposed over the interconnection structure. The antenna element defines a first recess having a sidewall, and the sidewall of the first recess of the antenna element is configured to feed a signal to the antenna element and is electrically connected to the interconnection structure.Type: ApplicationFiled: February 24, 2026Publication date: July 2, 2026Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yuanhao YU, Weifan WU, Yong-Chang SYU