Patents Assigned to Advanced Semiconductor Engineering, Inc.
  • Publication number: 20260269455
    Abstract: The present disclosure provides an electronic device. The electronic device includes a carrier, a connector structure, and a first antenna structure. The carrier has a first surface and a second surface opposite to the first surface. The connector structure is disposed over the second surface of the carrier and defines at least one first recess configured to accommodate an external device. The first antenna structure is in directly contact with the connector structure.
    Type: Application
    Filed: March 7, 2025
    Publication date: September 10, 2026
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yuanhao YU, Wei Shuen KAO
  • Publication number: 20260271754
    Abstract: A semiconductor substrate and a manufacturing method thereof are provided. The semiconductor substrate includes a dielectric layer, a circuit layer, a first protection layer and a plurality of conductive posts. The dielectric layer has a first surface and a second surface that are opposite to each other. The circuit layer is embedded in the dielectric layer and is exposed from the first surface. The first protection layer covers a portion of the first circuit layer and defines a plurality of holes that expose a remaining portion of the first circuit layer. The conductive posts are formed in the holes.
    Type: Application
    Filed: April 27, 2026
    Publication date: September 10, 2026
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chun-Che LEE, Ming-Chiang LEE, Yuan-Chang SU, Tien-Szu CHEN, Chih-Cheng LEE, You-Lung YEN
  • Patent number: 12733524
    Abstract: An electronic device is provided. The electronic device includes a substrate, a first pad, and a second pad. The substrate defines a trench extending along a first direction. The first pad is disposed adjacent to the trench. The second pad is disposed next to the first pad. The first pad and the second pad are disposed at a same side of the trench and are arranged along the first direction. The first pad and the second pad define a first gap and a second gap therebetween along the first direction. The first gap is closer to the trench than the second gap is. A width of the first gap along the first direction is greater than a width of the second gap along the first direction.
    Type: Grant
    Filed: March 29, 2024
    Date of Patent: September 8, 2026
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chung Ju Yu, Shao Lun Yang, Tsung-Wei Lu
  • Patent number: 12733501
    Abstract: A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a first carrier, a second carrier disposed over the first carrier, and a reinforcement connected to the second carrier and configured to prevent the second carrier from being recessed toward the first carrier.
    Type: Grant
    Filed: February 17, 2023
    Date of Patent: September 8, 2026
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventor: Wei-Hao Chang
  • Patent number: 12733503
    Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a substrate having a first surface, an electrical contact disposed over a first region of the substrate, and an EMI shielding layer disposed over the substrate. The EMI shielding layer includes a non-uniform thickness and an elevation of the EMI shielding layer is higher than an elevation of the electrical contact with respect to the first surface of the substrate. A method for manufacturing a semiconductor device package is also disclosed.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: September 8, 2026
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Zheng Wei Wu, Cheng Kai Chang
  • Publication number: 20260262515
    Abstract: An electronic device includes a first electronic component, an encapsulant and a second electronic component. The encapsulant encapsulates the first electronic component. The second electronic component is disposed over the first electronic component and separated from the encapsulant. The second electronic component is configured to receive a power from the first electronic component.
    Type: Application
    Filed: April 20, 2026
    Publication date: September 3, 2026
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Yuan KUNG, Hung-Yi LIN
  • Publication number: 20260262502
    Abstract: An electronic device and a method for manufacturing the same are provided. The electronic device includes a substrate, an encapsulant and an electronic component. The encapsulant is disposed over the substrate, and has a first top surface, a second top surface and a first lateral surface extending between the first top surface and the second top surface. A roughness of the first lateral surface is less than or equal to a roughness of the second top surface. The electronic component is disposed over the second top surface of the encapsulant and electrically connected to the substrate.
    Type: Application
    Filed: April 27, 2026
    Publication date: September 3, 2026
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chih-Hsin LAI, Chih-Cheng LEE, Shao-Lun YANG, Wei-Chih CHO
  • Publication number: 20260256013
    Abstract: The present disclosure provides a method of manufacturing an electronic device. The method includes providing a panel assembly including a plurality of first electronic components, dividing the panel assembly into a plurality of strips, forming a first encapsulant over one of the plurality of strips, and dividing the one of the plurality of strips into a plurality of electronic devices.
    Type: Application
    Filed: February 26, 2025
    Publication date: August 27, 2026
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ping-Feng YANG, Chia-Hao SUNG, Chao-Hung WENG, Chun Hung TSAI, Kuan-Lin YEH, Shang HSU, Pei-Chin HUANG, Ling-Hua Wang
  • Publication number: 20260255984
    Abstract: An electronic device is provided. The electronic device includes a circuit pattern layer. The circuit pattern layer includes a first surface, a second surface recessed with respect to the first surface; and a third surface recessed with respect to the first surface and adjacent to and spaced apart from the second surface. The second surface and the third surface are mis-aligned with each other.
    Type: Application
    Filed: April 17, 2026
    Publication date: August 27, 2026
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Hui-Chen HSU
  • Publication number: 20260255992
    Abstract: A wiring structure and a method for manufacturing the same are provided. The wiring structure includes a conductive structure, an intermediate structure and a seed layer. The conductive structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The conductive structure defines an accommodating hole. The intermediate structure is bonded to an inner surface of the accommodating hole. The seed layer is bonded to the accommodating hole through the intermediate structure.
    Type: Application
    Filed: April 17, 2026
    Publication date: August 27, 2026
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen Hung HUANG
  • Patent number: 12720672
    Abstract: The present disclosure provides an electronic device. The electronic device includes a carrier, an electronic component, a first antenna, and a conductive element. The carrier has a first surface and a second surface opposite to the first surface. The electronic component abuts the second surface. The first antenna is connected with the carrier. The conductive element abuts the first surface of the carrier and configured to test the first antenna.
    Type: Grant
    Filed: February 7, 2024
    Date of Patent: August 25, 2026
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventor: Wei-Tung Chang
  • Patent number: 12714322
    Abstract: An optical module is disclosed. The optical module includes a carrier, an optical device disposed over the carrier, and a sensing surface facing away from the carrier. The sensing surface includes a transmissive region and a non-transmissive region adjacent to the transmissive region.
    Type: Grant
    Filed: January 12, 2023
    Date of Patent: August 25, 2026
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Shih-Chieh Tang, Hsun-Wei Chan, Hsin-Ying Ho
  • Patent number: 12721204
    Abstract: A method for manufacturing a package structure includes: providing a first electrical element and a second electrical element on a surface of a first carrier, wherein the second electrical element is shifted with respect to the first electrical element; and moving the first electrical element along at least one direction substantially parallel with the surface of the first carrier until a first surface of the first electrical element is substantially aligned with a first surface of the second electrical element from a top view.
    Type: Grant
    Filed: September 8, 2022
    Date of Patent: August 25, 2026
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Yu-Lin Shih, Chih-Cheng Lee
  • Publication number: 20260247533
    Abstract: An electronic device is provided. The electronic device includes a first carrier, a second carrier, a first support, and a plurality of voltage regulating components. The second carrier is stacked over the first carrier. The first support is disposed between the first carrier and the second carrier and is at a central region of the first carrier. The voltage regulating components are disposed between the first carrier and the second carrier. At least one of the voltage regulating components is outside of the central region of the first carrier.
    Type: Application
    Filed: February 14, 2025
    Publication date: August 20, 2026
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng Ruei Hung, Chien-Yuan Tseng, Zhi-Yuan LIN, Shao Chieh Huang
  • Publication number: 20260248034
    Abstract: A package structure is provided. The package structure includes a photonic carrier, a circuit structure, and an optical transmission structure. The circuit structure includes a plurality of electronic components. The optical transmission structure separates the circuit structure from the photonic carrier and is configured to optically communicate between the electronic components. The photonic carrier is configured to support the circuit structure and the optical transmission structure and is configured to dissipate heat from the electronic components.
    Type: Application
    Filed: February 14, 2025
    Publication date: August 20, 2026
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jhao-Cheng CHEN, Huang-Hsien CHANG
  • Publication number: 20260248035
    Abstract: The present disclosure provides an electronic device. The electronic device includes an electronic component, an optical transceiver disposed over the electronic component, and an interposer disposed between the electronic component and the optical transceiver. The interposer is configured to reduce thermal interference to the optical transceiver.
    Type: Application
    Filed: February 14, 2025
    Publication date: August 20, 2026
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ying-Chung CHEN, Hsin-Ying HO
  • Publication number: 20260248002
    Abstract: A package structure includes a substrate, a redistribution layer (RDL) structure, a first electronic component and a second electronic component. The redistribution layer (RDL) structure is disposed on the substrate. The first electronic component is disposed over the redistribution layer (RDL) structure. The second electronic component is disposed over the redistribution layer (RDL) structure. The first electronic component is electrically communicated with the second electronic component through the substrate and the redistribution layer (RDL) structure. A number of input/output (I/O) count of the redistribution layer (RDL) structure is less than a number of input/output (I/O) count of the substrate.
    Type: Application
    Filed: February 20, 2025
    Publication date: August 20, 2026
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Lan LIN, Chia-Yin CHIANG, Guo-Cheng LIAO
  • Patent number: 12713922
    Abstract: A power module is disclosed. The power module includes a first conductive plate, a first power component, and a second power component. The first conductive plate has a first side and a second side opposite to the first side; The first power component is disposed at the first side. The second power component is disposed at a first location of the second side distinct from a second location of the second side. The second location is configured to transfer most heat from the first power component to the second power component if the second power component is disposed at the second location.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: August 18, 2026
    Assignees: Advanced Semiconductor Engineering, Inc., Universal Scientific Industrial (Shanghai) Co., Ltd.
    Inventors: Chih-Ming Liu, Yung-Fa Chen, Hung Cheng Chang
  • Patent number: 12713980
    Abstract: A semiconductor package structure and a method of manufacturing a semiconductor package structure is provided. The semiconductor package structure includes a carrier and a component. The carrier includes a first part and a second part separated from the first part. The component is disposed under the first part and electrically connected to the second part. The first part is configured to be electrically connected to a device disposed over the first part.
    Type: Grant
    Filed: April 20, 2023
    Date of Patent: August 18, 2026
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Kay Stefan Essig, You-Lung Yen, Bernd Karl Appelt, Jean Marc Yannou
  • Patent number: 12713891
    Abstract: An electronic device is disclosed. The electronic component has a front side and a backside opposite to the front side. The front side is configured to receive a first power. The backside is configured to receive a second power greater than the first power.
    Type: Grant
    Filed: September 15, 2023
    Date of Patent: August 18, 2026
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chiung-Ying Kuo, Jung Jui Kang, Hung-Chun Kuo, Chun-Yen Ting