Patents Assigned to Advanced Semiconductor Engineering, Inc.
  • Publication number: 20250149457
    Abstract: The present disclosure relates to an electronic device that includes a first electronic component, a second electronic component, an interconnection structure below the first electronic component and the second electronic component and electrically connecting the first electronic component to the second electronic component, and a first waveguide below the first electronic component and the second electronic component and configured to transmit electromagnetic waves.
    Type: Application
    Filed: November 2, 2023
    Publication date: May 8, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Yu HO, Hong-Sheng HUANG, Sheng-Chi HSIEH, Shao-En HSU, Huei-Shyong CHO
  • Publication number: 20250149396
    Abstract: A package structure is provided. The package structure includes a substrate, a first electronic component, a first electrical connector, and a protective layer. The first electronic component is over the substrate. The first electrical connector is between the substrate and the first electronic component. The protective layer encapsulates the first electrical connector. The protective layer has a first curved lateral surface concave toward the first electrical connector and recessed with respect to a lateral surface of the first electronic component.
    Type: Application
    Filed: November 3, 2023
    Publication date: May 8, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Po-Jen CHENG, Wei-Jen WANG, Wei-Long CHEN, Hao-Chung WANG, Kai-Wen CHAN
  • Publication number: 20250134456
    Abstract: A wearable device is provided. The wearable device includes an electronic component and an encapsulant. The encapsulant includes a low-penetrability region encapsulating the electronic component and a high-penetrability region physically separated from the electronic component.
    Type: Application
    Filed: January 7, 2025
    Publication date: May 1, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Chang-Lin YEH
  • Publication number: 20250132278
    Abstract: An electronic device is disclosed. The electronic device includes a unit chip. The unit chip includes an electronic component having a power delivery circuit and a reinforcement supporting the electronic component. The reinforcement is configured to transmit a power signal to the power delivery circuit. The reinforcement includes a thermosetting reinforcement or a glass reinforcement.
    Type: Application
    Filed: October 20, 2023
    Publication date: April 24, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chih-Jing HSU, Hsu-Nan FANG
  • Publication number: 20250132232
    Abstract: An electronic device is provided. The electronic device includes a first circuit structure, a second circuit structure, a conductive layer, and a supporting structure. The conductive layer is disposed between the first circuit structure and the second circuit structure.
    Type: Application
    Filed: October 19, 2023
    Publication date: April 24, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Jen-Hao PAN
  • Publication number: 20250133662
    Abstract: The present disclosure provides an electronic device and method of manufacturing the same. The electronic device includes a first region, a second region, an electronic component, and a first sensing element. The second region is adjacent to the first region. The first region has a first pliability. The second region has a second pliability. The second pliability is greater than the first pliability. The electronic component is disposed at the first region. The first sensing element is disposed at the second region and electrically connected to the electronic component.
    Type: Application
    Filed: December 31, 2024
    Publication date: April 24, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Tun-Ching PI, Ming-Hung CHEN
  • Publication number: 20250132261
    Abstract: A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a first carrier, an encapsulant, a second carrier and one or more supporters. The first carrier has a first surface and a first side contiguous with the first surface. The encapsulant is on the first surface of the first carrier, and the first side of the first carrier is exposed from the encapsulant. The second carrier is disposed over the first carrier. The one or more supporters are spaced apart from the first side of the first carrier and connected between the first carrier and the second carrier. The one or more supporters are arranged asymmetrically with respect to the geographic center of the first carrier. The one or more supporters are fully sealed in the encapsulant.
    Type: Application
    Filed: December 24, 2024
    Publication date: April 24, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Chao Wei LIU
  • Publication number: 20250133322
    Abstract: The present disclosure provides a wearable component. The wearable component includes a first carrier and a first electronic component at least partially embedded within the first carrier. The first carrier and the first electronic component define a space configured for audio transmission. An ear tip and a method of manufacturing a wearable component are also provided.
    Type: Application
    Filed: December 30, 2024
    Publication date: April 24, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chang Yi WU, Hung Yi LIN, Jenchun CHEN
  • Publication number: 20250125209
    Abstract: A semiconductor package structure includes a circuit pattern structure, an encapsulant and an anchoring structure. The encapsulant is disposed on the circuit pattern structure. The anchoring structure is disposed adjacent to an interface between the encapsulant and the circuit pattern structure, and is configured to reduce a difference between a variation of expansion of the encapsulant and a variation of expansion of the circuit pattern structure in an environment of temperature variation.
    Type: Application
    Filed: December 23, 2024
    Publication date: April 17, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yung-Shun CHANG, Teck-Chong LEE
  • Publication number: 20250115473
    Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a substrate with a first groove and a semiconductor device. The first groove has a first portion, a second portion, and a third portion, and the second portion is between the first portion and the third portion. The semiconductor device includes a membrane and is disposed on the second portion of the first groove. The semiconductor device has a first surface adjacent to the substrate and opposite to the membrane. The membrane is exposed by the first surface.
    Type: Application
    Filed: December 17, 2024
    Publication date: April 10, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsu-Liang HSIAO, Lu-Ming LAI, Ching-Han HUANG, Chia-Hung SHEN
  • Publication number: 20250105188
    Abstract: A package structure is provided. The package structure includes a substrate, a sensing device, a light transmissive member, and a bonding structure. The sensing device is over the substrate, and the light transmissive member is over the sensing device. The bonding structure has an upper surface connected to the light transmissive member and a lower surface connected to the sensing device. A width of the upper surface is less than a width of the lower surface of the bonding structure.
    Type: Application
    Filed: September 21, 2023
    Publication date: March 27, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Paofa WANG, Huang Ming CHANG, Yung-Hsing CHANG, Yung-Chi CHEN, Hsiu-Hung SU
  • Publication number: 20250107298
    Abstract: A package structure is provided. The package structure includes a substrate, a first electronic component, an interposer, a conductive wire, and a conductive adhesive. The first electronic component and the interposer are disposed over the substrate. The conductive wire connects the first electronic component to the interposer. The conductive adhesive (connects the interposer to the substrate.
    Type: Application
    Filed: September 27, 2023
    Publication date: March 27, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Hsin-Ying HO
  • Publication number: 20250105161
    Abstract: A semiconductor device package includes a number of interposers mounted to the carrier, wherein the number of interposers may be arranged in an irregular pattern.
    Type: Application
    Filed: December 10, 2024
    Publication date: March 27, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hao-Chih HSIEH, Tun-Ching PI, Sung-Hung CHIANG, Yu-Chang CHEN
  • Publication number: 20250105122
    Abstract: A substrate includes a first dielectric layer having a first surface and a second dielectric layer having a first surface disposed adjacent to the first surface of the first dielectric layer. The substrate further includes a first conductive via disposed in the first dielectric layer and having a first end adjacent to the first surface of the first dielectric layer and a second end opposite the first end. The substrate further includes a second conductive via disposed in the second dielectric layer and having a first end adjacent to the first surface of the second dielectric layer. A width of the first end of the first conductive via is smaller than a width of the second end of the first conductive via, and a width of the first end of the second conductive via is smaller than the width of the first end of the first conductive via.
    Type: Application
    Filed: December 10, 2024
    Publication date: March 27, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Lin HO, Chih-Cheng LEE
  • Publication number: 20250096774
    Abstract: The present disclosure provides a semiconductor package structure. The semiconductor package structure includes a substrate, a first electronic component and a support component. The first electronic component is disposed on the substrate. The first electronic component has a backside surface facing a first surface of the substrate. The support component is disposed between the backside surface of the first electronic component and the first surface of the substrate. The backside surface of the first electronic component has a first portion connected to the support component and a second portion exposed from the support component.
    Type: Application
    Filed: December 3, 2024
    Publication date: March 20, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi Sheng TSENG, Lu-Ming LAI, Ching-Han HUANG, Kuo-Hua LAI, Hui-Chung LIU
  • Publication number: 20250096073
    Abstract: An electronic device is disclosed. The electronic component has a front side and a backside opposite to the front side. The front side is configured to receive a first power. The backside is configured to receive a second power greater than the first power.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 20, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chiung-Ying KUO, Jung Jui KANG, Hung-Chun KUO, Chun-Yen TING
  • Publication number: 20250098378
    Abstract: A method for manufacturing an optoelectronic structure and a package structure are provided. The method includes providing a substrate and a light source module and a photonic component over the substrate; and adjusting a lens structure to a unit specific position related to the substrate to couple an optical signal from the light source module to the photonic component.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 20, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Pei-Jung YANG, Jr-Wei LIN, Mei-Ju LU, Chi-Han CHEN
  • Publication number: 20250096213
    Abstract: An optical package structure is provided. The optical package structure includes a carrier, an optical emitter, an optical receiver, an optical barrier, and an insulating structure. The optical emitter and the optical receiver are over the carrier. The optical barrier is over the carrier and between the optical emitter and the optical receiver, wherein the optical barrier defines a cavity. The insulating structure is filled in the cavity, wherein an elevation of a top surface of the insulating structure is lower than an elevation of a top surface of the optical barrier with respect to a surface of the carrier.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 20, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jenchun CHEN, Pai-Sheng SHIH, Kuan-Fu CHEN, Cheng Kai CHANG
  • Publication number: 20250087618
    Abstract: A package structure includes a substrate, an electronic device, an underfill, and an underfill guide structure. The electronic device is disposed over the substrate. The underfill is outflanked by the substrate and the electronic device. The underfill guide structure is disposed outside of a vertical projection of the circuit structure and horizontally overlaps a gap between the substrate and the electronic device, and configured to reduce an extension of a portion of the underfill outside of the vertical projection along a lateral surface of the electronic device.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 13, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Shih-Chieh TANG
  • Publication number: 20250087621
    Abstract: An interposer structure and a package structure are provided. The interposer structure includes a conductive portion, a dielectric layer, a plurality of first wires, and a plurality of second wires. The conductive portion has a first surface and a second surface opposite to the first surface. The dielectric layer encapsulates the conductive portion and exposes the first surface and the second surface. The first wires are formed on the first surface. The second wires are disposed over the second surface.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 13, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chih-Jing HSU, Hsu-Nan FANG