Patents Assigned to Advanced Semiconductor Engineering, Inc.
  • SEMICONDUCTOR DEVICE PACKAGE AND METHOD FOR MANUFACTURING THE SAME
    Publication number: 20230326878
    Abstract: A semiconductor device package and a method for manufacturing a semiconductor device package are provided. The semiconductor device package includes a substrate, a clip, and a support structure. The clip is disposed on the substrate. The clip includes a first portion and a second portion separated from each other by a slit. The support structure is above the substrate and supports the clip. The support structure has a first surface and a second surface facing the first surface, and the first surface and the second surface define a gap.
    Type: Application
    Filed: June 13, 2023
    Publication date: October 12, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chia Hsiu HUANG, Chun Chen CHEN, Wei Chih CHO, Shao-Lun YANG
  • ELECTRONIC PACKAGE
    Publication number: 20230324308
    Abstract: An electronic device is disclosed. The electronic device includes a carrier, an optical component disposed on the carrier and a humidity indicator within the electronic package. A position of the humidity indicator within the electronic package is arranged such that at least a part of the humidity indicator is visible from a viewpoint outside of the electronic package.
    Type: Application
    Filed: April 8, 2022
    Publication date: October 12, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Shu Ting MAI, Tzu Hsing CHIANG
  • SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20230327333
    Abstract: A semiconductor device package includes a substrate, a first antenna pattern and a second antenna pattern. The substrate has a first surface and a second surface opposite to the first surface. The first antenna pattern is disposed over the first surface of the substrate. The first antenna pattern has a first bandwidth. The second antenna pattern is disposed over the first antenna pattern. The second antenna pattern has a second bandwidth different from the first bandwidth. The first antenna pattern and the second antenna pattern are at least partially overlapping in a direction perpendicular to the first surface of the substrate.
    Type: Application
    Filed: June 6, 2023
    Publication date: October 12, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Shao-En HSU, Huei-Shyong CHO, Shih-Wen LU
  • ELECTRONIC PACKAGE
    Publication number: 20230326889
    Abstract: An electronic package is provided. The electronic package includes a processing component and a memory unit. The processing component has a side including a first region and a second region distinct from the first region. The memory unit is disposed over the first region. The first region is configured to provide interconnection between the processing component and the memory unit, and the second region is configured to provide external connection.
    Type: Application
    Filed: April 7, 2022
    Publication date: October 12, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hung-Yi Lin, Cheng-Yuan Kung
  • ELECTRONIC DEVICE
    Publication number: 20230327336
    Abstract: An electronic device is disclosed. The electronic device includes a carrier and a first interposer disposed on the carrier. The first interposer has a first region configured for providing an external electrical connection to outside the electronic device and a second region distinct from the first region. The electronic device also includes a first antenna component disposed on the second region of the first interposer.
    Type: Application
    Filed: April 8, 2022
    Publication date: October 12, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jenchun CHEN, Shyue-Long LOUH
  • Semiconductor device and method for manufacturing the same
    Patent number: 11784111
    Abstract: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a semiconductor substrate, at least one conductive via, a second insulation layer and a conductive layer. The conductive via is disposed in the semiconductor substrate and includes an interconnection metal and a first insulation layer around the interconnection metal. A portion of the first insulation layer defines an opening to expose the interconnection metal. The second insulation layer is disposed on a surface of the semiconductor substrate and in the opening. The conductive layer is electrically disconnected with the semiconductor substrate by the second insulation layer and electrically connected to the interconnection metal of the at least one conductive via.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: October 10, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yuan Kung, Hung-Yi Lin, Chin-Cheng Kuo, Wu Chou Hsu
  • Semiconductor device package and a method of manufacturing the same
    Patent number: 11784296
    Abstract: A semiconductor device package includes a carrier, a semiconductor device, a lid, a conductive post, a first patterned conductive layer, a conductive element disposed between the first conductive post and the first patterned conductive layer, and an adhesive layer disposed between the lid and the carrier. The conductive post is electrically connected to the first patterned conductive layer. The semiconductor device is electrically connected to the first patterned conductive layer. The lid is disposed on the carrier, and the lid includes a second patterned conductive layer electrically connected to the first conductive post.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: October 10, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Mei-Yi Wu, Lu-Ming Lai, Yu-Ying Lee, Yung-Yi Chang
  • Semiconductor device package and method for manufacturing the same
    Patent number: 11784152
    Abstract: A semiconductor device package includes a first electronic device and a second electronic device. The first electronic device includes a first redistribution layer (RDL) including a circuit layer. The second electronic device is disposed on the first RDL of the first electronic device. The second electronic device includes an encapsulant and a patterned conductive layer. The encapsulant has a first surface facing the first RDL of the first electronic device, and a second surface opposite to the first surface. The patterned conductive layer is disposed at the second surface of the encapsulant, and is configured to be electrically coupled to the circuit layer of the first RDL of the first electronic device.
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: October 10, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ming Hsien Chu, Chi-Yu Wang
  • Semiconductor package and method for manufacturing the same
    Patent number: 11784110
    Abstract: A semiconductor package may include a substrate; a microelectromechanical device disposed on the substrate; an interconnection structure connecting the substrate to the microelectromechanical device; and a metallic sealing structure surrounding the interconnection structure.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: October 10, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chung Hao Chen, Chin-Cheng Kuo
  • Optical package structure and method for manufacturing the same
    Patent number: 11784174
    Abstract: An optical package structure and a method for manufacturing an optical package structure are provided. The optical package structure includes a first die, a bumping structure, and a second die. The first die is on a carrier. The bumping structure is over the first die. The bumping structure includes a light-transmitting portion and a light-blocking portion embedded in the light-transmitting portion. The second die is electrically connected to the carrier. The light-blocking portion of the bumping structure is free from covering the second die.
    Type: Grant
    Filed: February 4, 2021
    Date of Patent: October 10, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Ying-Chung Chen
  • ELECTRONIC PACKAGE AND SUCTION DEVICE
    Publication number: 20230317502
    Abstract: A method for manufacturing an electronic package and a suction device are provided. The method includes: providing an electronic component having a first surface and including at least one conductive stud on the first surface; providing a suction device having at least one recess; and moving the electronic component with the suction device, wherein an edge of the at least one recess does not overlap the at least one conductive stud from a top view while moving the electronic component with the suction device.
    Type: Application
    Filed: April 1, 2022
    Publication date: October 5, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chun Hung TSAI, Chenghan SHE, Kuo-Chih HUANG, Kuan-Lin YEH
  • PACKAGE STRUCTURE, OPTICAL STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
    Publication number: 20230317589
    Abstract: A package structure includes a first die, a second die, an encapsulant and at least one electrical contact. The first die has an active surface. The second die is disposed on the first die, and has an active surface and a backside surface opposite to the active surface. The active surface of the second die is closer to the active surface of the first die than the backside surface of the second die is. The encapsulant encapsulates the first die and the second die, and has a top surface far away from the active surface of the first die. The electrical contact is exposed from the top surface of the encapsulant and is configured for connecting at least one conductive wire.
    Type: Application
    Filed: March 31, 2022
    Publication date: October 5, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Yu-Ying Lee
  • Lid structure and semiconductor device package including the same
    Patent number: 11776862
    Abstract: The present disclosure relates to a semiconductor device package, which includes a carrier, a lid, a first adhesive layer and a constraint structure. The carrier includes a surface and a first conductive pad on the surface of the carrier. The lid includes a first portion and a second portion separated from the first portion on the surface of the carrier. The first conductive pad is disposed between the first portion of the lid and the surface of the carrier. The first adhesive layer includes a first portion between the first portion of the lid and the first conductive pad. The constraint structure surrounds the first adhesive layer.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: October 3, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chun-Han Chen, Hsun-Wei Chan, Mei-Yi Wu
  • Semiconductor device package
    Patent number: 11776863
    Abstract: A semiconductor device package includes a carrier, a first interposer disposed and a second interposer. The second interposer is stacked on the first interposer, and the first interposer is mounted to the carrier. The combination of the first interposer and the second interposer is substantially T-shaped.
    Type: Grant
    Filed: August 17, 2021
    Date of Patent: October 3, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Hao-Chih Hsieh, Tun-Ching Pi, Sung-Hung Chiang, Yu-Chang Chen
  • Semiconductor package device and method of manufacturing the same
    Patent number: 11776889
    Abstract: A semiconductor device package includes a carrier provided with a first conductive element, a second conductive element arranged on a semiconductor disposed on the carrier, and a second semiconductor device disposed on and across the first conductive element and the first semiconductor device, wherein the first conductive element having a surface that is substantially coplanar with a surface of the second conductive element.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: October 3, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chih-Hsin Chang, Tsu-Hsiu Wu, Tsung-Yueh Tsai
  • Optical communication package structure and method for manufacturing the same
    Patent number: 11774673
    Abstract: An optical communication package structure includes a wiring structure, at least one via structure, a redistribution structure, at least one optical device and at least one electrical device. The wiring structure includes a main portion and a conductive structure disposed on an upper surface of the main portion. The main portion defines at least one through hole extending through the main portion. The via structure is disposed in the at least one through hole of the main portion and electrically connected to the conductive structure. The redistribution structure is disposed on a lower surface of the main portion and electrically connected to the via structure. The optical device is disposed adjacent to the upper surface of the main portion and electrically connected to the conductive structure. The electrical device is disposed on and electrically connected to the conductive structure.
    Type: Grant
    Filed: April 12, 2022
    Date of Patent: October 3, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Hsuan Wu, Yung-Hui Wang
  • Semiconductor device package and method of manufacturing the same
    Patent number: 11777191
    Abstract: The present disclosure relates to a wireless communication module. The wireless communication module includes a first antenna layer and a second antenna layer non-coplanar with the second antenna layer. An electromagnetic wave of the first antenna and the second antenna are configured to have far-field interference to each other.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: October 3, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yu Ho, Sheng-Chi Hsieh, Chih-Pin Hung
  • Substrate, semiconductor device package and method of manufacturing the same
    Patent number: 11776885
    Abstract: A substrate includes a first dielectric layer having a first surface and a second dielectric layer having a first surface disposed adjacent to the first surface of the first dielectric layer. The substrate further includes a first conductive via disposed in the first dielectric layer and having a first end adjacent to the first surface of the first dielectric layer and a second end opposite the first end. The substrate further includes a second conductive via disposed in the second dielectric layer and having a first end adjacent to the first surface of the second dielectric layer. A width of the first end of the first conductive via is smaller than a width of the second end of the first conductive via, and a width of the first end of the second conductive via is smaller than the width of the first end of the first conductive via.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: October 3, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Lin Ho, Chih-Cheng Lee
  • Semiconductor package structure and method for manufacturing the same
    Patent number: 11776887
    Abstract: The present disclosure provides a semiconductor package structure and a method of manufacturing the same. The semiconductor package structure includes a semiconductor structure, a conductive trace and a tenting structure. The semiconductor structure has a first surface, a second surface and a third surface extending between the first surface and the second surface, and the first surface, the second surface and the third surface define a through-silicon via recessed from the first surface. The conductive trace is disposed adjacent to the first surface, the second surface and the third surface of the semiconductor structure. The tenting structure covering the TSV of the semiconductor structure. A cavity is defined by the tenting structure and the TSV.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: October 3, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wei-Wei Liu, Huei-Siang Wong
  • SEMICONDUCTOR DEVICE PACKAGE
    Publication number: 20230307380
    Abstract: A semiconductor device package is disclosed. The semiconductor device package includes a carrier, a first electronic component disposed on the carrier and a support component disposed on the carrier. The semiconductor device package also includes a second electronic component disposed on the first electronic component and supported by the support component.
    Type: Application
    Filed: March 25, 2022
    Publication date: September 28, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Nan LIN, Ming-Chiang LEE, Yung-I YEH