Abstract: A low temperature CVD process using a tris (&bgr;-diketonate) bismuth precursor for deposition of bismuth ceramic thin films suitable for integration to fabricate ferroelectric memory devices. Films of amorphous SBT can be formed by CVD and then ferroannealed to produce films with Aurivillius phase composition having superior ferroelectric properties suitable for manufacturing high density FRAMs.
Type:
Application
Filed:
June 1, 2001
Publication date:
November 15, 2001
Applicant:
Advanced Technology Materials, Inc.
Inventors:
Frank S. Hintermaier, Christine Dehm, Wolfgang Hoenlein, Peter C. Van Buskirk, Jeffrey F. Roeder, Bryan C. Hendrix, Thomas H. Baum, Debra A. Desrochers
Abstract: A novel lead zirconium titanate (PZT) material having unique properties and application for PZT thin film capacitors and ferroelectric capacitor structures, e.g., FeRAMs, employing such thin film material. The PZT material is scalable, being dimensionally scalable, pulse length scalable and/or E-field scalable in character, and is useful for ferroelectric capacitors over a wide range of thicknesses, e.g., from about 20 nanometers to about 150 nanometers, and a range of lateral dimensions extending to as low as 0.15 &mgr;m. Corresponding capacitor areas (i.e., lateral scaling) in a preferred embodiment are in the range of from about 104 to about 10−2 &mgr;m2. The scalable PZT material of the invention may be formed by liquid delivery MOCVD, without PZT film modification techniques such as acceptor doping or use of film modifiers (e.g., Nb, Ta, La, Sr, Ca and the like).
Type:
Grant
Filed:
February 19, 1999
Date of Patent:
November 13, 2001
Assignee:
Advanced Technology Materials, Inc.
Inventors:
Peter C. Van Buskirk, Jeffrey F. Roeder, Steven M. Bilodeau, Michael W. Russell, Stephen T. Johnston, Daniel J. Vestyck, Thomas H. Baum
Abstract: A logic level detection circuit that includes a sense amplifier and a consumption equilibration circuit that is topologically distinct from the sense amplifier and that reduces and/or substantially eliminates data dependent electrical consumption by having a data dependent electrical consumption that compensates the data dependent electrical consumption of the sense amplifier. The sense amplifier may be implemented as a current-sensing sense amplifier, and the consumption equilibration circuit may be implemented as a selectively enabled current source that is responsive to a signal generated by the current-sensing sense amplifier. The consumption equilibration circuit may be implemented with a small number of transistors and in a small chip area compared to the number of transistors and chip area used for implementing the sense amplifier.
Abstract: A modified PbZrTiO3 perovskite crystal material thin film, wherein the PbZrTiO3 perovskite crystal material includes crystal lattice A-sites and B-sites at least one of which is modified by the presence of a substituent selected from the group consisting of (i) A-site substituents consisting of Sr, Ca, Ba and Mg, and (ii) B-site substituents selected from the group consisting of Nb and Ta. The perovskite crystal thin film material may be formed by liquid delivery MOCVD from metalorganic precursors of the metal components of the thin film, to form PZT and PSZT, and other piezoelectric and ferroelectric thin film materials. The thin films of the invention have utility in non-volatile ferroelectric memory devices (NV-FeRAMs), and in microelectromechanical systems (MEMS) as sensor and/or actuator elements, e.g., high speed digital system actuators requiring low input power levels.
Type:
Grant
Filed:
February 20, 1998
Date of Patent:
November 6, 2001
Assignee:
Advanced Technology Materials, Inc.
Inventors:
Jeffrey F. Roeder, Ing-Shin Chen, Steven Bilodeau, Thomas H. Baum
Abstract: A ferroelectric capacitor device structure, including a ferroelectric stack capacitor comprising a ferroelectric material capacitor element on a substrate containing buried transistor circuitry beneath an insulator layer having a via therein containing a conductive plug to the transistor circuitry, wherein E-fields are structurally confined to the ferroelectric capacitor material element.
Type:
Application
Filed:
June 27, 2001
Publication date:
November 1, 2001
Applicant:
Advanced Technology Materials, Inc.
Inventors:
Peter C. Van Buskirk, Steven M. Bilodeau
Abstract: The present invention comprises formulations for stripping wafer residues which originate from a halogen based plasma metal etching followed by oxygen plasma ashing.
Type:
Grant
Filed:
May 17, 1999
Date of Patent:
October 23, 2001
Assignee:
Advanced Technology Materials, Inc.
Inventors:
William A. Wojtczak, George Guan, Long Nguyen
Abstract: An auto-switching sub-atmospheric pressure gas delivery system, for dispensing gas to a gas-consuming process unit, e.g., a semiconductor manufacturing tool. The gas delivery system uses a multiplicity of gas panels, wherein one panel is in active gas dispensing mode and supplying gas from a sub-atmospheric pressure gas source coupled to the flow circuitry of the panel. During the active gas dispensing operation in such panel, a second gas panel of the system undergoes purge, evacuation and fill transition to active gas dispensing condition, to permit switching to the second panel upon exhaustion of the sub-atmospheric pressure gas source coupled to the first gas panel without the occurrence of pressure spikes or flow perturbations.
Abstract: A low temperature CVD process using a tris (&bgr;-diketonate) bismuth precursor for deposition of bismuth ceramic thin films suitable for integration to fabricate ferroelectric memory devices. Films of amorphous SBT can be formed by CVD and then ferroannealed to produce films with Aurivillius phase composition having superior ferroelectric properties suitable for manufacturing high density FRAMs.
Inventors:
Frank S. Hintermaier, Christine Dehm, Wolfgang Hoenlein, Peter C. Van Buskirk, Jeffrey F. Roeder, Bryan C. Hendrix, Thomas H. Baum, Debra A. Desrochers
Abstract: A chemical delivery system which utilizes multiple techniques to achieve a suitable chemical purge of the chemical delivery system is provided. A purge sequence serves to purge the manifold and canister connection lines of the chemical delivery system prior to removal of an empty chemical supply canister or after a new canister is installed. More particularly, a purge technique which may utilizes a variety of combinations of a medium level vacuum source, a hard vacuum source, and/or a liquid flush system is disclosed. By utilizing a plurality of purge techniques, chemicals such as TaEth, TDEAT, BST, etc. which pose purging difficulties may be efficiently purged from the chemical delivery system. The chemical delivery system may also be provided with an efficient and conveniently located heater system for heating the chemical delivery system cabinet.
Type:
Grant
Filed:
November 13, 2000
Date of Patent:
October 2, 2001
Assignee:
Advanced Technology Materials, Inc.
Inventors:
John N. Gregg, Craig M. Noah, Robert M. Jackson
Abstract: A sensor device for detecting the presence of a gas species in a gas environment susceptible to the presence of same. The sensor device may include a piezoelectric crystal coated with a sensor material having adsorptive affinity for the gas species, with an electric oscillator arranged for applying an oscillating electric field to the piezoelectric crystal to generate an output frequency therefrom indicative of the presence of the gas species when present in the gas environment, when the gas environment is exposed to the piezoelectric crystal. Another aspect of the invention involves a porous polymeric material that may be employed as a sensor material on a piezoelectric crystal sensor device, as well as a quartz microbalance holder that enables reactor gas monitoring. The sensor device alternatively may comprise an optical sensor arranged in a non-contaminating fashion in relation to the gas environment being monitored.
Abstract: A chemical delivery system which utilizes multiple techniques to achieve a suitable chemical purge of the chemical delivery system is provided. A purge sequence serves to purge the manifold and canister connection lines of the chemical delivery system prior to removal of an empty chemical supply canister or after a new canister is installed. More particularly, a purge technique which may utilizes a variety of combinations of a medium level vacuum source, a hard vacuum source, and/or a liquid flush system is disclosed. By utilizing a plurality of purge techniques, chemicals such as TaEth, TDEAT, BST, etc. which pose purging difficulties may be efficiently purged from the chemical delivery system. The chemical delivery system may also be provided with an efficient and conveniently located heater system for heating the chemical delivery system cabinet.
Type:
Grant
Filed:
November 13, 2000
Date of Patent:
October 2, 2001
Assignee:
Advanced Technology Materials, Inc.
Inventors:
John N. Gregg, Craig M. Noah, Robert M. Jackson
Abstract: A process for removing and/or dry etching noble metal-based material structures, e.g., iridium for electrode formation for a microelectronic device. Etch species are provided by plasma formation involving energization of one or more halogenated organic and/or inorganic substance, and the etchant medium including such etch species and oxidizing gas is contacted with the noble metal-based material under etching conditions. The plasma formation and the contacting of the plasma with the noble metal-based material can be carried out in a downstream microwave processing system to provide processing suitable for high-rate fabrication of microelectronic devices and precursor structures in which the noble metal forms an electrode, or other conductive element or feature of the product article.
Type:
Application
Filed:
June 5, 2001
Publication date:
September 27, 2001
Applicant:
Advanced Technology Materials Inc.
Inventors:
Thomas H. Baum, Phillip Chen, Frank DiMeo, Peter C. Van Buskirk, Peter S. Kirlin
Abstract: A memory management unit is disclosed for a single-chip data processing circuit, such as a smart card. The memory management unit (i) partitions a homogeneous memory device to achieve heterogeneous memory characteristics for various regions of the memory device, and (ii) restricts access of installed applications executing in the microprocessor core to predetermined memory ranges. The memory management unit provides two operating modes for the processing circuit. In a secure kernel mode, the programmer can access all resources of the device including hardware control. In an application mode, the memory management unit translates the virtual memory address used by the software creator into the physical address allocated to the application by the operating system in a secure kernel mode during installation. The memory management unit implements memory address checking using limit registers and translates virtual addresses to an absolute memory address using offset registers.
Abstract: An indium precursor composition having utility for incorporation of indium in a microelectronic device structure, e.g., as an indium-containing film on a device substrate by bubbler or liquid delivery MOCVD techniques, or as a dopant species incorporated in a device substrate by ion implantation techniques. The precursor composition includes a precursor of the formula R1R2InL wherein: R1 and R2 may be same or different and are independently selected from C6-C10 aryl, C6-C10 fluoroaryl, C6-C10 perfluoroaryl, C1-C6 alkyl, C1-C6 fluoroalkyl, or C1-C6 perfluoroalkyl; and L is &bgr;-diketonato or carboxylate. Indium-containing metal films may be formed on a substrate, such as indium-copper metallization, and shallow junction indium ion-implanted structures may be formed in integrated circuitry, using the precursors of the invention.
Abstract: A method is provided for promoting adhesion of CVD copper to diffusion barrier material in integrated circuit manufacturing. The method includes depositing a first seed layer of copper on the barrier material by chemical vapor deposition (CVD) using (hfac)Cu(1,5-Dimethylcyclooctadiene) precursor. Following the deposition of the seed layer, which strongly adheres and conforms to the copper receiving surfaces on the diffusion barrier, the wafer substrate is positioned in an electro-chemical deposition apparatus, such as an electroplating or electroless plating bath. A second layer of copper is then deposited on the seed layer by means of electrochemical deposition, e.g., electroplating or electroless plating. The second layer of copper deposited by electro-chemical deposition is a “fill” or “bulk” layer, substantially thicker than the seed layer.
Type:
Grant
Filed:
November 6, 1998
Date of Patent:
September 4, 2001
Assignees:
Advanced Technology Materials, Inc., Sharp Microelectronics Technology Inc.
Inventors:
Lawrence J. Charneski, Tuc Nguyen, Gautam Bhandari
Abstract: A method of fabricating an electrode structure for a ferroelectric device structure including a ferroelectric material, involving chemical vapor deposition of a hybrid electrode constituting a multilayer electrode structure or an alloyed electrode structure, using either bubbler delivery or liquid delivery chemical vapor deposition.
Type:
Grant
Filed:
April 16, 1998
Date of Patent:
September 4, 2001
Assignee:
Advanced Technology Materials, Inc.
Inventors:
Jeffrey F. Roeder, Thomas H. Baum, Peter C. Van Buskirk
Abstract: The formulations of the present invention etch doped silicon oxide compounds, such as BPSG and PSG layers, at rates greater than or equal to the etch rate of undoped silicon oxide such as thermal oxide. The formulations have the general composition of a chelating agent, preferably weakly to moderately acidic (0.1-10%; preferably 0.2-2.8%); a fluoride salt, which may be ammonium fluoride or an organic derivative of either ammonium fluoride or a polyammonium fluoride (1.65-7%; preferably 2.25-7%); a glycol solvent (71-98%; preferably 90-98%); and optionally, an amine.
Type:
Grant
Filed:
December 16, 1998
Date of Patent:
August 28, 2001
Assignee:
Advanced Technology Materials, Inc.
Inventors:
William A. Wojtczak, Long Nguyen, Stephen A. Fine
Abstract: The present invention provides a system and method for a seal for a sterilizable bag. This seal is made between a first polymeric sheet material (5) and a second polymeric sheet material (3). The first sheet material (5) should be sufficiently porous so as to allow or permit gas or steam sterilization but substantially impervious to bacteria. The second sheet material (3) includes an outer heat sealable layer. The seal (4) is fabricated from a first thermal surface weld (15) between the heat sealable layer of the second sheet material (3) and the first sheet material (5), and a second thermal melt weld (12) between at least the heat sealable layer of the second sheet material (3) and the first sheet material (5). The thermal melt weld (12) may be narrower than the first weld (11) and lying within the boundaries of the first weld (11). Furthermore, seal (4) may be sufficiently flat in order to allow a cross-heat seal using conventional equipment.
Type:
Grant
Filed:
March 3, 2000
Date of Patent:
August 28, 2001
Assignee:
Advanced Technology Materials, Inc.
Inventors:
Marc Huynen, Stéphane Huynen, Steven Vanhamel
Abstract: An apparatus and method for the indirect determination of concentrations of additives in metal plating electrolyte solutions, particularly organic additives in Cu-metalization baths for semiconductor manufacturing. The apparatus features a reference electrode housed in an electrically isolated chamber and continuously immersed in the base metal plating solution (without the additive to be measured). An additive concentration determination method comprises electroplating a test electrode at a constant or known current in a mixing chamber wherein the base metal plating solution is mixed with small volumes of the sample and various calibration solutions containing the additive to be measured. Plating potentials between the electrodes are measured and plotted for each of the solution mixtures, and data are extrapolated to determine the concentration of the additive in the sample.
Abstract: An air manager for the containment of hazardous fumes over a liquid chemical tank in exhausted equipment and systems in a clean room. A powered, filtered airflow source forces filtered air through a plenum coextensive with a transverse dimension of the chemical tank, in a sheet-like airflow stream over the liquid surface. The airflow is captured at the opposite side of the liquid chemical tank and directed to a powered exhaust. The air manager works cooperatively with the clean room laminar airflow, dramatically increasing the efficiency of the local exhaust. Critical Capture Velocity over the entire surface of the tank is maintained, assuring complete containment of chemical fumes. Optional airflow guides positioned along the sides of the chemical tank may be employed to confine the air stream to the area over the liquid surface.