Patents Assigned to ADVANCED
  • Patent number: 9653407
    Abstract: The present disclosure relates to a semiconductor device package and a method for manufacturing the semiconductor device package. The semiconductor device package includes a substrate, a grounding element, a component, a package body and a conductive layer. The grounding element is disposed in the substrate and includes a connection surface exposed at a second portion of a lateral surface of the substrate. The component is disposed on a top surface of the substrate. The package body covers the component and the top surface of the substrate. A lateral surface of the package body is aligned with the lateral surface of the substrate. The conductive layer covers a top surface and the lateral surface of the package body, and further covers the second portion of the lateral surface of the substrate. A first portion of the lateral surface of the substrate is exposed from the conductive layer.
    Type: Grant
    Filed: July 2, 2015
    Date of Patent: May 16, 2017
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Shih-Ren Chen, Cheng-Nan Lin
  • Patent number: 9650477
    Abstract: The TPU of this invention contains unsaturation in its polymeric backbone. The unsaturation can be present in the soft segment or in the hard segment or in both the soft and hard segments of the TPU. The TPU can be molded like a thermoplastic, and can be subsequently crosslinked by exposure to electron beam irradiation into thermoset articles having excellent chemical resistance, dimensional stability, set properties, heat resistance, oxidative resistance, and creep resistance. In one embodiment, the TPUs of this invention are the reaction product (1) a hydroxyl terminated intermediate, (2) a polyisocyanate, (3) a saturated glycol chain extender, and (4) a glycol chain extender containing carbon-carbon double bonds, such as the allyl moieties present in trimethylolpropane monoallyl ether.
    Type: Grant
    Filed: October 21, 2014
    Date of Patent: May 16, 2017
    Assignee: Lubrizol Advanced Materials, Inc.
    Inventors: Umit G. Makal, George H. Loeber, Louis J. Brandewiede
  • Patent number: 9649617
    Abstract: A continuous solid-state polymerization device according to the present invention comprises: a feeder for injecting a prepolymer continuously; a transverse reactor connected to the feeder via a first connector to receive the prepolymer from the feeder and to perform solid-state polymerization, the reactor itself rotating; and a chamber connected to the transverse reactor via a second connector to receive a polymer, which has been discharged from the transverse reactor, and solid-state polymerization of which has been completed, and to discharge the polymer, wherein the transverse reactor has a demolding coating film formed on the inner wall thereof, and the feeder, the transverse reactor and the chamber are in a vacuum state. The continuous solid-state polymerization device can prevent formation of an interval, in which the prepolymer stagnates, and can perform solid-state polymerization continuously in a vacuum state without using inert gas.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: May 16, 2017
    Assignee: Lotte Advanced Mateirals Co., Ltd.
    Inventors: Sang Kyun Im, Ki Yon Lee, Shin Hyo Bae, Young Jun Kim, Kyoung Kyun Park, Young Sub Jin, Sang Hyun Jeon
  • Patent number: 9652019
    Abstract: A system and method for efficient management of operating modes within an integrated circuit (IC) for optimal power and performance targets. A semiconductor chip includes processing units each of which operates with respective operating parameters. Temperature sensors are included to measure a temperature of the one or more processing units during operation. A power manager determines a calculated power value independent of thermal conditions and current draw. The power manager reads each of a first thermal design power (TDP) value for the processing units and a second TDP value for a platform housing the semiconductor chip. The power manager determines a ratio of the first TDP value to the second TDP value. Additionally, the power manager determines another ratio of the first TDP value to the calculated power value. Using the measured temperature, the ratios and the calculated power value, the power manager determines a manner to adjust the operating parameters.
    Type: Grant
    Filed: June 2, 2014
    Date of Patent: May 16, 2017
    Assignees: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Praveen K. Dongara, Aniruddha Dasgupta, Adam Clark
  • Patent number: 9653599
    Abstract: In a front surface of a semiconductor base body, a gate trench is disposed penetrating an n+-type source region and a p-type base region to a second n-type drift region. In the second n-type drift region, a p-type semiconductor region is selectively disposed. Between adjacent gate trenches, a contact trench is disposed penetrating the n+-type source region and the p-type base region, and going through the second n-type drift region to the p-type semiconductor region. A source electrode embedded in the contact trench contacts the p-type semiconductor region at a bottom portion and corner portion of the contact trench, and forms a Schottky junction with the second n-type drift region at a side wall of the contact trench.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: May 16, 2017
    Assignees: FUJI ELECTRIC CO., LTD., NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Yusuke Kobayashi, Manabu Takei, Shinsuke Harada
  • Patent number: 9650624
    Abstract: Dihydroxy-acid dehydratase (DHAD) variants that display increased DHAD activity are disclosed. Such enzymes can result in increased production of compounds from DHAD requiring biosynthetic pathways. Also disclosed are isolated nucleic acids encoding the DHAD variants, recombinant host cells comprising the isolated nucleic acid molecules, and methods of producing butanol.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: May 16, 2017
    Assignee: Butamax Advanced Biofuels LLC
    Inventors: Lori Ann Maggio-Hall, Brian James Paul, Steven Cary Rothman, Rick W. Ye
  • Patent number: 9650633
    Abstract: Provided is a composition for controlling pluripotency of stem cells including an LIN28A methylation inhibitor and a screening method of the LIN28A methylation inhibitor, and more particularly, a composition for controlling pluripotency of stem cells including an inhibitor controlling methylation of 135th lysine of LIN28A that is methylated by SET7/9, or a composition for treating cancer, and a screening method of the inhibitor, wherein the screening method includes (a) contacting a candidate material with a cell, the cell having a gene introduced thereinto; (b) measuring a methylation level of the 135th lysine of the LIN28A; and (c) selecting an inhibitor controlling methylation of the 135th lysine of the LIN28A. That is, the present invention relates to a composition for controlling pluripotency of embryonic stem cells, or an anti-cancer composition, and a screening method of the inhibitor.
    Type: Grant
    Filed: November 3, 2014
    Date of Patent: May 16, 2017
    Assignee: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Daeyoup Lee, Seung-Kyoon Kim, Hosuk Lee
  • Patent number: 9653648
    Abstract: An LED die includes a substrate, a first semiconductor layer, an active layer, a second semiconductor layer, a transparent conductive layer, a first electrode and a second electrode. The first semiconductor layer, the active layer, the second semiconductor layer and the transparent conductive layer are successively formed on the substrate. The first electrode and the second electrode respectively is formed on the first semiconductor layer and the transparent conductive layer. A plurality of grooves defined on the first semiconductor layer, and a plurality of hole groups defined on the second semiconductor layer. The present disclosure also provides a method of manufacturing the LED die.
    Type: Grant
    Filed: August 6, 2015
    Date of Patent: May 16, 2017
    Assignee: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: Chia-Hung Huang, Ching-Hsueh Chiu, Shun-Kuei Yang, Po-Min Tu, Shih-Cheng Huang
  • Patent number: 9652305
    Abstract: A processor includes an execution unit to execute instructions and a scheduler unit to store a queue of instructions for execution by the execution unit. The scheduler unit includes a wake array including a plurality of source slots to store source identifiers for sources associated with the instructions, a picker to schedule a particular instruction for execution in the execution unit, broadcast a destination identifier associated with the particular instruction to a first subset of the source slots, and a delay element to receive the destination identifier broadcast by the picker and communicate a delayed version of the destination identifier to a second subset of the source slots different from the first subset.
    Type: Grant
    Filed: August 6, 2014
    Date of Patent: May 16, 2017
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Srikanth Arekapudi, Emil Talpes, Sahil Arora
  • Patent number: 9653656
    Abstract: An LED package with trenches traversing a die pad to provide a mechanical interlock mechanism to strengthen bonding between the die pad and an insulator such that de-lamination is less likely to occur between the die pad and the insulator. A chip carrying region is defined by a barrier portion formed by the insulator in the trenches and in gaps between electrodes and the die pad, such that a light converting layer is confined within the barrier portion.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: May 16, 2017
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventor: Hsun-Wei Chan
  • Patent number: 9653415
    Abstract: The present disclosure relates to a semiconductor device package. The semiconductor device package includes a substrate, a semiconductor device, a plurality of electronic components, a first package body, a patterned conductive layer and a feeding element. The semiconductor device and the plurality of electronic components are disposed on the substrate. The first package body covers the semiconductor device but exposes the plurality of electronic components. The patterned conductive layer is formed on the first package body. The feeding element electrically connects the patterned conductive layer to the plurality of electronic components.
    Type: Grant
    Filed: February 18, 2015
    Date of Patent: May 16, 2017
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wei-Hsuan Lee, Sung-Mao Li, Chien-Yeh Liu
  • Patent number: 9653331
    Abstract: Improvements in a single and dual stage wafer cushion is disclosed where the wafer cushion can use an edge hinge as a single first stage cushion and a second mid span hinge for the dual stage wafer cushion. This dual stage design gives two distinctly different cushioning forces as opposed to using a single stage design where the force is linear with the amount of compression that is being applied to the outer surfaces of the wafer cushion. The outside edge of the ring provides the greatest expansion such that only the outer edge of the ring makes contact with the outer edge of a wafer. The wafer cushion is a material that flexes and absorbs shocks before the shock is transferred to the wafer stack. The material minimizes debris or contaminants from embedding into the wafer cushion and also prevents sheading of material from the wafer cushion.
    Type: Grant
    Filed: February 16, 2011
    Date of Patent: May 16, 2017
    Assignee: Texchem Advanced Products Incorporated SDN. BHD.
    Inventors: James D Pylant, Christopher R Mack, Alan L Waber, David A Miller
  • Publication number: 20170133360
    Abstract: A semiconductor device includes a substrate, a seed layer, a first patterned metal layer, a dielectric layer and a second metal layer. The seed layer is disposed on a surface of the substrate. The first patterned metal layer is disposed on the seed layer and has a first thickness. The first patterned metal layer includes a first part and a second part. The dielectric layer is disposed on the first part of the first patterned metal layer. The second metal layer is disposed on the dielectric layer and has a second thickness, where the first thickness is greater than the second thickness. The first part of the first patterned metal layer, the dielectric layer and the second metal layer form a capacitor. The first part of the first patterned metal layer is a lower electrode of the capacitor, and the second part of the first patterned metal layer is an inductor.
    Type: Application
    Filed: January 13, 2017
    Publication date: May 11, 2017
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Teck-Chong LEE, Chien-Hua CHEN, Yung-Shun CHANG, Pao-Nan LEE
  • Publication number: 20170131615
    Abstract: Disclosed is a device which constitutes a photonic phased array antenna. The device includes at least one light source, an optical power distributor configured to distribute a light wave generating from the light source, a phase controller configured to a phase of the light wave, and a light wave radiator configured to radiate the light wave into a space based on the controlled phase. Optical waveguides are connected between the light source and the optical power distributer, between the optical power distributor and the phase controller and between the phase controller and the light wave radiator, respectively.
    Type: Application
    Filed: February 12, 2016
    Publication date: May 11, 2017
    Applicant: Korea Advanced Institute of Science and Technology
    Inventors: Hyo Hoon Park, Jong Hun Kim, Sun Kyu Han
  • Publication number: 20170130007
    Abstract: In an embodiment of the present invention, a wet gel includes a crosslinked silicone resin in which a silicone resin composition is solidified; a first liquid capable of dissolving the silicone resin composition; and one of a solid capable of being dissolved in the first liquid, and a second liquid such that a degree of swelling, when the crosslinked silicone resin is immersed in the second liquid, is less than a degree of swelling when the crosslinked silicone resin is immersed in n-dodecane, wherein the second liquid is capable of being mixed with the first liquid.
    Type: Application
    Filed: June 19, 2015
    Publication date: May 11, 2017
    Applicant: National Institute of Advanced Industrial Science and Technology
    Inventors: Chihiro URATA, Atsushi HOZUMI
  • Publication number: 20170130545
    Abstract: A segment of a structure mitigates flow of fluid therethrough. In one embodiment the segment includes an opening for the fluid flow and the modified structure may include a ferromagnetic wall defining the opening and a plurality of permanently magnetized particles. Some of the permanently magnetized particles are attached to the wall by magnetic forces. A system is also provided for injecting magnetic particles into a cavity to impede movement of fluid through the cavity. A method is also described for mitigating a flow of fluid through an opening in a wall. In one embodiment, the method includes positioning a plurality of first magnetic particles along the wall and about the opening and attaching a plurality of second magnetic particles to the first magnetic particles wherein some of the second magnetic particles collectively extend across the opening to cover the opening.
    Type: Application
    Filed: January 23, 2017
    Publication date: May 11, 2017
    Applicant: ADVANCED MAGNET LAB, INC.
    Inventors: RAINER MEINKE, MARK SENTI, GERALD STELZER
  • Publication number: 20170133311
    Abstract: The present disclosure relates to a semiconductor package and a manufacturing method thereof The semiconductor package includes a semiconductor element including a main body, a plurality of conductive vias, and at least one filler. The conductive vias penetrate through the main body. The filler is located in the main body, and a coefficient of thermal expansion (CTE) of the filler is different from that of the main body and the conductive vias. Thus, the CTE of the overall semiconductor element can be adjusted, so as to reduce warpage.
    Type: Application
    Filed: January 19, 2017
    Publication date: May 11, 2017
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chin-Li KAO, Chang-Chi LEE, Yi-Shao LAI
  • Publication number: 20170131377
    Abstract: An MRI apparatus includes a controller configured to acquire, based on a gradient echo sequence, an MR signal from an object; and an image processor configured to acquire a first image corresponding to a time point when the MR signal has a largest phase variation, acquire a second image corresponding to a time point when the MR signal has a smallest phase variation, and obtain an arterial image including an artery of the object by using the first image and the second image.
    Type: Application
    Filed: November 10, 2016
    Publication date: May 11, 2017
    Applicants: SAMSUNG ELECTRONICS CO., LTD., KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Young-beom KIM, Hyun-wook PARK, Dong-chan KIM, Hyun-seok SEO, Ki-nam KWON, Jae-jin CHO
  • Publication number: 20170130261
    Abstract: The present invention provides a reciprocal-flow-type nucleic acid amplification device comprising: heaters capable of forming a denaturation temperature zone and an extension/annealing temperature zone; a fluorescence detector capable of detecting movement of a sample solution between the two temperature zones; a pair of liquid delivery mechanisms that allow the sample solution to move between the two temperature zones and that are configured to be open to atmospheric pressure when liquid delivery stops; a substrate on which the chip for nucleic acid amplification according to claim 2 can be placed; and a control mechanism that controls driving of each liquid delivery mechanism by receiving an electrical signal from the fluorescence detector relating to movement of the sample solution from the control mechanism; the device being capable of performing real-time PCR by measuring fluorescence intensity for each thermal cycle.
    Type: Application
    Filed: July 7, 2015
    Publication date: May 11, 2017
    Applicant: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Hidenori NAGAI, Shunsuke FURUTANI, Yoshihisa HAGIHARA, Yusuke FUCHIWAKI
  • Publication number: 20170128717
    Abstract: An electrode assembly for a cochlear lead is configured to stimulate an auditory nerve from within a cochlea. The electrode assembly includes a conductive support structure for supporting an electrode and having two wings that are folded toward each other to form a wire carrier for a bundle of wires of the cochlear lead; and at least one of the wings comprising a tab extending from that wing along a longitudinal axis of the cochlear lead to inhibit twisting of the cochlear lead.
    Type: Application
    Filed: June 17, 2014
    Publication date: May 11, 2017
    Applicant: ADVANCED BIONICS AG
    Inventors: Mark B. Downing, Kate Purnell