Abstract: Various embodiments of the present invention provide systems and methods for media defect detection. For example, a media defect detection systems is disclosed that includes a data input derived from a medium, a fast envelope calculation circuit that receives the data input and provides a fast decay envelope value based on the data input, a slow envelope calculation circuit that receives the data input and provides a slow decay envelope value based on the data input, and a media defect detection circuit. The media defect detection circuit receives the slow decay envelope value and the fast decay envelope value, calculates a ratio value of the fast decay envelope value to the slow decay envelope value, and asserts a defect output based at least in part on the comparison of the ratio value to a defect threshold value.

Abstract: Methods and apparatus are provided for determining the threshold position of one or mote DFE latches using an evaluation of the incoming data eye. A threshold position is determined for one or more transition latches employed by a decision-feedback equalizer by obtaining a plurality of samples of a data eye using a data eye monitor; obtaining a vertical eye opening metric from the data eye monitor; and determining the threshold position for the one or more transition latches based on the vertical eye opening metric. A decision-feedback equalizer is also disclosed that comprises at least one data latch having a data threshold; and at least one transition latching having a transition threshold, wherein the transition threshold and the data threshold ate unequal.

Abstract: A chip and a method of fabricating the chip for low cost chip identification circuitry. In one embodiment, a method of manufacturing an integrated circuit includes formation of a multi-level metallization structure including a pad level comprising programming pads. A plurality of active devices are formed on a substrate, and multiple levels of metallization are formed over the active devices, connecting some of the active devices to form programmable circuitry. The programmable circuitry is connected to pairs of programming pads on the bond pad level. Programming pads in some of the pairs are selectively connected to one another by using conductive ink deposited with maskless inkjet printing techniques. The pads are then covered with a non-conductive protective layer.

Abstract: The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the semiconductor device. The semiconductor device, in one particularly advantageous embodiment, includes a multi layer etch stop located over a substrate, wherein the multi layer etch stop has a first insulative layer and a second silicon-rich nitride layer located over the first insulative layer. Located over the multi layer etch stop is a dielectric layer having an opening formed therein that extends through at least a portion of the multi layer etch stop. A conductive plug is typically located within the opening, wherein an insulative spacer is located between the conductive plug and the second silicon-rich nitride layer.

Abstract: Various embodiments of the present invention provide systems and methods for media defect detection. For example, a media defect detection systems is disclosed that includes a data input derived from a medium, a fast envelope calculation circuit that receives the data input and provides a fast decay envelope value based on the data input, a slow envelope calculation circuit that receives the data input and provides a slow decay envelope value based on the data input, and a media defect detection circuit. The media defect detection circuit receives the slow decay envelope value and the fast decay envelope value, calculates a ratio value of the fast decay envelope value to the slow decay envelope value, and asserts a defect output based at least in part on the comparison of the ratio value to a defect threshold value.

Abstract: The invention provides a signal-powered integrated circuit (IC). The IC comprises an integrated circuit die including a ground node, a supply node, and a first terminal for receiving a digital data signal having data content and a predetermined energy. A receive buffer formed on the integrated circuit die is connected to the first terminal and capable of receiving the data content associated with the digital data signal. A rectifier is also formed on the integrated circuit die. The rectifier includes a first diode connected between the first terminal and the ground node and a second diode connected between the first terminal and the supply node. The rectifier is configured to rectify the digital data signal and pass at least a portion of the digital data signal's predetermined energy to the supply node. Each of the first and second diodes is capable of withstanding an ESD impulse.

Abstract: A method and apparatus for storing a disk drive media defect table or list. Defect table entries for a subject disk track are stored on the subject track and retrieved for determining defective sectors only when the subject track is accessed for a data read or write operation.

Abstract: Various embodiments of the present invention provide systems and methods for media defect detection. For example, a data transfer system is disclosed that includes a data detector, a defect detector and a gating circuit. The data detector provides a soft output, and the defect detector is operable to receive the soft output and the data signal, and to assert a defect indication based at least in part on the soft output and the data signal. The gating circuit is operable to modify the soft output of the detector whenever the defect indication is asserted.

Abstract: A method of using an intercom on a cordless telephone during an active call. The active call is put on hold while the intercom is in use. Once the call is re-activated, the intercom is shut off. This system may be designed for a cordless telephone with one handset or a plurality of handsets.

Abstract: Various embodiments of methods of designing an integrated circuit (IC). One embodiment of one such method includes: (1) generating a functional design for the IC, (2) determining performance objectives for the IC, (3) determining an optimization target voltage for the IC, (4) determining whether the IC needs voltage scaling to achieve the performance objectives at the optimization target voltage and, if so, whether the IC is to employ static voltage scaling or adaptive voltage scaling, (5) using the optimization target voltage to implement a layout from the functional IC design that meets the performance objectives and (6) performing a timing signoff of the layout at the optimization target voltage.

Abstract: Various embodiments of the present invention provide systems, methods and media formats for efficiently determining a position error of a head in relation to a storage medium. In one case, a system is disclosed that includes a storage medium with a series of data. The series of data includes a first defined marker and a second defined marker located a distance from the first defined marker, and position location data. The systems further include a first detector circuit that is operable to detect the first defined marker and to establish a location of the first defined marker, and a second detector circuit that is operable to detect the second defined marker and to establish a location of the second defined marker. The systems further include an error calculation circuit and an interpolation circuit. The error calculation circuit is operable to calculate an interpolation offset based at least in part on the location of the first defined marker and the location of the second defined marker.

Abstract: An electronic device includes a semiconductor substrate and a dielectric layer over the substrate. A resistive link located over the substrate includes a first resistive region and a second resistive region. The first resistive region has a first resistivity and a first morphology. The second resistive region has a second resistivity and a different second morphology.

Abstract: An electronic device includes a metallic conducting lead having a surface. A pre-solder coating over the surface consists essentially of tin and one or more dopants selected from Al or a rare earth element.

Abstract: A method of isolating piezoelectric thin film acoustic resonator devices to prevent laterally propagating waves generated by the device from leaving the device and/or interfering with adjacent devices or systems. Specifically, this isolation technique involves the manipulation or isolation of the piezoelectric material layer between the acoustic resonator devices, in an effort to limit the amount of acoustic energy which propagates in a lateral direction away from the device. In one aspect, at least a portion of the piezoelectric material not involved in signal transmission by transduction between RF and acoustic energy is removed from the device. In another aspect, the growth a piezoelectric material is limited to certain regions during fabrication of the device. In a further aspect, the crystal orientation of the piezoelectric material is disrupted or altered during device fabrication so as to form regions having excellent piezoelectric properties and regions exhibiting poor piezoelectric characteristics.

Abstract: Various embodiments of the present invention provide systems, methods and media formats for efficiently determining a position error of a head in relation to a storage medium. In one case, a system is disclosed that includes a storage medium with a series of data. The series of data includes a first defined marker and a second defined marker located a distance from the first defined marker, and position location data. The systems further include a first detector circuit that is operable to detect the first defined marker and to establish a location of the first defined marker, and a second detector circuit that is operable to detect the second defined marker and to establish a location of the second defined marker. The systems further include an error calculation circuit and an interpolation circuit. The error calculation circuit is operable to calculate an interpolation offset based at least in part on the location of the first defined marker and the location of the second defined marker.

Abstract: Proximity regulation systems for use with a portable cell phone and portable cell phones are disclosed. In one embodiment, the portable cell phone includes: (1) an operation mode input or circuit and (2) means for determining a transmit power level of the portable cell phone based on the operation mode input or circuit.

Abstract: Various embodiments of the present invention provide systems and methods for detecting storage medium defects. As one example, a media defect detection system is disclosed that includes a data detector circuit that applies a detection algorithm to the data input and provides a hard output and a soft output. A first circuit combines a first derivative of the hard output with a derivative of the data input to yield a first combined signal. A second circuit combines a second derivative of the hard output with a derivative of the first combined signal to yield a second combined signal. A third circuit combines a derivative of the soft output with the second combined signal and a threshold value to yield a defect signal.

Abstract: Various embodiments of the present invention provide systems and methods for determining fly height.

Abstract: In a system comprising a plurality of processors and a memory shared by at least a subset of the processors, a method for processing video data includes the steps of: (a) a first one of the processors receiving a first video frame and storing the first video frame in the memory; (b) the first one of the processors receiving at least a second video frame, receipt of the second video frame initiating a release of the first video frame from the memory; (c) the first one of the processors sending the first and second video frames to a second one of the processors together for processing by the second one of the processors; (d) the second one of the processors generating an output video frame based at least on the first and second video frames; (e) storing the output video frame in the memory by overwriting an available memory location therein, the output video frame becoming a new first video frame; and (f) repeating steps (b) through (e) until all video frames to be processed have been received.

Abstract: Various embodiments of the present invention provide systems, methods and media formats for efficiently determining a position error of a head in relation to a storage medium. In one case, a system is disclosed that includes a storage medium with a series of data. The series of data includes a first defined marker and a second defined marker located a distance from the first defined marker, and position location data. The systems further include a first detector circuit that is operable to detect the first defined marker and to establish a location of the first defined marker, and a second detector circuit that is operable to detect the second defined marker and to establish a location of the second defined marker. The systems further include an error calculation circuit and an interpolation circuit. The error calculation circuit is operable to calculate an interpolation offset based at least in part on the location of the first defined marker and the location of the second defined marker.