Patents Assigned to Agilent Technologies
  • Patent number: 6983443
    Abstract: A clock driver placement system and method are provided to place clock drivers in a standard cell block. In accordance with one aspect of the invention, a system is provided for placing clock drivers in a standard cell block. The system operates using logic that establishes an initial clock driver placement pattern, and logic that determines a number of clock drivers needed in the standard cell block to comply with a time specification. The system also includes a logic that adds clock drivers to the standard cell block using the initial clock driver placement pattern. In accordance with another aspect of the invention, a method establishes an initial clock driver placement pattern and determines a number of clock drivers needed in the standard cell block to comply with a time specification. Then, the clock drivers are added to the standard cell block using the initial clock driver placement pattern.
    Type: Grant
    Filed: May 22, 2002
    Date of Patent: January 3, 2006
    Assignee: Agilent Technologies, Inc.
    Inventors: Ryan Matthew Korzyniowski, Troy Horst Frerichs
  • Patent number: 6982437
    Abstract: A package for a surface-emitting laser encloses the die between a sub-mount and a cap. The sub-mount and the cap can be formed using wafer processing techniques that permit a wafer level packaging process which attaches multiple die to a sub-mount wafer, attaches caps either separated or as part of a cap wafer to the sub-mount wafer, and cuts the structure to separate individual packages. The cap includes a transparent plate that can be processed to incorporate an optical element such as a lens. An alignment post attached to the cap indicates the position of an optical signal from the laser and fits snugly into one end of a sleeve while an optical fiber connector fits into the other end.
    Type: Grant
    Filed: September 19, 2003
    Date of Patent: January 3, 2006
    Assignee: Agilent Technologies, Inc.
    Inventors: Kendra Gallup, Brenton A. Baugh, Robert E. Wilson, James A. Matthews, James H. Williams, Tak Kui Wang
  • Patent number: 6982550
    Abstract: A solution to the problem of broken micro-browser probe assemblies caused by the accidental application of excessive force is to manufacture the rods out of a material that resists forces found in normal usage and appears stiff, but that will abruptly deform harmlessly under less force than causes permanent damage to other elements of the micro-browser. The sudden deformation serves as a signal to the operator to stop being a gorilla. That leaves the problem of re-shaping the rod. A preferred solution is to use as the rod a Nitinol superelastic metal wire that automatically returns to its previous shape once the force causing deformation is removed. An alternate solution is to make the rod from a length of Nitinol “memory metal” wire that restores itself to a pre-set shape upon the application of mild heat, such as immersion in a cup of hot water from an office coffee machine. The small circuit board and its components are not bothered by the bath.
    Type: Grant
    Filed: June 13, 2005
    Date of Patent: January 3, 2006
    Assignee: Agilent Technologies, Inc.
    Inventor: James E. Cannon
  • Patent number: 6982575
    Abstract: A clock ratio data synchronizer is provided that utilizes a plurality of flip flops to synchronize data received by the synchronizer from first clock domain logic at a first clock frequency to a clock frequency of second clock domain logic. Each flip flop is capable of sampling data only on an edge of a clock and outputting data only on an edge of the clock. By utilizing flip flops in the synchronizer, data values are only allowed to change on clock edges. This, in turn, greatly improves clock skew tolerance, and also setup time margins for the first clock domain logic and for the second clock domain logic.
    Type: Grant
    Filed: January 30, 2002
    Date of Patent: January 3, 2006
    Assignee: Agilent Technologies, Inc.
    Inventor: Gayvin E Stong
  • Patent number: 6980015
    Abstract: An interface board for probing a device under test having a having an array of connection points on a back side of a board to which the device under test is attached. The interface board is constructed upon a stiff layer having a plurality of pass throughs from a first side to a second side in a pattern matching the array of connection points on the board to which the device under test is attached. An array of pads are formed on a first side of the interface board, each pad having a controlled surface associated with one of the pass throughs.
    Type: Grant
    Filed: June 17, 2003
    Date of Patent: December 27, 2005
    Assignee: Agilent Technologies, Inc.
    Inventor: Kenneth William Johnson
  • Patent number: 6979789
    Abstract: Disclosed is a switch having first and second mated substrates defining therebetween a number of cavities. A plurality of wettable surfaces is deposited in one or more of the cavities. A switching fluid, held within one or more of the cavities, serves to connect and disconnect at least a pair of the wettable surfaces in response to forces that are applied to the switching fluid. The wettable surfaces are formed at least in part of a material that does not form alloys with the switching fluid.
    Type: Grant
    Filed: March 21, 2005
    Date of Patent: December 27, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: Kuixiang Ma, John Ralph Lindsay
  • Patent number: 6980915
    Abstract: A system and method compensate for phase noise of a spectrum analyzer based on an established model of the phase noise that accommodates a variety of operating states of the spectrum analyzer. The model is used to form an array that is applied to extract an output signal from measurement traces that are acquired by the spectrum analyzer.
    Type: Grant
    Filed: March 23, 2004
    Date of Patent: December 27, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: Joseph M. Gorin, Philip Ivan Stepanek
  • Patent number: 6979597
    Abstract: A gasket encloses a hermetically sealed environment between a cap wafer and a base wafer. The gasket is bonded to the base wafer using bonding material. The bonding material can be one or more of many substances that exhibit acceptable adhesion, sealing, and other properties that ensure a hermetically sealed environment. The gasket is carved out from the cap wafer material itself. The cap wafer is typically made of extremely strong and rigid material such as silicon. Since the gasket is made from the cap wafer, the gasket itself is also extremely strong and rigid.
    Type: Grant
    Filed: July 8, 2003
    Date of Patent: December 27, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: Frank S Geefay, Qing Gan, Ann Mattos, Domingo A Figueredo
  • Patent number: 6980943
    Abstract: A method and system for generating a synchronous sequence of vectors from information originating within an asynchronous environment is disclosed. A simulated asynchronous sequence is synchronized by extracting a state at each clock period to generate a simulation synchronous sequence. This sequence is manipulated first to include short delays for generating an asynchronous short-delay sequence and second to include long delays for generating an asynchronous long-delay sequence. An overlay is separately performed among the clock periods of the asynchronous short-delay sequence and the asynchronous long-delay sequence to respectively identify a first interval and a second interval. The first interval and the second interval are independently duplicated in successive clock periods to respectively generate a synchronous short-delay sequence and a synchronous long-delay sequence.
    Type: Grant
    Filed: December 13, 2001
    Date of Patent: December 27, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: Robert C. Aitken, Stuart L. Whannel, Jian-Jin Tuan
  • Patent number: 6980932
    Abstract: RF spectrum and FM characteristics of an SSC clock signal are measured with a high speed single-bit test channel that can be present in the Agilent 93000 SOC System. The SSC clock of interest is applied to one of the high-speed single-bit test channels. A conventional FFT is performed on the captured data to discover the aggregate nature of the distributed spectral components, which can then be compared with associated specifications. The captured data is applied to another algorithm to find the FM modulation profile. That algorithm involves operating on captured digital data to perform a frequency translation operation a first filtering operation, a discrete differentiation operation that includes raw phase extraction, followed by a second filtering operation. The algorithm for finding the SSC modulation profile does not require the high-speed digital channel to meet Nyquist sampling requirement.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: December 27, 2005
    Assignee: Agilent Technologies, Inc.
    Inventor: Jinlei Liu
  • Patent number: 6977720
    Abstract: Characterizing active and passive properties of an optical device involves applying a local oscillator signal to a device under test (DUT) and providing a portion of the local oscillator signal (referred to as the reference local oscillator signal) directly to the an optical analyzer. Providing the reference local oscillator signal to the optical analyzer enables interferometric measurements associated with the DUT to be obtained along with direct measurements, where the interferometric measurements result from combining the portion of the local oscillator signal that is applied to the DUT with the reference local oscillator signal. The interferometric measurements are used to characterize passive properties of the DUT while the direct measurements are used to characterize active properties of the DUT.
    Type: Grant
    Filed: August 5, 2003
    Date of Patent: December 20, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: Douglas M. Baney, Gregory D. VanWiggeren
  • Patent number: 6977645
    Abstract: A portable electronic device includes a menu display having a plurality of menu items, and a menu item pointer movable by a user to highlight particular menu items. The portable electronic device includes a motion sensor for sensing relative movement between the portable electronic device and an imaging surface. The motion sensor is configured to generate a first set of movement data indicating a first relative movement between the portable electronic device and the imaging surface. The motion sensor is configured to generate a second set of movement data indicating a second relative movement between the portable electronic device and the imaging surface. A controller is configured to move the menu item pointer based on the first set of movement data to highlight a first menu item. The controller is configured to select the first menu item based on the second set of movement data.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: December 20, 2005
    Assignee: Agilent Technologies, Inc.
    Inventor: Michael John Brosnan
  • Patent number: 6977538
    Abstract: A delay unit for providing an output signal delayed by a delay time with respect to a periodic signal received at its input, the delay unit comprises a first delay cell adapted to receive the periodic signal and to provide as output a first delayed signal corresponding to the input periodic signal but delayed by a variable first delay time. A selection unit receives the first delayed signal and a second signal derived from the periodic signal. A control unit controls the selection unit in order to select one of the first delayed signal and the second signal as the output signal of the delay unit, and further controls the first delay time of the first delay cell.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: December 20, 2005
    Assignee: Agilent Technologies, Inc.
    Inventor: Joachim Moll
  • Patent number: 6977562
    Abstract: A passive interface circuit for coupling an output signal from a power amplifier to a load is disclosed. The interface presents an impedance to the power amplifier that increases as the power level in the output signal decreases. In one embodiment, the interface circuit includes a fixed network and a capacitor having a capacitance that varies with the potential across the capacitor. The fixed network couples the output signal to the load. The capacitor is connected in parallel with the load and has a capacitance that increases in response to an increase in potential across the capacitor. The capacitor is preferably a MEM capacitor having plates that move with respect to one another in response to changes in the average potential difference between the plates.
    Type: Grant
    Filed: September 19, 2002
    Date of Patent: December 20, 2005
    Assignee: Agilent Technologies, Inc.
    Inventor: Chul Hong Park
  • Patent number: 6978406
    Abstract: A memory array test system and method provides for testing a memory array in a manufactured chip. In accordance with one aspect of the invention, a system includes memory test input logic that acquires test data via a data port, a memory test enable logic and a memory test output logic. In accordance with another aspect of the invention, a method acquires test data via a data port, writes the test data to a memory address in the memory array, and reads output data from the memory address in the memory array. Then, the method compares the test data and the output data to determine if the memory address in the memory array passes a test.
    Type: Grant
    Filed: May 24, 2002
    Date of Patent: December 20, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: Gayvin E Stong, Jeffrey Thomas Robertson
  • Patent number: 6977985
    Abstract: An x-ray laminography imaging system and a positioning system to be used therewith. The positioning system is configured to move the object in the X, Y and Z-directions (i.e., pitch and roll) to ensure that the object planes of the object that are being imaged are at least substantially parallel to the focal plane of the imaging system. The object is positioned so that object planes associated with the X, Y and Z-coordinates of points along the contour of the surface of the object are at least substantially parallel to the focal plane of the imaging system during imaging of the object plane. Because some objects, such as printed circuit boards, for example, are sometimes warped, by ensuring that the object plane being imaged is at least substantially parallel to the focal plane of the imaging system, precise laminographs are obtained.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: December 20, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: David D Bohn, Donald R Nohavec, Barry Eppler
  • Patent number: 6978457
    Abstract: A method for replacing finite state machine hardware implementations of controllers and controller subcomponents with implementations based on manipulating contexts stored within common data structures, such as linked lists, and an outbound sequence manager subcomponent of a fibre channel interface controller implemented by this method. A state transition diagram is analyzed to define managers within the controller, along with commands received by, and generated by, each manager. Data structures are chosen for each manager to store contexts representing tasks currently operated on by the manager. An additional manger and interface are designed for a data-structure-manipulation manager. Finally, the operations performed by the managers are defined and implemented, with sequencing of operations controlled by transfer of contexts between data structures by the data-structure-manipulation manager.
    Type: Grant
    Filed: January 31, 2000
    Date of Patent: December 20, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: Manraj Singh Johl, Joseph Harold Steinmetz, Matthew Paul Wakeley
  • Patent number: 6978068
    Abstract: An optical subassembly includes a substrate, a group of solder features on the substrate, a die on the substrate, and a cap on the substrate and over the die. The cap includes (1) a lens over the die and (2) an inner or outer surface that snap-fits to the solder features.
    Type: Grant
    Filed: May 6, 2004
    Date of Patent: December 20, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: Robert E. Wilson, Brenton A. Baugh
  • Patent number: 6977936
    Abstract: Service detail records (SDRs) are generated for at least two layers in a stack of protocols used in a communications network, where protocol data units (PDUs) for a lower-level protocol encapsulate PDUs for a higher-level protocol. SDRs for the higher-level protocol include pointers to SDRs for connections at the lower level which encapsulate PDUs from which the higher-level SDRs were generated.
    Type: Grant
    Filed: April 14, 2000
    Date of Patent: December 20, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: Simon Love, Brian Woodroffe
  • Patent number: 6975176
    Abstract: In one embodiment, the present invention provides a system including a varactor and a voltage generator. The varactor includes a set of substantially equal voltage-tunable capacitor cells, each having a capacitive range that varies with a first plurality of operating parameters and each providing a capacitance within the range based on a voltage level of a reference voltage. The voltage generator is configured to provide the reference voltage, wherein the voltage level of the reference voltage corresponds to a desired capacitance within the capacitive range and varies based on a second plurality of operating parameters which are substantially the same as the first plurality of operating parameters, and wherein the voltage level of the reference voltage causes each capacitor cell to provide the desired capacitance.
    Type: Grant
    Filed: November 20, 2003
    Date of Patent: December 13, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: Alvin Leng Sun Loke, Robert Keith Barnes