Patents Assigned to Agilent Technologies
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Patent number: 6777630Abstract: An efficient way to fabricate the channels and cavities in a LIMMS device is to form them as matching upper and lower portions each created as a patterned layer of thick film dielectric material deposited on a respective upper or lower substrate. The two portions are adhered together by a patterned layer of adhesive, and hermetically sealed around an outer perimeter. The heater resistors are mounted atop the lower layer, thus suspending them away from that substrate and exposing more of their surface area. Vias can be used to route the conductors for the heaters and the switched signal contacts through the lower substrate to cooperate with surface mount techniques using solder balls on an array of contact pads. These vias can be made hermetic by their placement within the patterned layers of dielectric material and by covering their exposed ends with pads of hermetic metal.Type: GrantFiled: April 30, 2003Date of Patent: August 17, 2004Assignee: Agilent Technologies, Inc.Inventors: Lewis R Dove, Paul Thomas Carson, John F Casey, Marvin Glenn Wong
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Patent number: 6778577Abstract: Controlling or stabilising the lasing wavelength of a source of laser radiation, wherein the source of laser radiation comprises a semiconductor material laser, a substrate to which the laser is mounted, a resonant optical cavity within the semiconductor material, the cavity having an active medium for generating laser radiation and one or more gaps in the semiconductor material within the cavity, wherein the substrate is deformable by the application of a mechanical stress to vary the size of the gap(s) in order to change the optical size of the gap(s) and hence to vary the wavelength of laser radiation generated by the semiconductor laser.Type: GrantFiled: January 21, 2003Date of Patent: August 17, 2004Assignee: Agilent Technologies, Inc.Inventors: Richard Mark Ash, Christopher Anthony Park
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Patent number: 6778310Abstract: Optical pulses at a given repetition rate (f) are obtained by modulating an optical signal by means of a Mach-Zehnder modulator. The modulator is driven by means of a driving signal including, in addition to a sinusoidal component at a frequency (f/2) half the repetition rate (f) of the pulses, at least one odd harmonic of the sinusoidal component. Very short optical pulses can thus be generated without giving rise to undesired side effects such as ringing in pulse tails.Type: GrantFiled: August 8, 2002Date of Patent: August 17, 2004Assignee: Agilent Technologies, Inc.Inventor: Mario Puleo
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Patent number: 6777263Abstract: A method for forming a wafer package includes forming a die structure, wherein the die structure includes a first wafer, a device mounted on the first wafer, a second wafer mounted atop the first wafer with a first seal ring around the device and a second seal ring around a via contact. The method further includes forming a trench in the second wafer around the first seal ring, filling the trench and the via contact with a sealing agent, patterning a topside of the second wafer to removed the excessive sealing agent and to expose a contact pad of the via contact, and singulating a die around the first seal ring.Type: GrantFiled: August 21, 2003Date of Patent: August 17, 2004Assignee: Agilent Technologies, Inc.Inventors: Qing Gan, Richard C. Ruby, Frank S. Geefay, Andrew T. Barfknecht
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Patent number: 6777267Abstract: A method for separating dies on a wafer includes etching channels around the dies on a first side of the wafer, mounting the first side of the wafer to a quartz plate with an UV adhesive, and grinding a second side of the wafer until the channels are exposed on the second side of the wafer. At this point, the dies are separated but held together by the UV adhesive on the quartz plate. The method further includes mounting a second side of the wafer to a tack tape, exposing UV radiation through the quartz plate to the UV adhesive. At this point, the UV adhesive looses its adhesion so the dies are held together by the tack tape. The method further includes dismounting the quartz plate from the first side of the wafer and picking up the individual dies from the tack tape.Type: GrantFiled: November 1, 2002Date of Patent: August 17, 2004Assignee: Agilent Technologies, Inc.Inventors: Richard C. Ruby, Frank S. Geefay, Cheol Hyun Han, Qing Gan, Andrew T. Barfknecht
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Patent number: 6778740Abstract: Fiber optic alignment methods and apparatus in accordance with the present invention first identify a target beam width incidence on an end of an optical element. The end of the optical element is placed into a beam of light at an axial location relative to the beam of light. The end of the optical element is subsequently moved transversally (perpendicular) to the beam of light until a position of maximum optical power, as measured through the optical element, is identified. A beam width of the beam of light is measured at that axial location. The movement and measurement sequence is repeated at multiple axial locations relative to the beam of light. Linear regression, or an equivalent approach is used, to predict an axial location relative to the beam of light with the target beam width. The end of the optical element is then moved to the axial location with the target beam width.Type: GrantFiled: July 31, 2002Date of Patent: August 17, 2004Assignee: Agilent Technologies, Inc.Inventors: John Bernard Medberry, Benno Guggenheimer
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Patent number: 6779140Abstract: A Test Station for a memory tester is comprised of one or more Test Sites that are each individually algorithmically controllable, that can each deal with as many as sixty-four channels, and that can be bonded together to form a Multi-Site Test Station of two or more Test Sites. Up to nine Test Sites can be bonded together as a single Multi-Site Test Station. Bonded Test Sites still operate at the highest speeds they were capable of when not bonded. To bring this about it is necessary to implement certain programming conventions and to provide certain housekeeping functions relating to simultaneous starting of separate test programs on the bonded Test Sites, and relating to propagation and synchronization of test program qualifier results among those separate test programs.Type: GrantFiled: June 29, 2001Date of Patent: August 17, 2004Assignee: Agilent Technologies, Inc.Inventors: Alan S Krech, Jr., Edmundo De La Puente, Joel Buck-Gengler
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Patent number: 6777782Abstract: A transistor and method for making the same are disclosed. The transistor is constructed from a collector layer, a base layer, and an emitter layer in a stacked arrangement. The emitter layer is etched to form a mesa on an etched surface, the mesa having a top surface that includes a portion of the emitter layer and an emitter contact and sides joining the top surface with the etched surface. First and second protective layers are then deposited over the emitter contact and etched surface and the portions of these layers that overlie the etched surface are removed. The first protective layer is then preferentially etched thereby undercutting a portion of the first protective layer on the sides of the mesa and creating an overhanging portion of the second protective layer that is utilized to align the deposition of the base contacts.Type: GrantFiled: February 13, 2003Date of Patent: August 17, 2004Assignee: Agilent Technologies, Inc.Inventor: Gilbert K. Essilfie
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Patent number: 6778125Abstract: A dual path analog-to-digital conversion method and system. The system includes a first and second circuits. The first and second circuits each convert an input analog signal into digital signals at differing sample rates. The circuit having the slower sampling rate aliases frequency components of the input analog signal that are higher than half that sampling rate. Frequency components causing the aliasing in the slower sampling circuit are replicated from the faster sampling circuit at the appropriate amplitude, folded into the aliased frequency, and subtracted from the output of the slower sampling circuit. The outputs of both sampling circuits are then merged. These techniques extend the bandwidth of the slower conversion system without degrading the low-frequency accuracy of the slower conversion system.Type: GrantFiled: November 20, 2003Date of Patent: August 17, 2004Assignee: Agilent Technologies, Inc.Inventors: Brian Stewart, Ronald L. Swerlein
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Patent number: 6777665Abstract: An apparatus for converting an input optical signal to an electrical signal. The input optical signal is characterized by a modulation frequency and a modulation wavelength. The apparatus includes a photoconductive switch that is coupled to a photodetector by a common electrode. The photoconductive switch samples the output of the photodetector and is actuated by a switch light signal. The photoconductive switch and the photodetector are arranged such that the switch light signal does not interfere with the optical signal at locations proximate to the electrode and the electrode has a length that is less 0.5 mm.Type: GrantFiled: July 16, 2002Date of Patent: August 17, 2004Assignee: Agilent Technologies, Inc.Inventors: Akira Mizuhara, Norihide Yamada, Yasuhisa Kaneko
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Patent number: 6773276Abstract: A device for measuring and/or testing of components of optical and/or electrical networks includes a casing and an optical and/or electrical connection jack attached to the casing, to which an optical and/or electrical lead can be connected directly or indirectly via an adapter, wherein a lift device is provided, with which the connection jack can be moved relative to the casing between a lifted position and a lowered position.Type: GrantFiled: February 8, 2002Date of Patent: August 10, 2004Assignee: Agilent Technologies, Inc.Inventors: Jochen Ziegler, Ralf Haefner, Alf Clement
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Patent number: 6775002Abstract: An apparatus and method for absorbance detection in instrumental situations which have short absorption path lengths, such as microchip type devices, includes modulating the sample beam incident upon a sample cell to improve the sensitivity of the absorbance measurement. The modulation means includes a scanning device arranged to move the sample beam from a first position in which the sample beam is incident upon the sample area to a second position in which the sample beam is incident upon the cell.Type: GrantFiled: August 23, 2001Date of Patent: August 10, 2004Assignee: Agilent Technologies, Inc.Inventor: Bernd Nawracala
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Patent number: 6773930Abstract: The present invention is directed to a method of forming an FeRAM integrated circuit, which includes forming a TiAlON bottom electrode diffusion barrier layer prior to formation of the bottom electrode layer in an FeRAM capacitor stack. Subsequently, when performing the capacitor stack etch, the portion of the TiAlON diffusion barrier layer not covered by the FeRAM capacitor stack is etched substantially anisotropically due to the oxygen within the TiAlON diffusion barrier layer substantially preventing a lateral etching thereof. In the above manner, an undercut of the TiAlON diffusion barrier layer under the FeRAM capacitor stack is prevented. In another aspect of the invention, a method of forming an FeRAM capacitor comprises forming a multi-layer bottom electrode diffusion barrier layer. Such formation comprises forming a TiN layer over the interlayer dielectric layer and the conductive contact and forming a diffusion barrier layer thereover.Type: GrantFiled: November 26, 2002Date of Patent: August 10, 2004Assignees: Texas Instruments Incorporated, Agilent Technologies, Inc.Inventors: Scott R. Summerfelt, Sanjeev Aggarwal, Tomojuki Sakoda, Chiu Chi, Theodore S. Moise, IV
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Patent number: 6775646Abstract: A method utilizes time-domain measurements of a nonlinear device to produce or extract a behavioral model from embeddings of these measurements. The resulting behavioral model of the nonlinear device is a black-box model that accommodates nonlinear devices with one or more input ports and one or more output ports. The black-box model is a functional form that is a closed form function of input variables that produces an output as opposed to a structural form. The method of producing a behavioral model comprises the steps of applying an input signal to the nonlinear device, sampling the input signal to produce input data, measuring a response of the device to produce output data, creating an embedded data set, fitting a function to the embedded data set, and verifying the fitted function. The method may apply a CDMA type input signal in the step of applying, and/or may fit a novel radial basis function in the step of fitting a function. The input signal is constructed from a single CDMA signal representation.Type: GrantFiled: February 23, 2000Date of Patent: August 10, 2004Assignee: Agilent Technologies, Inc.Inventors: Nicholas B. Tufillaro, David M. Walker
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Patent number: 6774671Abstract: The addition of an array of transistors through areas of the circuit where active devices normally don't exist, such as under routing channels. By connecting this array of transistors such that the gates are tied to one power supply and the sources and drains to another, the transistors act as bypass capacitors between the power supplies and act to reduce noise on the supplies. Also, the transistors may later be reconnected through changes in the design to form diodes, inverters, buffers, or other logic gates to allow changes to the circuit late in the design cycle.Type: GrantFiled: April 5, 2001Date of Patent: August 10, 2004Assignee: Agilent Technologies, Inc.Inventor: James O. Barnes
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Patent number: 6774351Abstract: A surface having specular regions shaped to reflect incident light toward an optical sensor provides an ideal surface to be scanned by an optical mouse. When light is shined upon the surface, the reflections off of the specular regions appear as white points in the image acquired by the optical sensor, which gives the optical sensor the distinguishing characteristics it needs to differentiate between images. Since the specular regions reflect light so well, less light is needed to obtain an image, and power is conserved. The surface appears as a dark background in the image, providing contrast to the light reflecting off the specular regions. To protect the specular regions, an optically transparent coating can be layered on top of the surface. An alternative surface that may be easier to manufacture is a light colored surface dotted with darker colored regions.Type: GrantFiled: May 25, 2001Date of Patent: August 10, 2004Assignee: Agilent Technologies, Inc.Inventor: Robert Arthur Black
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Patent number: 6775634Abstract: An improved apparatus and method for tuning a device under test uses a spider diagram-like chart that provides the operator with visual cues as to the tuning status of a device under test (DUT). The spider diagram may be displayed on a graphical user interface (GUI), along with various adjustment points or potentiometers. The spider diagram includes a unit circle that represents the acceptable bounds for each measured parameter. Overlaying the unit circle is a polygon of three or more sides, with a vertex of each angle of the polygon representing a measured parameter. The polygon changes shape as the various potentiometers are adjusted. When a measured parameter value is at the center of its allowable range, the vertex of the angle corresponding to that measurement lies near the center of the unit circle. When a measured parameter is at its upper or lower bound, the vertex lies on the unit circle.Type: GrantFiled: April 2, 2002Date of Patent: August 10, 2004Assignee: Agilent Technologies, Inc.Inventor: James Thomas Bachmann
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Patent number: 6775116Abstract: An apparatus and method are provided for preventing buffers used to reduce delays on long lines of an IC from being damaged due to charge that collects on the buffers during manufacturing. In accordance with the present invention, a protection diode is included directly in at least each buffer that is used for this purpose, i.e., for the purpose of preventing delays on long lines of the IC. By including a protection diode in at least each buffer that is used for this purpose, the present invention obviates the need for having to use tools during the IC design process to determine a suitable location for a protection diode.Type: GrantFiled: November 1, 2001Date of Patent: August 10, 2004Assignee: Agilent Technologies, Inc.Inventors: Paul D Nuber, Gayvin E Stong
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Patent number: 6774325Abstract: A fluid-based switch and method for producing the same are disclosed. In one embodiment, the switch is produced by depositing switching fluid on a first substrate; depositing a reducing material so that the reducing material contacts at least a portion of the switching fluid, the reducing material to react with oxides on the switching fluid, and mating a first substrate to a second substrate, the first substrate and the second substrate defining therebetween a cavity holding the switching fluid, the cavity being sized to allow movement of the switching fluid between first and second states.Type: GrantFiled: April 14, 2003Date of Patent: August 10, 2004Assignee: Agilent Technologies, Inc.Inventors: Marvin Glenn Wong, John Ralph Lindsey
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Patent number: 6773676Abstract: Array hybridization devices and methods for their use are provided. The subject devices are characterized by having a substantially planar bottom surface, a cover, at least one fluid port and at least one adjustable spacing element for adjusting the spacing between an array and the bottom surface. In using the subject devices, an array is placed on the at least one adjustable spacing element in the chamber and the space between the array and the bottom surface is adjusted by moving the at least one adjustable spacing element. The adjusted array is contacted with at least one biological sample introduced into the chamber. The subject inventions find use in a variety of array-based applications, including nucleic acid array hybridizations.Type: GrantFiled: June 19, 2001Date of Patent: August 10, 2004Assignee: Agilent Technologies, Inc.Inventor: Carol T. Schembri