Abstract: Integrated circuit structures comprising an embedded ferroelectric memory cell and methods of forming the same are described. These structures include a transistor level, a ferroelectric device level, a first metal level, an inter-level dielectric level and a second metal level. In a first embodiment, the ferroelectric device level is disposed over an isolation layer of the transistor level and an isolation layer of the ferroelectric level has one or more vias that are laterally sized larger than corresponding contact vias extending through the transistor isolation layer and aligned therewith. In a second embodiment, the first metal level and the ferroelectric device level are integrated into the same level. In a third embodiment, the ferroelectric device level is disposed over the first metal level. In a fourth embodiment, the ferroelectric device level is disposed over the inter-level dielectric level that, in turn, is disposed over the first metal level.

Abstract: Fluxless soldering processes use pressure variations and vented cavities within large-area solder joints to reduce void volumes and improve the properties of the large-area solder joints. The vents can be sealed after soldering if closed cavities are desired. A cavity can also improve hermeticity of a solder joint by providing an additional solder fillet around the cavity in addition to the solder fillet around the perimeter of the solder joint.

Abstract: An electrical rules checker system and method provides for correcting charge collector violations in a netlist. In accordance with one aspect of the invention, the electrical rules checker system includes a charge collector violation correction mechanism that includes a logic for analyzing the circuit configuration in a netlist, and a logic for identifying a charge collector violation in the circuit configuration. The charge collector violation correction mechanism further includes a logic for adding a charge collector diode to the netlist to correct the charge collector violation in the circuit configuration. In accordance with another aspect of the invention, a method analyzes the circuit configuration in a netlist, and identifies a charge collector violation in the circuit configuration. A charge collector diode is then added to the netlist to correct the charge collector violation in the circuit configuration.

Abstract: An improved coated phosphor filler for an optical device includes a plurality of individual phosphor filler particles, and a coating layer having a plastic substance coated on each of the phosphor filler particles.

Abstract: Spectrum estimates of unevenly spaced timestamped data collected over a network. Unevenly spaced data is not suitable for processing by traditional methods such as Fast Fourier Transforms. Spectrum estimates of timestamped data collected over a network are calculated using a Continuous Fourier Transform. If the time between samples is long, spectrum estimates may be computed incrementally.

Abstract: A testing unit for testing a data transfer and/or an addressing scheme in a bus-based system comprises a data generator for generating an expected data pattern and a comparator for comparing the expected data pattern with a data pattern received from a sending unit within the system. The data generator generates the expected data pattern in a defined relationship with the data generation of the data pattern received from the sending unit. Preferably, the defined relationship is an algorithmic relationship and can be based on the testing unit address.

Abstract: High quantum efficiency point detector system. The system includes a light source generating a light beam having an area and includes a CCD detector with a cell size comparable to the light beam area. The CCD cell may include a single pixel or at least two pixels.

Abstract: A memory such as a FeRAM implements accelerated fatigue operations that simultaneously change the storage state of large numbers of memory cells and can be rapidly repeated. In one embodiment, the FeRAM includes multiple segments with plate lines in each segment being isolated from plate lines in other segments. A first fatigue operation uses standard read/write decoding for word lines but simultaneously activates all segments. A second fatigue operation activates all segments and all plate lines and exercises one row of memory cells in each plate line group. A third fatigue operation is similar to the second but cycles through rows in the plate line groups so that a number of repetitions of the third fatigue operation equally fatigue every FeRAM cell.

Abstract: A filter is applied between a digital signal source and a signal receiver for providing compensation of droop caused in a transmission path between the signal source and the signal receiver. The filter provides a high pass characteristic substantially approximating or following in a relevant frequency range an attenuation function substantially proportional to e−k{square root over (f)} or—when denoting attenuation in dB—substantially proportional to the square root of the frequency.

Abstract: The present invention relates to a method of integrated circuit construction in which misaligned ports are linked via an alignment link made up of a wiring trace and signal buffer. The signal buffer and wiring trace are located within a common area of integrated circuit real estate.

Abstract: An optical fibre connector is moulded into a planar metallic body that is manipulated into a cuboid to form an rf-shielded optical connector.

Abstract: A display for an instrument includes a graphical display and a tabular display. On the graphical display is shown a plurality of traces. The tabular display lists, for each of at least a portion of the traces, a center point of interest to a user. Upon the user selecting a first center point for a first trace, the graphical display shows just the first trace. A horizontal span of the graphical display is adjusted to equal a preselected zoom span.

Abstract: A three-dimensional photonic crystal add-drop filter apparatus has a three-dimensional photonic crystal, a first waveguide for transmitting light having a frequency within a bandgap of the three-dimensional photonic crystal, and a second waveguide. A resonant cavity couples the light in the first waveguide to the second waveguide for extracting at least one wavelength of the light transmitted in the first waveguide and redirecting the extracted light to the second waveguide. The apparatus has a full three-dimensional bandgap and thus does not require total internal reflection to confine the light as is required in a two-dimensional photonic crystal slab. The waveguides can be made single mode such that only one polarization is allowed to propagate thus avoiding mixing of the two polarizations.

Abstract: A tandem heat sink operable to provide heat dissipation to one or more electronic components. The tandem heat sink apparatus creates air turbulence within the air stream across the one or more components through the use of pins oriented at more than one angle with respect to the base of the tandem heat sink. An airflow across one or more electronic components is disrupted by the geometry of the different pin angles of the tandem heat sink, thereby creating turbulence which increases the efficiency of the heat sink and prevents thermal shading from occurring. When the heat sink is placed on a single component, the heat sink may be situated without any overhang relative to the component due to the turbulence induced by the different pin angles and the resulting increase in heat dissipation efficiency.

Abstract: An active pixel sensor (APS) circuit which provides enhanced test and signal processing capabilities. APSs usually include pixel cells arranged in an array of rows and columns. Selectably enableable coupling conductors are provided between principal conductors in the array to permit a signal on one principal conductors to propagate to another principal conductors. The principal conductors include row, reset and column conductors. Signal propagation for testing purposes and for normal mode operation are disclosed.

Abstract: An electronic module (200) having a configuration (212) for promoting efficient heat dissipation and a circuit board assembly (202, 205, 206) are provided such that when said electronic module (200) is inserted within said circuit board assembly (202, 205, 206) a portion of said electronic module (200) overlaps an EMI shield (205), with said portion of said electronic module (200) having a configuration (212) for promoting efficient heat dissipation and being external of said EMI shield (205).

Abstract: Apparatus for providing a controllable impedance at a reference plane in a circuit comprises a unidirectional transmission line loop having first and second input/output terminals. The first input/output terminal is connected to the reference plane and an amplifier is located in the transmission line loop to amplify signals passing in a direction from the second input/output terminal to the first input/output terminal. A variable tuned circuit couples the second input/output terminal to a terminating device.

Abstract: The invention provides a laser structure that operates at a wavelength of 1.3 &mgr;m and at elevated temperatures and a method of making same. The laser structure includes a quantum well layer of InAsP. The quantum well layer is sandwiched between a first barrier layer and a second barrier layer. Each barrier layer exhibits a higher bandgap energy than the quantum well layer. Also, each barrier layer comprises Gax(AlIn)1−xP in which x 0. This material has a higher bandgap energy than conventional barrier layer materials, such as InGaP. The resulting larger conduction band discontinuity leads to improved high temperature performance without increasing the threshold current of the laser structure.

Abstract: A method of compressing a test vector creates a compressed test vector for use in conjunction with automated test equipment (ATE). The method comprises generating a test vector having a sequence of elements, at least one element of which comprises a ‘don't care’ value. A random sequence of elements is produced also. The test vector and the random sequence are segmented. Each segment of the test vector is compared to a corresponding segment of the random sequence to determine whether the corresponding segments match. When a match is found, a first flag value is sequentially inserted into a compression test vector. When a mismatch is found, a second flag value is sequentially inserted into the compression vector as well as the elements of the mismatched test vector segment. The compressed test vector may be decompressed according to the invention directly into a completely specified test vector using the flag values.