Patents Assigned to Agilent Technologies
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Patent number: 6429683Abstract: An apparatus and method of shifting a low-voltage-swing digital signal to a signal of the same polarity with a relatively higher voltage swing are described which eliminate static current consumption by way of a feedback circuit and a pull-up device. By the use of embodiments according to the invention, little power is consumed, and hot electron injection as a mechanism for FET degradation is of little concern. Additionally, no specialized reference voltage is necessary, and precise layout of the circuit is not critical to proper circuit performance.Type: GrantFiled: August 16, 2000Date of Patent: August 6, 2002Assignee: Agilent Technologies, Inc.Inventors: Darrin C. Miller, Brian C Miller
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Patent number: 6430230Abstract: In a method for encoding payload bits for transmission over communications link, data and control information are assembled into n-bit data words, where n is an even number and words for control information are constrained to have zero disparity (equal numbers of binary zero and one digits). The n-bit data words are then encoded into n+2-bit code words by adding a two-bit label; for words carrying control information the label has a value of 10. For other data words the disparity is evaluated; if it is zero, the label bits are 01; if the disparity is non-zero and opposite in sense to the running digital sum of the code words transmitted already, the label bits are 11; otherwise, the data word is inverted, and the label bits are 00.Type: GrantFiled: June 30, 1999Date of Patent: August 6, 2002Assignee: Agilent Technologies, Inc.Inventors: David George Cunningham, Alistair Neil Coles
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Publication number: 20020101251Abstract: For measuring a capacitance with high accuracy, a capacitance measuring apparatus includes a voltage source with a current limiting function for applying different voltage values to the capacitance, and an integrator capable of continuous integrating operation for repeatedly integrating a current flowing through the capacitance at given periodic intervals. There is also disclosed a capacitance measuring method that is carried out by the capacitance measuring apparatus.Type: ApplicationFiled: November 2, 2001Publication date: August 1, 2002Applicant: Agilent Technologies, Inc.Inventor: Akira Shimizu
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Patent number: 6427217Abstract: A system and method for testing an integrated circuit (IC) by using a boundary scan ring having registers coupled to a functional scan ring having registers within the integrated circuit in order to maximize test coverage, while minimizing test time. This is accomplished by shifting the boundary scan registers according to a clock signal while supplying data to the functional scan registers. The functional scan registers also supply data to the boundary scan registers. By appropriately interleaving input and output registers of the boundary scan ring, random data is supplied to the functional scan registers. This data may be scanned out of the boundary scan registers and compared with previously established test vectors in order to determine whether the device is performing as designed. Data may also be scanned out of the functional scan registers to augment the test coverage.Type: GrantFiled: April 15, 1999Date of Patent: July 30, 2002Assignee: Agilent Technologies, Inc.Inventor: Frederick J. Hartnett
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Patent number: 6423939Abstract: An apparatus having a heating circuit including a resistor layer and a patterned conductor layer is disclosed. The pattern defines a current path that includes at least one portion of the resistor layer. When current is applied to the current path, heat is generated in the portion of the resistor layer that is a part of the current path. The heat is used to reflow solder to connect two components such as an integrated circuit chip (IC) to a multi-chip module (MCM) module. This localized electric heating method may be used to package multiple chips on a module. The apparatus having the heating circuit may be fabricated by first depositing a resistor layer on to a substrate. Then, a conductor layer is deposited and etched to define the current path.Type: GrantFiled: October 2, 2000Date of Patent: July 23, 2002Assignee: Agilent Technologies, Inc.Inventor: Yaoling Pan
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Patent number: 6424628Abstract: The invention provides a method of identifying framing bits in order to correctly frame a test signal comprising a data payload in the form of a pseudo random binary sequence (PRBS), split into frames by a number of framing bits, after disruption and re-establishment of transmission of the test signal. The method comprises comparing the test signal to a comparison PRBS, and determining the position of the framing bits, or other non-payload data, based on the position of mismatches between the incoming test signal and the comparison PRBS. Errors may be deliberately introduced before transmission of the test signal, in a predetermined position relative to the non-payload data bits, so that analysis of the payload data is used to identify the framing elements.Type: GrantFiled: December 11, 1998Date of Patent: July 23, 2002Assignee: Agilent Technologies, Inc.Inventors: Colin Johnstone, William Ross MacIsaac
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Patent number: 6424765Abstract: An optical device includes an optical waveguide with a block that is fusion spliced to one end. The block has a refractive index approximately equal to the effective refractive index of the waveguide and is of such a length that substantially all the light exiting the waveguide propagates directly to the end of the block remote from the waveguide.Type: GrantFiled: September 16, 1996Date of Patent: July 23, 2002Assignee: Agilent Technologies, Inc.Inventor: Andrew Thomas Harker
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Patent number: 6424932Abstract: The spectral energy in the signal emitted by a mobile telephone handset is measured for portions of the signal carrying random data, both before and after a non-random midamble. By including both random portions in the measurement the time taken to perform it is approximately halved, whilst maintaining its statistical significance.Type: GrantFiled: July 8, 1999Date of Patent: July 23, 2002Assignee: Agilent Technologies, Inc.Inventor: Moray Denham Rumney
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Patent number: 6423120Abstract: A preferred sample introduction apparatus includes a wall that defines a channel, with the channel being configured to receive a sample and being adapted to engage in fluid communication with the separation column of a chromatographic apparatus. Preferably, a coating of semi-conductive material is arranged adjacent to at least a portion of the wall. Additionally, a heater controller is provided which electro-magnetically communicates with the coating. So configured, the coating, in response to receiving energy from the heater controller, increases in temperature, thereby increasing a temperature of the sample.Type: GrantFiled: July 17, 2000Date of Patent: July 23, 2002Assignee: Agilent Technologies, Inc.Inventors: Mark A. Nickerson, Clayton E. Law, Rich White
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Patent number: 6422886Abstract: Connector alignment apparatus may include a mounting plate and a first connector sized to engage a mating connector on a device under test. A connector biasing device is operatively associated with the mounting plate and the first connector. The connector biasing device allows the first connector to move with respect to the mounting plate as the first connector is engaged with the mating connector.Type: GrantFiled: October 27, 2000Date of Patent: July 23, 2002Assignee: Agilent Technologies, Inc.Inventors: Christopher S. Macbeth, Andrew S. Poulsen, Donald Kedrowski
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Patent number: 6423940Abstract: A temperature stabilization scheme reduces the effects of temperature variations on the performance of an electronic system that is implemented on a circuit board. In the temperature stabilization scheme, the circuit has an isolated region that is coupled to a remainder ofthe circuit board by one or more electrical pathways. Associated with each of the electrical pathways is an incidental thermal conduction path between the isolated region and the remainder of the circuit board. A temperature sensitive component ofthe electrical system is coupled to a mounting site on the isolated region and interfaces with the remainder of the circuit board through the one or more electrical pathways. A series of heaters, thermally coupled to the isolated region provides a compensating thermal profile that opposes thermal instability caused by the incidental thermal conduction paths, where the opposition is over a portion of the isolated region that includes at least the mounting site of the temperature sensitive component.Type: GrantFiled: March 2, 2001Date of Patent: July 23, 2002Assignee: Agilent Technologies, Inc.Inventor: Steven Schupbach
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Patent number: 6425034Abstract: A FC controller that interfaces between a host system and a 10-bit FC interface is herein described. The FC controller acts as both a FCP initiator and FCP target device and has the capability to receive and process SCSI I/O requests received from a FC and a host system. The FC controller can process both multiple inbound and outbound sequences simultaneously since it does not employ a processor-based architecture. Rather, the FC controller relies on specialized circuitry that can operate in a relatively independent manner so that multiple tasks are performed concurrently thereby achieving a faster throughput and data transfer rate.Type: GrantFiled: October 30, 1998Date of Patent: July 23, 2002Assignee: Agilent Technologies, Inc.Inventors: Joseph H. Steinmetz, Matthew P. Wakeley, Bryan J. Cowger, Michael I. Thompson
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Patent number: 6424237Abstract: A bulk acoustic resonator having a high quality factor is formed on a substrate having a depression formed in a top surface of the substrate. The resonator includes a first electrode, a piezoelectric material and a second electrode. The first electrode is disposed on the top surface of the substrate and extends beyond the edges of the depression by a first distance to define a first region therebetween. The piezoelectric material is disposed on the top surface of the substrate and over the first electrode, and the second electrode is disposed on the piezoelectric material. The second electrode includes a portion that is located above the depression. The portion of the second electrode that is located over the depression has at least one edge that is offset from a corresponding edge of the depression by a second distance to define a second region therebetween. The first and second regions have different impedances, as a result of the different materials located in the two regions.Type: GrantFiled: December 21, 2000Date of Patent: July 23, 2002Assignee: Agilent Technologies, Inc.Inventors: Richard C. Ruby, John D. Larson, III, Paul D. Bradley
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Patent number: 6420915Abstract: A signal comparison system determines whether a data signal is transitioning close to transitions of its clock signal, thereby causing possible errors in the sampling of the data signal. The signal comparison system includes a plurality of latches that receive a first signal and a second signal and that transmit a respective value of the first signal in response to a transition of the second signal. Delay mechanisms delay the transition of the second signal before the transition is received by latches so that the transition is delayed different amounts relative to each of the latches. A feedback mechanism receives the values transmitted by the latches and determines whether these values are logically equivalent. The feedback mechanism then transmits a feedback signal in response to a determination that one of the values is logically different than another of the values.Type: GrantFiled: March 15, 2001Date of Patent: July 16, 2002Assignee: Agilent Technologies, Inc.Inventor: Bruce A. Erickson
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Patent number: 6420878Abstract: An integrated circuit self-testing system that includes an integrated circuit connected to a circuit board. The integrated circuit includes an output. A connector is attached to the circuit board. A conductive trace of the circuit board electrically connects the output of the integrated circuit to the connector. The conductive trace includes a first section extending between the output of the integrated circuit and the connector of the circuit board, and a second section extending beyond the connector. The integrated circuit includes a pulse generator, that generates a pulsed voltage potential at the output. The integrated circuit further includes a pulse transient detector that detects transients in the voltage potential of the output due to a reflected pulse voltage potential received at the output, thereby indicating whether the connector is properly connected to the conductive trace.Type: GrantFiled: November 12, 1999Date of Patent: July 16, 2002Assignee: Agilent Technologies, Inc.Inventor: Kenneth F. Boorom
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Patent number: 6420180Abstract: A method, apparatus, and computer program products, for forming an addressable array on a substrate. In the method, for each of multiple addresses on the substrate, a reagent drop set is deposited during a cycle so as to attach a corresponding moiety for that address. The foregoing step is repeated as required, until the addressable array is formed. The reagent drop set deposited during one or more cycles for one or more of the multiple addresses includes, for a corresponding cycle and address, drops of a same reagent which are deposited from different deposition units during the same cycle.Type: GrantFiled: January 26, 2000Date of Patent: July 16, 2002Assignee: Agilent Technologies, Inc.Inventor: Jay K. Bass
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Patent number: 6421668Abstract: A method and system for applying arbitrary similarity metrics to data entities in order to partition the entities into subsets of related entities. The method and system iteratively construct successive subsets, during construction of each subset adding candidate entities, not yet assigned to a subset, with high affinities toward the subset and removing entities previously assigned to the subset for which the affinities toward the subset have decreased. The method and system efficiently partition data with a high probability of finding an optimal or near-optimal partitioning.Type: GrantFiled: August 5, 1999Date of Patent: July 16, 2002Assignee: Agilent Technologies, Inc.Inventors: Zohar H Yakhini, Amir Ben-Dor, Ron Shamir
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Patent number: 6420820Abstract: An acoustic resonator includes a ferromagnetic compensator which at least partially offsets temperature-induced effects introduced by an electrode-piezoelectric stack. The compensator has a positive temperature coefficient of frequency, while the stack has a negative temperature coefficient of frequency. By properly selecting the thickness of the compensator, temperature-induced effects on resonance may be neutralized. Alternatively, the thickness can be selected to provide a target positive or negative composite temperature coefficient of frequency. In the preferred embodiment, the compensator is formed of a nickel-iron alloy, with the most preferred embodiment being one in which the alloy is approximately 35% nickel and approximately 65% iron. In order to prevent undue electromagnetic losses in the ferromagnetic compensator, a metallic flashing layer may be added to at least partially enclose the compensator.Type: GrantFiled: August 31, 2000Date of Patent: July 16, 2002Assignee: Agilent Technologies, Inc.Inventor: John Dwight Larson, III
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Patent number: 6421823Abstract: A communications socket between a logic simulator and a system for generating input stimuli based on the current state of the logic simulator is provided. Input stimuli to the logic simulator for use in implementing a particular circuit design simulation are calculated by interfacing an input program which models the function of the circuit being designed with the logic simulator. The lines in this input program are converted by an adaptive vector generator into communications signals which are understandable by the logic simulator so that the desired simulation may take place. The input program thus enables the adaptive vector generator to behaviorally model complex logical systems that the logic simulator model is only a part of and allows for more accurate and detailed simulation. The adaptive vector generator does this by determining the next input vector state in accordance with the present state of the logic simulator model as received from the communications socket.Type: GrantFiled: October 27, 1995Date of Patent: July 16, 2002Assignee: Agilent Technologies, Inc.Inventor: Craig Heikes
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Patent number: 6421120Abstract: Optical wavelength reference apparatus with wide wavelength range. Illuminated by a wideband source, a first reference such as absorption lines in a gas cell is used as a transfer standard, calibrating the response of the secondary reference over the range of the first reference. The performance of the second reference is extrapolated to a wider wavelength range, retaining the stability and accuracy characteristics of the first reference. Suitable secondary devices include etalons such as Fabry-Perot filters and Mach-Zehnder interferometers.Type: GrantFiled: October 29, 1999Date of Patent: July 16, 2002Assignee: Agilent Technologies, Inc.Inventor: Kenneth R. Wildnauer