Abstract: An electrical contact that comprises a layer of a p-type gallium nitride material, a metal layer, and an intermediate layer of a material different from the gallium nitride material and the metal layer. The intermediate layer is sandwiched between the layer of p-type gallium nitride material and the metal layer. The material of the intermediate layer may be a Group III-V semiconductor that has high band-gap energy, lower than that of the p-type gallium nitride material. The intermediate layer may alternatively include layers of different Group III-V semiconductors. The layers of the different Group III-V semiconductors are arranged in order of their band-gap energies, with the Group III-V semiconductor having the highest band-gap energy next to the layer of the p-type gallium nitride material, and the Group III-V semiconductor having the lowest band-gap energy next to the metal layer. As a further alternative, the material of the intermediate layer may be a metal nitride.

Abstract: An electromagnetic probe is integrated within an integrated circuit or mounted within an IC package to provide a capability for testing continuity between the integrated circuit and a substrate to which the integrated circuit is mounted. In a first embodiment, capacitive test probes are integrated within the integrated circuit, underneath bonding pads. In a second embodiment, Hall-effect devices are integrated within the integrated circuit underneath bonding pads. In a third embodiment, an inductive loop is integrated within the integrated circuit underneath bonding pads. In a fourth embodiment, an IC package assembly includes an internal capacitive test probe for electrical continuity testing. An internal shield may also be used as a capacitive test probe. In a fifth embodiment, an IC package assembly includes an inductive loop within the package for electrical continuity testing.

Abstract: A locking assembly for releasably locking together a mating connector pair comprises a housing having a central aperture therethrough and adapted to be mounted to the first connector portion of the mating connector pair. A locking sleeve also having a central aperture is sized to receive the first connector portion and is also sized to be slidably received by the central aperture of the housing so that the locking sleeve can be rotated within the housing from a locked position to an unlocked position. The locking sleeve also includes a locking pin engaging boss for releasably engaging a locking pin associated with the second connector portion of the mating connector pair. Specifically, the locking pin engaging boss rotates the locking sleeve to the unlocked position as the first connector portion is engaged with the second connector portion. The locking pin engaging boss also allows the locking sleeve to be rotated to the locked position when the first and second connector portions are fully engaged.

Abstract: The architecture of the inventive correlator is, in a preferred embodiment, an array of correlation cells each containing a delay pipe, a math unit and an accumulator. An array of these correlation cells are tiled together to allow simultaneous processing by all cells. The array is disposed so that each cell accumulates an output value in a result surface. There is no electrical limit to the number of correlation cells that may be tiled together. A preferred embodiment uses nine cells tiled together into a 3.times.3 correlation result surface. Other embodiments have been tested in accordance with the present invention having twenty-five cells tiled together into a 5.times.5 correlation result surface. A stream of compare pixel values is presented to the array wherein each compare pixel value is presented to each cell concurrently. A reference memory supplies the appropriate reference pixel values to the cells to enable all calculations for that compare pixel value to be done concurrently.

Abstract: The inventive connection mechanism uses a tongue and groove connection in combination with a RF gasket. Fixture panels are constructed by placing the tongue of one panel into the groove of another panel. The gasket is pre-positioned in the groove, such that the tongue compresses the gasket to the manufacture's specified compression thickness. The panels can then be secured using fasteners. RF fixtures constructed with such connection mechanisms can be rapidly assembled. Moreover, the RF fixtures can be rapidly taken apart to allow for maintenance of the internal elements of the fixture. The use of the tongue and groove connection with the RF gasket provides an RF sealed connection. Thus, the fixture is not subject to interference from undesirable external RF signals.

Abstract: A probe tip for connecting an instrument to a circuit under test is disclosed. The probe tip is interchangeable with other probe tips to provide different attenuations of the signal under test to the instrument. The signal from the circuit under test is coupled to the instrument via a cable. The probe tips have a compensation network that cancels the effects of cable loss. The probe tips provide attenuation by using the probe tips internal impedance, and the characteristic impedance of the cable, to form a voltage divider.

Abstract: A sample inlet liner includes a novel matrix that serves to retain an injected sample. The preferred inert matrix is polytetrafluoroethylene (PTFE) that serves to retain an injected sample and is provided in lieu of a conventional packing material. The contemplated inert matrix may be selected from a range of configurations of PTFE so as to provide a supporting material capable of retaining an ample quantity of injected sample in the sample inlet liner. The contemplated matrix nonetheless provides a tortuous path for the retained quantity of injected sample so as to facilitate known injection techniques such as split/splitless injection and large volume injections.

Abstract: Miniaturized planar column devices are described for use in liquid phase analysis, the devices comprising microstructures fabricated by laser ablation in a variety of novel support substrates. Devices formed according to the invention include associated laser-ablated features required for function, such as analyte detection means and fluid communication means. Miniaturized columns constructed under the invention find use in any analysis system performed on either small and/or macromolecular solutes in the liquid phase and may employ chromatographic, electrophoretic, electrochromatographic separation means, or any combination thereof.

Abstract: An LED having a higher light coupling efficiency than prior art devices, particularly those based on GaN. An LED according to the present invention includes a substrate having a top surface, a first layer of a semiconducting material deposited on the top surface of the substrate, a light generation region deposited on the first layer, and a second layer of semiconducting material deposited on the first layer. Electrical contacts are connected to the first and second layers. In one embodiment, the top surface of the substrate includes protrusions and/or depressions for scattering light generated by the light generation region. In a second embodiment, the surface of the second layer that is not in contact with the first layer includes a plurality of protrusions having facets positioned such that at least a portion of the light generated by light generation layer strikes the facets and exits the surface of the second layer.

Abstract: An optical circulator having first, second, and third ports. The optical circulator includes a beam splitter and a plurality of Faraday stages. The beam splitter is connected to the first and third ports and separates a first light signal entering the first port into first and second outgoing light signals. The beam splitter also separates a second light signal entering the third port into third and fourth outgoing light signals. The first, second, third, and fourth outgoing light signals are spaced-apart from one another. The first and second outgoing light signals include, respectively, orthogonal polarization components from the first light signal, and the third and fourth outgoing light signals include, respectively, orthogonal polarization components from the second light signal. The Faraday stages, including a first Faraday stage and a last Faraday stage, being arranged in series.

Abstract: An electromagnetic probe is integrated within an integrated circuit or mounted within an IC package to provide a capability for testing continuity between the integrated circuit and a substrate to which the integrated circuit is mounted. In a first embodiment, capacitive test probes are integrated within the integrated circuit, underneath bonding pads. In a second embodiment, Hall-effect devices are integrated within the integrated circuit underneath bonding pads. In a third embodiment, an inductive loop is integrated within the integrated circuit underneath bonding pads. In a fourth embodiment, an IC package assembly includes an internal capacitive test probe for electrical continuity testing. An internal shield may also be used as a capacitive test probe. In a fifth embodiment, an IC package assembly includes an inductive loop within the package for electrical continuity testing.

Abstract: In the method of the present invention, a bottom electrode having a planar sheet of conducting material is first deposited on a substrate. A mask is then deposited on the bottom electrode to define wells. For at least first and second ones of the wells defined by the mask, an electroluminescent material is dispensed into the wells. The electroluminescent material dispensed into the first well emits a different spectrum of light from the electroluminescent material dispensed into the second well. In one embodiment of the invention, an isolation layer is deposited over the electroluminescent material after the electroluminescent material has dried. A top electrode is then deposited over the isolation layer. In a display according to the present invention, a plurality of pixels are deposited on a bottom electrode and then a top electrode is provided for energizing the pixels.

Abstract: The inventive mechanism uses seven steps to perform the mathematic equivalent to performing one large FFT on the input data. The input data array is decomposed into a plurality of squares. In first step, each of the squares has their respective points swapped across their main diagonals. In the second step, small FFTs are calculated for each of the squares. In the third step, the data is transposed in each of the squares as the first step. In fourth step, the data is oriented into a column format, which are multiplied by the twiddle coefficients. In the fifth step 75, small column oriented FFTs are calculated. The results of each of steps 4 and 5 is in a work array which is small enough to remain in cache. In the sixth step, columns data are transposed and stored into a columns of the squares. In the seventh step, the data is transposed in each of the squares as the first and third steps. This mechanism reduces cache misses, and allows for parallel processing.

Abstract: A three port FIFO buffer circuit uses off the shelf static RAM and dedicated shallow, e.g. 16 word, FIFOs in a multi-level caching scheme. The circuit results in multiple, reconfigurable, deep (e.g. up to 32k word) FIFO buffers. The preferred embodiment of the invention provides a buffer that comprises a bank of 32k word RAM, six dual port 16-word FIFOs, and associated sequencing logic. The sequencing logic includes RAM address registers/counter associated with each of the six FIFOs, and manages the movement of data into and out of the RAM.

Abstract: The invention provides a balun capable of operation over a range including micro and millimeter wavelengths. The balun includes a set of ferrite beads, and a set of polyiron cones. The ferrite beads and polyiron cones together provide signal balancing operable across a bandwidth together provide a signal balancing operable across a range of bandwidths of about 5000 to 1.

Abstract: A CCD array imager adapted for use as a spatial noise discriminator in confocal scanning microscopy comprises a parallel (vertical) register with a horizontal unmasked imaging row of pixels in tandem with a masked storage array, a serial (horizontal) register for readout, and a means for synchronizing image acquisition in the unmasked row with vertical charge shifting in the storage array such that images are mapped to on-diagonal pixels of the storage array whereas noise is mapped to off-diagonal pixels.

Abstract: An electronic system with power approximation for circuit savings. Power approximation is provided by means for generating an absolute value of a real part of a signal, means for generating an absolute value of an imaginary part of the signal, means for generating a sum of the absolute values, and means for performing an averaging function on the sum such that a result of the averaging function provides an approximate power which indicates an actual power of the signal. The approximate power enables a determination of actual signal-to-noise ratio in the electronic system and a determination of a variety of other signal-to-noise determinations without the use of multipliers.

Abstract: The invention relates to an apparatus for a crater-style sampling capacitor. The apparatus includes a dielectric having a smooth crater shaped input electrode on a first surface and output and guard electrodes on a second surface. A sampling capacitor is defined by the input and output electrodes, and a guard capacitor is defined by the input and guard electrodes. The edge of input electrode is positioned below the first surface to increase surface flash over voltage, further, the input electrode is curved to eliminate corona discharge at edges of the input electrode and to reduce self-heating to negligible levels. The apparatus is suitable for high-voltage radio-frequency applications, such as a mass spectrometer, or other high-voltage applications that require an accurate sampling capacitor for amplitude control and accurate sampling of radio-frequency waveforms.

Abstract: A method of making full-length oligonucleotide arrays provides for the purification of pre-synthesized full-length oligonucleotides from shorter length oligonucleotides and other impurities at the same time the oligonucleotides are deposited on the array. A synthesized mixture that includes desired full-length oligonucleotides and some capped shorter length or "failed" oligonucleotide sequences, is reacted with a linking agent to add a linking group on to the free-end of the full-length oligonucleotides but not the shorter-length oligonucleotides. The resulting mixture is deposited on an array without first separately purifying the mixture to remove the unwanted shorter-length oligonucleotides. After deposition, unbound material, including the shorter length oligonucleotide sequences and other impurities, is removed.