Patents Assigned to Aledia
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Patent number: 12721221Abstract: A light-emitting diode for an optoelectronic device or for an optoelectronic member, the light-emitting diode including a semiconductor core, a semiconductor shell, an implanted portion delimiting within the semiconductor shell at least one passivated portion and at least one active portion, the at least one passivated portion having a conductivity strictly lower than a conductivity of said at least one active portion.Type: GrantFiled: June 22, 2023Date of Patent: August 25, 2026Assignee: ALEDIAInventors: Eric Pourquier, Timothée Lassiaz
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Patent number: 12720942Abstract: An optoelectronic device including a first circuit including at least one light-emitting diode emitting through a first surface of the first circuit and including first and second electrodes; a second circuit for controlling the light-emitting diode, positioned on a second surface of the first circuit opposite to the first surface, including first and second electrically-conductive pads; and an electrically-conductive layer located at the interface between the first and second circuits, the electrically-conductive layer being divided into first and second portions orthogonally to the stack of the first and second circuits, the first electrode being electrically coupled to the first conductive pad via the first portion of the conductive layer and the second electrode being electrically coupled to the second conductive pad via the second portion of the conductive layer.Type: GrantFiled: September 29, 2021Date of Patent: August 25, 2026Assignee: AlediaInventors: Ivan-Christophe Robin, Eric Pourquier, Bruno Mourey
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Publication number: 20260247780Abstract: The object of the invention is an optoelectronic device comprising a plurality of emitting layers (1, 2, 3) in a stack in a direction z, comprising at least: A first emitting layer (1) configured to emit radiation at a wavelength ?1, A second emitting layer (2) configured to emit radiation at a second wavelength ?2 different from ?1, said emitting layers (1, 2, 3) being superimposed in projection along the direction z, Advantageously, each of the emitting layers (1, 2, 3) comprises a set (10, 20, 30) of nanowires (100, 200, 300) oriented longitudinally in the direction z forming the active part of the emitting layer (1, 2, 3). Another object of the invention is a method for manufacturing such a device. Figure for the abstract: FIG. 3.Type: ApplicationFiled: June 27, 2023Publication date: August 20, 2026Applicant: ALEDIAInventor: Tiphaine DUPONT
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Patent number: 12707778Abstract: An optoelectronic device for light display includes a support; light elements electrically connected to at least one first electrode and including a light-emitting diode of which a doped part is arranged in situation of electrical contact with the first electrode, the first electrode covering at least one upper part of the doped part arranged on the side opposite to the support face. Light confinement walls are configured to have an ability to reflect all or part of the light emitted by at least one of the light elements and being arranged so as to surround all or part of the at least one light element. The light confinement walls are electrically conductive and directly connected to the first electrode.Type: GrantFiled: May 31, 2021Date of Patent: August 11, 2026Assignee: ALEDIAInventors: Philippe Gibert, Eric Pourquier, Frédéric Mayer
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Patent number: 12702059Abstract: A method of manufacturing an optoelectronic device including light-emitting diodes comprising forming three-dimensional semiconductor elements, extending along parallel axes, made of a III-V compound, with a polarity of the group-III element, the method further including, for each semiconductor element, forming an active area covering the semiconductor element and a stack of semiconductor layers covering the active area, the active area being formed by vapor deposition at low pressure and comprising quantum wells separated by barrier layers, each quantum well including a ternary alloy having at least one first group-III element, the group-V element, and a second group-III element, the ratio of the atomic flux of the group-III elements to the atomic flux of the group-V element is in the range from 1 to 1.8.Type: GrantFiled: June 25, 2020Date of Patent: August 4, 2026Assignees: Aledia, Commissariat àl'Énergie Atomique et aux Énergies Alternatives, Universite Grenoble AplesInventors: Marion Gruart, Bruno-Jules Daudin, Walf Chikhaoui
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Publication number: 20260223487Abstract: A method for manufacturing an electronic device, including manufacturing a plate including several copies of the electronic device, forming weakened areas in a support by means of a laser, attaching the plate to the support after the weakened areas have been formed, etching the plate in the extension of the weakened areas, and breaking the support at the weakened areas to separate the electronic devices.Type: ApplicationFiled: December 7, 2023Publication date: July 30, 2026Applicant: AlediaInventor: Pascal Guenard
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Publication number: 20260198157Abstract: An optoelectronic device includes a control portion and an optical portion connected together, wherein the control portion includes an electronic component level, and an electrical interconnection level at the front face, the optical portion includes an optically-active component level and an electrical connection level defining a connection face. The control portion includes through connections extending from the interconnection level to a rear face of the control portion, the rear face corresponding to the connection face of the optical portion, so that the electrical interconnection level of the control portion is connected to the electrical connection level of the optical portion via the through connections.Type: ApplicationFiled: November 29, 2023Publication date: July 9, 2026Applicant: ALEDIAInventor: Frédéric MAYER
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Patent number: 12677700Abstract: An electronic device for capturing or emitting a physical quantity includes a lower support; lower conductive elements; active elements including an active part and each including a lower portion electrically connected to at least one of the lower conductive elements and an upper portion; and upper conductive elements. The upper portion of each active element is electrically connected to one of the upper conductive elements. At least one first electrically insulating element is arranged between the lateral wall of at least two adjacent active elements disposed side by side on the support surface of the lower support. The first electrically insulating element is arranged between one of the upper conductive elements and one of the lower conductive elements.Type: GrantFiled: May 31, 2021Date of Patent: July 7, 2026Assignee: ALEDIAInventors: Frédéric Mayer, Frédéric Mercier, Erwan Dornel, Ivan-Christophe Robin
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Patent number: 12635291Abstract: A method for local removal of semiconductor wires (SW) including the following steps: —Provide a stack of layers including at least a substrate, a nucleation layer, a growth masking layer, and a layer including SW being grown from the nucleation layer through the growth masking layer, —Encapsulate the SW with an encapsulation layer so as to form a composite layer including SW and encapsulating material, —Pattern a hard mask on the composite layer, so as to expose regions of the composite layer, —Perform anisotropic etching of the composite layer in the exposed regions, the anisotropic etching having a selectivity Ssemicon:Sencaps between semiconductor-based material and encapsulating material such as 0.9:1<Ssemicon:Sencaps<1.1:1.Type: GrantFiled: June 19, 2020Date of Patent: May 19, 2026Assignee: ALEDIAInventors: Pierre Tchoulfian, Pamela Rueda Fonseca, Wei Sin Tan
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Patent number: 12622123Abstract: A method for manufacturing an optoelectronic device includes providing a support supporting a plurality of three-dimensional semiconductor structures, forming a sacrificial portion under a first set of 3D structures of the plurality of three-dimensional semiconductor structures, forming a barrier portion around the sacrificial portion, said barrier portion having a basal wall extending under the sacrificial portion, and a lateral wall extending at the edge of the sacrificial portion, forming an access trench up to the sacrificial portion, the access trench extending continuously along the lateral wall of the barrier portion, etching the sacrificial portion from the access trench, and removing the first set of 3D structures.Type: GrantFiled: August 10, 2021Date of Patent: May 5, 2026Assignee: ALEDIAInventors: Xavier Hugon, Eric Pourquier, Frédéric Mayer, Thomas Lacave, Philippe Gibert, Mickaël Rebaud, Emmanuel Petitprez
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Patent number: 12610657Abstract: A method for selectively filling, with a filling liquid, a first cavity from among a plurality of cavities, each cavity opening out at a front face of a substrate. The method includes a processing step for altering the surface energy of the first internal surface of the first cavity or the surface energy of the second internal surfaces of the other cavities, such that the first surface has a first surface energy and the second surfaces have a second surface energy, and a step including a sequence for spreading the filling liquid, the first energy and the second energy being adjusted such that the first and the second surfaces exert an attracting effect and a repelling effect, respectively, on the liquid.Type: GrantFiled: November 29, 2019Date of Patent: April 21, 2026Assignees: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, ALEDIAInventors: Emmanuel Ollier, Fabrice Emieux, Frédéric Roux, Ulrich Soupremanien, Sylvia Scaringella, Tiphaine Dupont, Clémence Tallet, Abdelhay Aboulaich
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Publication number: 20260094558Abstract: A pixel including: a light emitting element and a first transistor coupled in series between a reference node and a supply node; and a first circuit including a first terminal coupled to the control terminal of the first transistor, a second terminal coupled to the reference node, the first circuit being configured to generate a control voltage on the first terminal, the first circuit including a variable voltage divider configured to provide the control voltage on the first terminal; and a first switch coupled between the first terminal of the first circuit and a conductive terminal of the first transistor.Type: ApplicationFiled: September 28, 2023Publication date: April 2, 2026Applicant: AlediaInventors: Jaehoon Lee, Frédéric Mercier
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Patent number: 12588316Abstract: A method for manufacturing an optoelectronic device including forming, by metal-organic chemical vapor deposition, MOCVD, wire-shaped, conical, or frustoconical semiconductor elements made of a III-V compound, doped or undoped, each semiconductor element extending along an axis and including a top, and forming by remote plasma chemical vapor deposition, RPCVD, or by molecular-beam epitaxy, MBE, or by hydride vapor phase epitaxy, HVPE, for each semiconductor element, an active area only on said top including at least a first semiconductor layer made of the III-V compound and a second semiconductor layer made of the III-V compound and an additional group-III element.Type: GrantFiled: June 22, 2020Date of Patent: March 24, 2026Assignee: AlediaInventors: Olga Kryliouk, Jérôme Napierala
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Publication number: 20260073841Abstract: A display pixel for a display screen including a light-emitting circuit including at least a first electroluminescent source, a controllable current source for driving the light-emitting circuit with current pulses and a driver circuit for controlling the current source, the driver circuit being configured to receive a digital signal and to control the current source for supplying the current pulses modulated by pulse-width modulation and modulated by pulse-amplitude modulation based on the bits of the digital signal.Type: ApplicationFiled: June 16, 2023Publication date: March 12, 2026Applicant: AlediaInventors: Jaehoon Lee, Frédéric Mercier
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Publication number: 20260051282Abstract: A pixel including: a light emitting element; a memory including at least one non-volatile memory cell; a first switch including a first output terminal coupled to the light emitting element, a second output terminal coupled to the non-volatile memory and an input terminal coupled to a supply node by a transistor; and a control circuit configured to generate a control voltage on a control terminal of the transistor, the control voltage being equal to: a first voltage during a step of resetting at least one cell of the memory; a second voltage during a step of setting at least one cell of the memory; a third voltage during a step of driving the element.Type: ApplicationFiled: September 28, 2023Publication date: February 19, 2026Applicant: AlediaInventors: Jaehoon Lee, Hugues Lebrun
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Patent number: 12557440Abstract: An optoelectronic device including an optoelectronic circuit including light-emitting diodes, thin-film transistors, and a stack of electrically-insulating layers, said stack being located between the light-emitting diodes, and the transistors stack further including conductive elements, between and through the insulating layers, the conductive elements connecting at least some of the transistors to the light-emitting diodes The device further includes a support having a surface, the support being flexible and/or the surface being curved and non-planar, the optoelectronic circuit being connected to the surface on the side of the thin-film transistors.Type: GrantFiled: July 16, 2021Date of Patent: February 17, 2026Assignee: AlediaInventors: Ivan-Christophe Robin, Frédéric Mayer
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Patent number: 12550486Abstract: An optoelectronic device including a matrix of axial light-emitting diodes (LEDs). Each LED includes an active layer emitting electromagnetic radiation. The matrix forms a photonic crystal having at least first and second resonant peaks in a plane containing the active layers, each first and second peak amplifying the radiation intensity at a first and second wavelength respectively. Each light emitting diode includes an elongated semiconductor element, having a first portion of a first average diameter, a second portion extending the first portion and having a cross-sectional area decreasing away from the first portion, and the active layer extending the second portion and having a second average diameter strictly less than the first average diameter, the active layers being located at the first peak locations and absent at the secondary peak locations.Type: GrantFiled: December 15, 2021Date of Patent: February 10, 2026Assignee: AlediaInventors: Mehdi Daanoune, Olga Kryliouk
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Patent number: 12538617Abstract: One or more embodiments relate to a light-emitting diode and its manufacturing method. The diode includes at least one radial three-dimensional (3D) structure including a core having a first conductivity, and having a wire or pyramidal shape with edges substantially parallel or oblique to the direction z, an active region configured to emit light radiation, the active region including at least one radial part covering the edges of the core, a shell having a second conductivity, the light-emitting diode including a magnetic layer having a polarization along a main direction substantially parallel to the direction z, so as to increase a residence time at the active region of at least one among the first type and the second type of carriers.Type: GrantFiled: May 29, 2025Date of Patent: January 27, 2026Assignee: ALEDIAInventor: Eric Pourquier
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Patent number: 12514048Abstract: A method of manufacturing an optoelectronic device including the steps of manufacturing of the display pixel circuits, each comprising an emission surface, and on the surface, walls delimiting at least one cavity, of bonding of the display pixel circuits to a support, and of filling of the at least one cavity of each display pixel circuit with a first filling material to form a first color conversion module in the cavity.Type: GrantFiled: December 20, 2024Date of Patent: December 30, 2025Assignee: AlediaInventors: Christophe Lincheneau, Ivan-Christophe Robin
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Patent number: 12505788Abstract: A chip including: four connection pads receiving respectively a supply voltage, a reference voltage, a first data signal, and a second data signal; at least two pixels; at least two drivers, each driver being configured to control one of the pixels, the drivers being coupled in a sequence; each driver including a first input and a first output, the first output of each driver being coupled to the first input of the following driver in the sequence, each driver being configured, in a programing step, to be programmed by storing digital data from the second data signal, and, in a display step, to drive one of the pixels from the stored digital data and from the first data signal.Type: GrantFiled: June 27, 2023Date of Patent: December 23, 2025Assignee: AlediaInventors: Jaehoon Lee, Frédéric Mercier, Ivan Petkov