Patents Assigned to Allegro Microsystems, LLC
  • Publication number: 20240146253
    Abstract: An amplifier circuits inductive/magnetic sensor interface can include a main signal path including one or more amplifiers configured to receive an input signal and to produce an output signal based on the input signal. The input signal may include a square-wave demodulated signal having an associated modulation frequency and an undesired frequency component at twice the modulation frequency of the square-wave demodulated signal. The amplifier circuit may include a gain feedback loop configured to set a gain of the amplifier circuit. The amplifier circuit may include a ripple reduction feedback loop configured to receive an intermediate signal on the main signal path and extract the undesired frequency component of the intermediate signal to produce a filtered version of the intermediate signal and provide the filtered version of the intermediate signal to the main signal path.
    Type: Application
    Filed: November 2, 2022
    Publication date: May 2, 2024
    Applicant: Allegro MicroSystems, LLC
    Inventors: Hernán D. Romero, Pablo Aguirre
  • Publication number: 20240146196
    Abstract: An adaptive current limit circuit is provided in a power converter to achieve a fixed output current limit over duty cycle. In a converter including a high side switch, a low side switch coupled to the high side switch at a switch node, and an inductor coupled between an input voltage source and the switch node, the adaptive current limit circuit is coupled to receive the high side control signal and configured to generate an adaptive current limit threshold that varies based at least in part on the duty cycle of the high side switch.
    Type: Application
    Filed: October 26, 2022
    Publication date: May 2, 2024
    Applicant: Allegro MicroSystems, LLC
    Inventors: Michele Suraci, Giorgio Oddone, Paolo Selvo
  • Patent number: 11972154
    Abstract: Configurable variable-length shift register circuits include a group of flip-flops connected in a serial configuration. The plurality of flip-flops is connected to a serial data-in line and a clock line. Each flip-flop can include a data input, a clock input configured to receive a clock signal from the clock line, and a data output. The plurality of flip-flops can include a serial data-out line. The circuit includes a plurality of multiplexers connected to the plurality of flip-flops to enable a desired number of flip-flops for an application. A nonvolatile memory can be connected to the plurality of multiplexers and configured to receive a register-length indication, where the register-length indication corresponds to a selected number of flip-flops selected for enablement for a given application.
    Type: Grant
    Filed: August 2, 2022
    Date of Patent: April 30, 2024
    Assignee: Allegro MicroSystems, LLC
    Inventor: Matthew Hein
  • Patent number: 11971463
    Abstract: Disclosed is a MTJ sensing circuit for measuring an external magnetic field and including a plurality of MTJ sensor elements connected in a bridge configuration, the MTJ sensing circuit having an input for inputting a bias voltage and generating an output voltage proportional to the external magnetic field multiplied by the bias voltage and a gain sensitivity of the MTJ sensing circuit, wherein the gain sensitivity and the output voltage vary with temperature; the MTJ sensing circuit further including a temperature compensation circuit configured to provide a modulated bias voltage that varies as a function of temperature over a temperature range, such that the output voltage is substantially constant as a function of temperature. Also disclosed is a method for compensating the output voltage for temperature.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: April 30, 2024
    Assignee: Allegro MicroSystems, LLC
    Inventors: Anuraag Mohan, Robert Zucker
  • Patent number: 11973008
    Abstract: Methods and apparatus for a signal isolator having enhanced creepage characteristics. In embodiments, a signal isolator IC package comprises a leadframe including a die paddle having a first surface to support a die and an exposed second surface. A die is supported by a die paddle wherein a width of the second surface of the die paddle is less than a width of the die.
    Type: Grant
    Filed: February 14, 2022
    Date of Patent: April 30, 2024
    Assignee: Allegro MicroSystems, LLC
    Inventors: Robert A. Briano, Shixi Louis Liu, William P. Taylor
  • Publication number: 20240133977
    Abstract: In one aspect, a method of manufacturing a magnetoresistance (MR) element having layers include ramping up a temperature of a reference layer of the MR element to an annealing temperature of the reference layer by increasing an amplitude of laser pulses applied to the reference layer over time to an amplitude that corresponds to the annealing temperature of the reference layer; applying a magnetic field to the reference layer; and maintaining the amplitude of subsequent laser pulses over time that have the amplitude that corresponds to the annealing temperature of the reference layer until at least the reference layer is annealed.
    Type: Application
    Filed: October 24, 2022
    Publication date: April 25, 2024
    Applicant: Allegro MicroSystems, LLC
    Inventors: Samridh Jaiswal, Paolo Campiglio, Sundar Chetlur
  • Patent number: 11967650
    Abstract: In one aspect, a diode includes a substrate having a first type dopant; a buried layer having a second type dopant and formed within the substrate; an epitaxial layer having the second type dopant and formed above the buried layer; and a plurality of regions having the first type dopant within the epitaxial layer. The plurality of regions includes a first region, a second region, and a third region. The diode also includes a base well having the first type dopant and located within the epitaxial layer and in contact with the third and fourth regions. In a reverse-bias mode, the diode is an electrostatic discharge (ESD) clamp and forms parasitic transistors comprising a first bipolar junction transistor (BJT), a second BJT and a third BJT.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: April 23, 2024
    Assignee: Allegro MicroSystems, LLC
    Inventors: Sagar Saxena, Washington Lamar, Maxim Klebanov, Chung C. Kuo, Sebastian Courtney, Sundar Chetlur
  • Patent number: 11961920
    Abstract: An integrated circuit package and method of fabrication are described. The integrated circuit package includes a lead frame having a first surface and a second opposing surface and a semiconductor die having a first, active surface in which circuitry is disposed and a second opposing surface attached to the first surface of the lead frame. A magnet attached to the second surface of the lead frame has a non-contiguous central region and at least one channel extending laterally from the central region. An overmold material forms an enclosure surrounding the magnet, semiconductor die, and a portion of the lead frame.
    Type: Grant
    Filed: April 26, 2023
    Date of Patent: April 16, 2024
    Assignee: Allegro MicroSystems, LLC
    Inventors: Ravi Vig, William P. Taylor, Paul A. David, P. Karl Scheller, Andreas P. Friedrich
  • Publication number: 20240120371
    Abstract: Methods and apparatus for a device that includes a circuit, such as a memory cell, and an isolation structure to electrically isolate the circuit cell. The isolation structure can include a p-type substrate, a first series of p-type material extending to the p-type substrate, and a second series of p-type material extending to the p-type substrate. The first series of p-type material, the p-type substrate, and the second series of p-type material surrounds a first side, a second side, and a bottom of the circuit cell to electrically isolate the circuit cell with continuous p-type material. In some embodiments, the first series of p-type material comprises p-type well regions. In some embodiments, the first series of p-type material comprises deep trench isolation.
    Type: Application
    Filed: October 11, 2022
    Publication date: April 11, 2024
    Applicant: Allegro MicroSystems, LLC
    Inventors: James McClay, Maxim Klebanov, Sundar Chetlur, Thomas S. Chung
  • Patent number: 11953395
    Abstract: Differential magnetic field torque sensors include first and second magnetic field concentrators that guide magnetic flux to a magnetic field sensor from first and second magnetic field directors and a target, such as a multipole magnet assembly configured as a ring magnet. The magnetic field concentrators have pairs of sections that are interdigitated and configured adjacent to magnetic field sensing elements of the magnetic field sensor. The magnetic field directors can each have a plurality of teeth, which can be interdigitated and adjacent or proximate to the target. The magnetic field directors can be configured to be mounted as a unit to a rotatable shaft while the target can be configured to be mounted to a different rotatable shaft. The magnetic field concentrators and magnetic field sensor can be fixed while the magnetic field directors and target can rotate with respect to each other about a twist axis.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: April 9, 2024
    Assignee: Allegro MicroSystems, LLC
    Inventor: Alexander Latham
  • Patent number: 11953565
    Abstract: In one aspect, bridge circuitry includes a first magnetoresistance (MR) element connected with a second MR element at a first node; a third MR element connected with the first MR element at a second node; a fourth MR element connected with the third MR element at a third node; a fifth MR element connected with a sixth MR element at a fourth node; a seventh MR element connected with the fifth MR element at a fifth node; and an eighth MR element connected with the seventh MR element at a sixth node; and a plurality of eight switches. Six of the plurality of eight switches are each connected to a corresponding one node.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: April 9, 2024
    Assignee: Allegro MicroSystems, LLC
    Inventor: Hernán D. Romero
  • Publication number: 20240110777
    Abstract: Methods and apparatus receiving data at a first time from at least one sensor, determining a parameter from the received data for the first time, estimating the parameter for a future time based on the data for first time, and outputting the estimated parameter for the future time to a receiving device. In some embodiments, an IC package can process the received data to generate the estimated parameter for the future time. The IC package may transmit the estimated parameter using a particular protocol. In some embodiments, the receiving device can treat the estimated parameter as real-time data.
    Type: Application
    Filed: September 29, 2022
    Publication date: April 4, 2024
    Applicant: Allegro MicroSystems, LLC
    Inventors: Emanuele Andrea Casu, Nicolás Rigoni, Ross Eisenbeis
  • Patent number: 11946985
    Abstract: An electronic circuit for measuring an angle and an intensity of an external magnetic field, includes: first and second magnetic field sensing units having sensing axes substantially orthogonal to each other; a voltage generator supplying a synchronization signal, a first voltage waveform to the first magnetic field sensing unit and a second voltage waveform to the second magnetic field sensing unit; a signal conditioning unit configured for adding the first and second sensing output signals and outputting a conditioned signal. The first and second voltage waveforms have substantially the same amplitude and frequency and are phase shifted by about 90° with respect to each other. The conditioned signal and the synchronization signal are inputted into a magnetic field angle detection unit configured for measuring a phase shift between the conditioned signal and the synchronization signal and for determining the angle of the external magnetic field from the measured phase shift.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: April 2, 2024
    Assignee: Allegro MicroSystems, LLC
    Inventors: Andrey Timopheev, Ali Alaoui, Evgeny Burmistrov
  • Patent number: 11940470
    Abstract: A substrate, comprising one or more first conductive layers, one or more second conductive layers, and a dielectric material that is arranged to encapsulate, at least in part, the first conductive layers and the second conductive layers. The one or more second conductive layers are electrically coupled to the first conductive layers. The first conductive layers and the second conductive layers are arranged to form a conductor. The first conductive layers are arranged to define a first rift in the conductor.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: March 26, 2024
    Assignee: Allegro MicroSystems, LLC
    Inventors: Loïc André Messier, Simon E. Rock, Yannick Vuillermet
  • Patent number: 11942831
    Abstract: Method and apparatus for providing a motor controller/driver integrated circuit package having diagnostic processing of signal(s) from a magnetic field sensor positioned in relation to a motor. The sensor signal may have a first voltage range corresponding to a valid high state and a second voltage range corresponding to a valid low state. A diagnostic module can process the received signal from the magnetic field sensor to determine whether the received signal has a voltage level within the first or second voltage ranges. An output module may generate an output signal having a state based on the whether the received signal has a voltage level within the first or second voltage ranges.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: March 26, 2024
    Assignee: Allegro MicroSystems, LLC
    Inventors: Ryan J. Metivier, Daniel Jacques
  • Patent number: 11933669
    Abstract: Described herein is a method and apparatus for an optical system configured to output redundant outputs, where the optical system includes at least one optical device configured to receive an optical signal; at least one optical transducer, wherein each at least one optical transducer is configured to receive the optical signal from the at least one optical device and convert the optical signal to an electrical signal; and at least one electronic device configured to receive each electrical signal and output the redundant outputs.
    Type: Grant
    Filed: February 16, 2022
    Date of Patent: March 19, 2024
    Assignee: Allegro MicroSystems, LLC
    Inventors: Stephen A. Marshall, Logan G. Stewart, Michael Munroe
  • Publication number: 20240085463
    Abstract: In one aspect, a sensor includes a first metal layer portion and a second metal layer portion separated by an insulator material; a conductive material layer in electrical contact with the first metal layer portion and the second metal layer portion; and a tunnel magnetoresistance (TMR) element positioned on and in electrical contact with the conductive material layer. A first current is configured to flow from the first metal layer portion, through the conductive material layer, to the second metal layer portion, and a second current is configured to flow from the first metal layer portion, through the conductive material layer, through the TMR element, and exiting through a top of the TMR element.
    Type: Application
    Filed: September 12, 2022
    Publication date: March 14, 2024
    Applicant: Allegro MicroSystems, LLC
    Inventors: Samridh Jaiswal, Paolo Campiglio, Sundar Chetlur, Maxim Klebanov, Yen Ting Liu
  • Patent number: 11927650
    Abstract: Magnetic-field sensors use magnetic closed-loops with magnetic-field sensing elements, e.g., magnetoresistance (MR) elements, and diagnostic circuitry operating in a separate frequency band than that used for magnetic field sensing. The MR elements can be used in a first stage of a high gain amplifier which provides a feedback signal to a feedback coil in a feedback configuration to provide a magnetic feedback field. The magnetic feedback field attenuates the sensed magnetic field so that the MR elements operate in a linear range. Magnetic stray field effects and any limited linearity of magnetic-field sensing elements can be masked by the loop gain of the closed loop. For a magnetic closed-loop, a negative feedback configuration can be used or a positive feedback configuration can be used with a loop-gain of less than one. The diagnostic signal traverses the closed-loop and provides information regarding correct or incorrect functioning of the loop components.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: March 12, 2024
    Assignee: Allegro MicroSystems, LLC
    Inventor: Hernán D. Romero
  • Publication number: 20240074322
    Abstract: In one aspect, a method includes depositing magnetoresistance (MR) layers of a MR element on a semiconductor structure; depositing a first hard mask on the MR layers; depositing and patterning a first photoresist on the first hard mask using photolithography to expose portions of the first hard mask; etching the exposed portions of the first hard mask; etching a portion of the MR layers using the first hard mask; depositing a second hard mask on a first capping layer; depositing and patterning a second photoresist on the second hard mask using photolithography to expose portions of the second hard mask; etching the exposed portions of the second hard mask; etching the MR element using the second hard mask; etching portions of the first hard mask down to a top MR layer of the MR element; and depositing a conducting material on the top MR layer to form an electroconductive contact.
    Type: Application
    Filed: August 30, 2022
    Publication date: February 29, 2024
    Applicant: Allegro MicroSystems, LLC
    Inventors: Maxim Klebanov, Yen Ting Liu, Sundar Chetlur, Paolo Campiglio, Samridh Jaiswal
  • Publication number: 20240063310
    Abstract: A Schottky diode includes a substrate having a first type dopant, a buried layer within the substrate and having a second type dopant, an epitaxial layer above the buried layer and having the second type dopant, a plurality of rings within the epitaxial layer and having the first type dopant, wherein the plurality of rings comprises an L-shaped ring, a shallow trench isolation (STI) layer at the top region of the epitaxial layer, an anode, a cathode spaced from the anode by the STI layer, and wherein the buried layer has an open region substantially vertically aligned with the anode.
    Type: Application
    Filed: August 16, 2022
    Publication date: February 22, 2024
    Applicant: Allegro MicroSystems, LLC
    Inventors: Yu-Chun Li, Felix Palumbo, Chung C. Kuo, Thomas S. Chung, Maxim Klebanov