Patents Assigned to Allegro Microsystems, LLC
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Publication number: 20250147128Abstract: Methods and apparatus for a magnetic field sensor IC package having groups of arrays of TMR elements each having a pinning direction. An on-chip coil is routed under the TMR elements to conduct current for generating a magnetic field to stimulate the TMR elements. The device may be configured to sense changes in an applied magnetic field.Type: ApplicationFiled: November 7, 2023Publication date: May 8, 2025Applicant: Allegro MicroSystems, LLCInventors: Tyler Daigle, Maxwell McNally, Steven Daubert, Alexander Latham
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Publication number: 20250150314Abstract: A signal encoding and decoding protocol to convey discrete sets of information combined in a single carrier signal is disclosed. The protocol uses modulation of both amplitude and pulse width to carry multiple sets of information. A first signal is pulse width modulated to encode a first data and a second signal is pulse amplitude modulated to encode a second data. The two modulated signals are combined to generate a carrier signal encoded with both the first and second data.Type: ApplicationFiled: November 6, 2023Publication date: May 8, 2025Applicant: Allegro MicroSystems, LLCInventors: Ahmad Nour Halawani, Emil Pavlov
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Patent number: 12292280Abstract: A method comprising: generating signals SA1 and SB1 by using a first sensor that is positioned at a first position relative to a rotating target, the signals SA1 and SB1 being generated in response to a magnetic field that is associated with the rotating target; generating signals SA2 and SB2 by using a second sensor that is positioned at a second position relative to the rotating target; and calculating a position of the rotating target based on a ratio of a first difference between the signals SA1 and SA2 and a second difference between the signals SB1 and SB2.Type: GrantFiled: December 20, 2022Date of Patent: May 6, 2025Assignee: Allegro MicroSystems, LLCInventors: Yannick Vuillermet, Xavier Blanc, Andreas P. Friedrich
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Publication number: 20250140673Abstract: According to one aspect of the present disclosure, a voltage isolated integrated circuit (IC) package configuration includes a first package comprising a transformer and a mold material enclosing the transformer to form a first package body, wherein the first package comprises a first lead set to permit electrical connection to the transformer. In some embodiments, a second package comprising a lead frame, two or more semiconductor die supported by the lead frame, and a mold material enclosing the two or more semiconductor die to form a second package body, wherein the lead frame comprises a second lead set to permit electrical connection to the two or more semiconductor die. In some embodiments, the one or more leads of the first lead set is directly electrically connected to one or more leads of the second lead set, wherein the first package and the second package are mechanically coupled together.Type: ApplicationFiled: October 26, 2023Publication date: May 1, 2025Applicant: Allegro MicroSystems, LLCInventors: Vijay Mangtani, Paul A. David, William P. Taylor, Harianto Wong, Natasha Healey, Harry Chandra
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Publication number: 20250138069Abstract: Apparatus and methods for measuring a shunt resistance through which an input current flows, wherein the input current has a first frequency range, include a voltage source configured to generate an AC voltage having a second frequency range that is higher than the first frequency range. An inductor, a capacitor, and the shunt resistance form an RLC network to which the voltage source is coupled. Processing circuitry coupled to receive a superimposed voltage across the shunt resistance is configured to generate a measured resistance indicative of the shunt resistance in response to the superimposed voltage.Type: ApplicationFiled: October 25, 2023Publication date: May 1, 2025Applicant: Allegro MicroSystems, LLCInventor: Emil Pavlov
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Publication number: 20250140681Abstract: Example embodiments include methods and apparatus for a structure having a capacitor, where the structure includes a plurality of inter-metal dielectric (IMD) layers above a substrate, a plurality of metal layers between respective IMD layers. In embodiments, BEOL metal regions and interconnects form plates of the capacitor. In example embodiments, lateral capacitors can be formed away from the substrate.Type: ApplicationFiled: November 1, 2023Publication date: May 1, 2025Applicant: Allegro MicroSystems, LLCInventors: Felix Palumbo, Thomas S. Chung, Maxim Klebanov
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Patent number: 12287381Abstract: A magnetoresistive element for a two-dimensional magnetic field sensor, including: a ferromagnetic reference layer having a fixed reference magnetization, a ferromagnetic sense layer having a sense magnetization that can be freely oriented relative to the reference magnetization in the presence of an external magnetic field, and a tunnel barrier layer between the reference and sense ferromagnetic layers; the reference layer including a reference coupling layer between a reference pinned layer and a reference coupled layer; the reference coupled layer including a first coupled sublayer in contact with the reference coupling layer, a second coupled sublayer, a third coupled sublayer and a insert layer between the second and third coupled sublayers; the insert layer comprising a transition metal and has a thickness between about 0.1 and about 0.5 nm, and the thickness of the reference coupled layer is between about 1 nm and about 5 nm.Type: GrantFiled: March 2, 2021Date of Patent: April 29, 2025Assignee: Allegro MicroSystems, LLCInventors: Clarisse Ducruet, Léa Cuchet, Jeffrey Childress
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Publication number: 20250130318Abstract: Methods and apparatus for optical detection having fast recovery from high amplitude input signals. In embodiments, a LIDAR system includes a photoreceiver to receive a return signal, and a circuit to modulate a gain of the photoreceiver over an acquisition window for the return signal, wherein the acquisition window contains time T0, and wherein the gain at time T0 is at a minimum for the acquisition window. In embodiments, the time T0 is at the beginning of the acquisition window.Type: ApplicationFiled: October 19, 2023Publication date: April 24, 2025Applicant: Allegro MicroSystems, LLCInventors: Stephen A. Marshall, Adam Lee, Charles Myers
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Publication number: 20250132946Abstract: A CAN transmitter includes an output branch, a replica branch including a replica of the output branch, and a feedback network. The output branch includes a first resistive element controlled by a first bias voltage and a second resistive element controlled by a second bias voltage. The replica branch has a feedback node that is replicated at a midpoint between the CANH bus terminal and the CANL bus terminal. The feedback network has a first input coupled to the feedback node, a second input configured to receive a midpoint reference voltage indicative of a desired midpoint voltage between the CANH and CANL terminals, and an output at which the first bias voltage is provided. A resistance controller is coupled to a control terminal of the second resistive element and configured to generate the second bias voltage based on a predetermined reference voltage and a bias current.Type: ApplicationFiled: October 23, 2023Publication date: April 24, 2025Applicant: Allegro MicroSystems, LLCInventors: Thomas Ross, James McIntosh
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Patent number: 12282075Abstract: A current sensor IC includes a lead frame having a die attach pad and elongated leads extending in a single direction with respect to the die attach pad, a semiconductor die having a first surface attached to the die attach pad and a second, opposing surface supporting magnetic field sensing elements, and a non-conductive mold material. A first portion of the mold material encloses the semiconductor die and the die attach pad, a second portion of the mold material encloses a portion of the elongated leads, and the mold material further includes a wing structure between the first portion and the second portion. In assembly, the first portion of the mold material extends into a cutout through a current conductor and the wing structure abuts a surface of the conductor. The current sensor can implement differential sensing based on signals from at least two magnetic field sensing elements.Type: GrantFiled: July 1, 2022Date of Patent: April 22, 2025Assignee: Allegro MicroSystems, LLCInventors: Simon E. Rock, Georges El Bacha, Shaun D. Milano, Loïc André Messier, Alexander Latham, Maxwell McNally, Shixi Louis Liu
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Patent number: 12270869Abstract: According to an embodiment, a magnetic field sensor includes: one or more magnetic field sensing elements; and a magnet structure to provide a bias magnetic field about the one or more magnetic field sensing elements, the magnet structure includes alternating magnetic layers and non-magnetic layers with at least three magnetic layers.Type: GrantFiled: January 21, 2022Date of Patent: April 8, 2025Assignee: Allegro MicroSystems, LLCInventors: Rémy Lassalle-Balier, Jeffrey Eagen, Damien Dehu
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Patent number: 12270887Abstract: Auto-calibrating current sensor integrated circuits (ICs) are configured for mounting at a position relative to a conductor. The auto-calibrating current sensor ICs can include a plurality of magnetic field sensing elements disposed at different locations within the integrated circuit, respectively, and can be configured to measure a magnetic field produced by a current carried by the conductor. The auto-calibrating sensors can include an electromagnetic model of the IC and the conductor. The model can be operative to determine a magnetic field at points in space due to a given current in the conductor at a known location of the conductor from the IC, and also the inverse situation of determining an unknown current and/or location of the conductor based on measurements of a magnetic field at known locations in space due to an unknown current in the conductor. Related auto-calibration methods are also described.Type: GrantFiled: October 4, 2023Date of Patent: April 8, 2025Assignee: Allegro MicroSystems, LLCInventors: Yannick Vuillermet, Loïc André Messier, Simon E. Rock, Maxwell McNally, Alexander Latham, Andreas P. Friedrich
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Patent number: 12270643Abstract: Methods and apparatus for determining signal offset correction signals. In embodiments, first and second magnetic field sensing elements generate first and second channels that are in quadrature. Signal correction processing includes storing amplitudes of the first and second channel signals when an amplitude of the channel signals cross zero and determine an offset of the first and second channel signals based on the stored amplitudes.Type: GrantFiled: March 3, 2023Date of Patent: April 8, 2025Assignee: Allegro MicroSystems, LLCInventor: Mohammed Safiuddin
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Publication number: 20250112170Abstract: Aspects of the present disclosure include galvanically-isolated (voltage-isolated) transformer-based integrated circuit (IC) packages providing cavities or spaces, which can, in some examples, be formed by preferentially heating the included magnetic core or a material coating the magnetic core. The provision of a space around the magnetic core allows the magnetic core to underdo size changes due to magnetostriction during use without being constrained or substantially constrained, thus, providing for improved magnetic performance. The circuits, ICs and IC packages and modules may include various types of circuits. In some examples, IC packages or modules may include a galvanically-isolated gate driver or other high voltage circuit.Type: ApplicationFiled: September 29, 2023Publication date: April 3, 2025Applicant: Allegro MicroSystems, LLCInventor: Andrew Thompson
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Patent number: 12265103Abstract: A sensor package comprising a lead frame, a current sensor die, and an interposer. The lead frame includes: (i) a primary conductor, (ii) a plurality of secondary leads, and (iii) a layer of dielectric material that is disposed between the primary conductor and the plurality of secondary leads. The current sensor die includes one or more sensing elements. The current sensor die is configured to measure a level of electrical current through the primary conductor of the lead frame. The interposer is disposed over the layer of dielectric material. The interposer includes a plurality of conductive traces that are configured to couple each of a plurality of terminals of the current sensor die to a respective one of the plurality of secondary leads.Type: GrantFiled: August 5, 2022Date of Patent: April 1, 2025Assignee: Allegro MicroSystems, LLCInventors: Robert A. Briano, Michael C. Doogue, William P. Taylor
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Patent number: 12267071Abstract: Methods and apparatus for a desaturation circuit having a temperature compensated voltage threshold for protecting a power transistor, such as a FET. A comparator module has a first input compared to a voltage source associated with current through the FET and a second input coupled to the voltage threshold circuit. As a resistance of the FET changes due to temperature changes, the voltage threshold changes to compensate for the resistance change of the FET.Type: GrantFiled: June 1, 2023Date of Patent: April 1, 2025Assignee: Allegro MicroSystems, LLCInventors: John Horan, Paddy Collins
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Patent number: 12266603Abstract: A semiconductor device that includes an epitaxial layer having a first-type dopant, a first well having a second-type dopant, a base layer having the second-type dopant, a first metal layer comprising a first base terminal and an inner conductor, and a first via connecting the first base terminal to the first well. The base layer is formed within the epitaxial layer and in contact with the first well and at least one dielectric separates the inner conductor from the first base terminal, and the base layer.Type: GrantFiled: May 3, 2022Date of Patent: April 1, 2025Assignee: Allegro MicroSystems, LLCInventors: Pablo Jesús Gardella, Eduardo Mariani, Brenda Rossi
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Patent number: 12265137Abstract: A method for use in a magnetic field sensor, including: in each of a plurality of calibration periods, generating a reference magnetic field based on a different one of a plurality of drive codes; storing, in a memory, a plurality of values of a reference magnetic field signal that is generated in response to the reference magnetic field, each of the values of the reference magnetic field signal being generated by sampling the reference magnetic field signal in a different one of the plurality of calibration periods; calculating a calibration gain coefficient based on the plurality of values of the reference magnetic field signal; and storing the calibration gain coefficient in the memory and using the calibration gain coefficient to adjust an output of the magnetic field sensor.Type: GrantFiled: November 18, 2022Date of Patent: April 1, 2025Assignee: Allegro MicroSystems, LLCInventors: Arun Prasad Javvaji, Craig S. Petrie
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Publication number: 20250102384Abstract: A heterogeneous sensor system includes a magnetic field sensor and an inductive sensor. A checker is configured to receive the magnetic field sensor output signal and the inductive sensor output signal and determine whether an error has occurred based on a comparison of the magnetic field sensor output signal and the inductive sensor output signal. Targets include at least a portion that is conductive and may include a ferromagnetic portion for back biased magnetic sensing. Additional features include on axis and off axis positioning of the sensors with respect to the target, multi-track targets for absolute position sensing, angle sensing and torque sensing configurations.Type: ApplicationFiled: December 11, 2024Publication date: March 27, 2025Applicant: Allegro MicroSystems, LLCInventors: Emanuele Andrea Casu, Yannick Vuillermet, Andreas P. Friedrich
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Publication number: 20250105760Abstract: Systems, circuits, and methods provide controlled active DC bus discharge, such as for electric vehicles (EVs) or hybrid vehicles. Controlled active DC bus discharge can be provided using gate drivers to control operation of traction inverter switches, such as power transistors, to accomplish a charge bleeding function. Power transistors can be configured so that the gate is connected to the drain, thereby forcing the gate threshold voltage across drain and source. The gate of a power transistor can be actively driven between a threshold voltage and Miller plateau threshold voltage. As a result, several volts can be generated across the power transistor while current decays, therefore safely discharging the system DC bus.Type: ApplicationFiled: September 21, 2023Publication date: March 27, 2025Applicant: Allegro MicroSystems, LLCInventors: Maurizio Salato, Vijay Mangtani, Tue Vu