Abstract: Systems, circuits, and methods provide controlled active DC bus discharge, such as for electric vehicles (EVs) or hybrid vehicles. Controlled active DC bus discharge can be provided using gate drivers to control operation of traction inverter switches, such as power transistors, to accomplish a charge bleeding function. Power transistors can be configured so that the gate is connected to the drain, thereby forcing the gate threshold voltage across drain and source. The gate of a power transistor can be actively driven between a threshold voltage and Miller plateau threshold voltage. As a result, several volts can be generated across the power transistor while current decays, therefore safely discharging the system DC bus.

Abstract: Methods and apparatus for an MR device having a ferromagnetic material, a heavy metal layer configured to flow a charge current, and an insulating layer between the ferromagnetic material and the heavy metal layer. The insulating layer is configured to electrically insulate and to magnetically couple the heavy metal layer and the ferromagnetic layer for generating a field like (FL) field in the ferromagnetic material in response to the charge current. In some embodiments, the MR device comprises a TMR device having a free layer or a reference layer oriented by the charge current. In other embodiments, the MR device comprises a GMR device.

Abstract: Methods and apparatus for automatic tuning of parameters for field-oriented control (FOC) of a BLDC motor with a controller with user input. Automatic tuning can include measuring electrical parameters comprising Phase resistance (Rs), Phase inductance (Ls), and Back-electromotive force (BEMF) constant (Ke). Automatic tuning can further include tuning of ac alignment and start-up processing, tuning of a current closed loop, and tuning of a speed closed loop.

Abstract: Systems, circuits, and methods provide self-calibration for magnetoresistance-based magnetic field sensors. Examples can include use of a closed loop acting as a feedback or calibration loop that is configured to process a reference signal applied to one or more magnetoresistance elements in a MR-based magnetic field sensor that also detects one or more external magnetic fields. The closed loop can adjust a bias voltage applied to the one or more magnetoresistance elements based on the reference signal. The calibration loop can accordingly provide for automatic or self-calibration of sensitivity of one or more magnetoresistance elements of the sensors to compensate for external factors affecting sensitivity of the one or more magnetoresistance elements.

Abstract: Methods and apparatus for motor startup with reduced acoustic noise include a startup module to generate a startup d-axis voltage during a startup interval and a startup q-axis voltage during the startup interval, wherein the startup interval ends at a time based on the observer error, and wherein the startup q-axis voltage increases during the startup interval. The startup module is configured to continuously linearly increase the speed of the motor during the startup interval. An observer generates a speed estimate, an angle estimate, and an observer error representative of a difference between an actual angle and the angle estimate. A voltage increment by which the startup q-axis voltage is increased during the startup interval is adjusted based on the observer error. The voltage increment can be equal to a constant value plus the observer error.

Abstract: Methods and apparatus for magnetic field sensor having a sample chopping with a shared ADC. A sensor may include receiving a chopping sequence for samples from first and second channels that share an analog-to-digital converter (ADC) in a magnetic field sensor. The samples for the first and second channel are timed with respect to a virtual sampling time (VST), such that a sum of the sample times for the samples for the first channel is equal to the VST, and a sum of the sample times for the samples for the second channel is equal to VST.

Abstract: Magnetoresistive element comprising a reference layer having a fixed reference magnetization; a ferromagnetic sense layer having a free sense magnetization having a stable vortex configuration that is orientable relative to the fixed reference magnetization in the presence of an external magnetic field; and a tunnel barrier layer between the reference layer and the sense layer and contacting a first side of the sense layer. The magnetoresistive element further comprises a hard magnetic layer arranged on a second side (212) of the sense layer opposed to the first side, the hard magnetic layer being configured to generate an interfacial magnetic coupling between the hard magnetic layer and the sense layer on the second side, such as to prevent chirality switching of the sense magnetization after the magnetoresistive element has been submitted to a heat treatment and an external magnetic field above vortex expulsion field.

Abstract: In one aspect, a bridge includes at least eight sets of sub-arrays. Each one of the at least eight sets of sub-arrays forms a corresponding one magnetoresistance element. Each one of the at least eight sets of sub-arrays has a reference direction. The at least eight sets of sub-arrays are arranged in a matrix on a die. A reference direction of each one of the at least eight sets of sub-arrays is different from a reference direction of at least one other of the at least eight sets of sub-arrays.

Abstract: In one aspect, a double-diffused metal oxide semiconductor (DMOS) includes a region of a semiconductor having a first region of a semiconductor having a first-type dopant, a first well having a second-type dopant, a dielectric within the first well, the dielectric having a bottom surface and a top surface opposite the bottom surface, a gate disposed on the top surface of the dielectric. The gate, the dielectric and the first well are configured to form a first reduced surface field (RESURF). The bottom surface of the dielectric has a first portion and a second portion, and the first portion of the bottom surface of the dielectric is closer to the top surface of the dielectric than the second portion of the bottom surface of the dielectric.

Abstract: Aspects of the present disclosure include galvanically-isolated (voltage-isolated) transformer-based integrated circuit (IC) packages providing cavities or spaces for an included magnetic core to underdo size changes due to magnetostriction without being constrained or substantially constrained, thus, providing for improved magnetic performance. The circuits, ICs and IC packages and modules may include various types of circuits. In some examples, IC packages or modules may include a galvanically-isolated gate driver or other high voltage circuit.

Abstract: A system, comprising: a reference magnetic field source that is configured to generate a reference magnetic field; a plurality of magnetic field sensing elements arranged in a sensing bridge, the sensing bridge being configured to sense the reference magnetic field and an external magnetic field simultaneously, the sensing bridge being configured to output a first signal and a second signal; a first circuit that is configured to generate a common mode signal of the sensing bridge based on the first signal and the second signal; an adjustment circuit that is configured to adjust a sensitivity of the sensing bridge based, at least in part, on a common mode signal of the sensing bridge; and a processing circuitry that is configured to use a differential signal of the sensing bridge to generate an output signal, the differential signal being based on a strength of the external magnetic field.

Abstract: Methods and apparatus for a magnetic field sensor having a first set of MR elements configured to change in resistance due to an applied magnetic field having an orientation in a sensitive axis of the first set of MR elements and a second set of MR elements that are immune to the applied magnetic field. The second set of MR elements is configured to change in resistance due to temperature. A processor can compensate for the response of the first set of MR elements based on the temperature information from the second set of MR elements.

Abstract: A sensor integrated circuit includes a sensing element configured to generate a sensor output signal proportional to a sensed parameter, a front-end amplifier coupled to receive the sensor output signal and configured to generate an amplifier output signal, and a sigma-delta modulator coupled to receive the amplifier output signal and configured to generate a digital sensor output signal indicative of the sensed parameter. At least one of the front-end amplifier or the sigma-delta modulator has an adjustable setting configured to change a resolution of the digital sensor output signal.

Abstract: Methods and apparatus for a signal isolator that mitigates the effects of CMTI strikes. In embodiments, a first die comprises a transmit module and the first die has a first voltage domain; and a second die comprises a receive module including a receive amplifier configured to receive from the transmit module a transmit signal that includes a differential signal and a common mode current. The second die may have a second voltage domain with the first and second die being separated by an isolation barrier. In embodiment, the receive amplifier includes a differential amplifier to receive the differential input signal from the transmit module; and a common mode module configured to sense the common mode current and sink or source the common mode current and minimize changes to an input impedance of the receive amplifier.

Abstract: Systems and methods described herein are directed towards integrating a shield layer into a current sensor to shield a magnetic field sensing element and associated circuitry in the current sensor from electrical, voltage, or electrical transient noise. In an embodiment, a shield layer may be disposed along at least one surface of a die supporting a magnetic field sensing element. The shield layer may be disposed in various arrangements to shunt noise caused by a parasitic coupling between the magnetic field sensing element and the current carrying conductor away from the magnetic field sensing element.

Abstract: A semiconductor package, comprising: a substrate; an analog circuitry that is formed on the substrate; a first heating element that is formed on the substrate; a first temperature sensing element that is formed on the substrate; a first heating control circuitry that is formed on the substrate, the first heating control circuitry being configured to detect whether a first temperature measurement that is taken with the first temperature sensing element is below a first threshold, and turn on the first heating element in response to detecting that the first temperature measurement is below the first threshold, the first heating element being turned on only when the first temperature measurement is below the first threshold; and an encapsulating material configured to encapsulate the substrate, the analog circuitry, the first temperature sensing element, the first heating element, and the first heating control circuitry.

Abstract: A current sensor IC includes a lead frame having a first surface, a second opposite surface and including a primary conductor and signal leads. A first semiconductor die has a first surface adjacent to the first surface of the lead frame and supporting a first magnetic field sensing element and a second semiconductor die has a first surface adjacent to the second surface of the lead frame and a second opposite surface supporting a second magnetic field sensing element. Fabrication methods include a single mold method and a two-mold method in which a mold material can provide isolation between the first semiconductor die and the primary conductor. Also described is a current sensor IC in which both first and second semiconductor die are arranged in a flip-chip configuration. Diagnostic circuits and inter-die connections permit one semiconductor die to sense faults with the other semiconductor die.

Abstract: A buffer includes a first branch to receive a digital input signal and generate a first intermediate signal having falling edges that are delayed and faster than rising edges of the digital input signal and rising edges that are substantially coincident with falling edges of the digital input signal and a second branch to receive the digital input signal and generate a second intermediate signal having rising edges that are delayed and faster than falling edges of the digital input signal and falling edges that are substantially coincident with rising edges of the digital input signal. An output stage has a first input to receive the first intermediate signal, a second input to receive the second intermediate signal, and an output at which a buffer output signal is provided as a delayed version of the digital input signal having faster rising and falling edges than the digital input signal.

Abstract: Magnetic angular sensor element destined to sense an external magnetic field, including a magnetic tunnel junction containing a ferromagnetic pinned layer having a pinned magnetization, a ferromagnetic sensing layer, and a tunnel magnetoresistance barrier layer; the ferromagnetic sensing layer including a first sensing layer being in direct contact with the barrier layer and having a first sensing magnetization, a second sensing layer having a second sense magnetization, and a metallic spacer between the first sensing layer and the second sensing layer; wherein the metallic spacer is configured to provide an antiferromagnetic coupling between the first sensing magnetization and the second sensing magnetization such that the first sensing magnetization is oriented substantially antiparallel to the second sensing magnetization; the second sensing magnetization being larger than the first sensing magnetization, such that the second sensing magnetization is oriented in accordance with the direction of the externa

Abstract: In one aspect, a bridge includes at least eight sets of sub-arrays. Each one of the at least eight sets of sub-arrays forms a corresponding one magnetoresistance element. Each one of the at least eight sets of sub-arrays has a reference direction. The at least eight sets of sub-arrays are arranged in a matrix on a die. A reference direction of each one of the at least eight sets of sub-arrays is different from a reference direction of at least one other of the at least eight sets of sub-arrays.