Patents Assigned to Allegro Microsystems, LLC
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Publication number: 20240395448Abstract: Magnetoresistive element comprising a tunnel barrier layer, a ferromagnetic reference layer having a fixed reference magnetization, and a ferromagnetic sense layer having a sense magnetization that can be changed by an external magnetic field (Bext). The reference, tunnel barrier, and sense layers are stacked perpendicular to a layer plane (PL) thereof. At least a portion of the magnetoresistive element comprising the sense layer has a hollow cross-sectional shape in the layer plane (PL), the cross-sectional shape having an outer side with an outer lateral size (Dout) and an inner side defining a width (wd) of the cross-sectional shape. The outer lateral size (Dout) is between 1 ?m and 5 ?m and the width (wd) is between 0.2 ?m and 0.3 ?m. The sense magnetization has a coreless vortex configuration and such that the magnetoresistive element has zero remanence at zero external magnetic field (Bext). The present disclosure further concerns a magnetic switch comprising the magnetoresistive element.Type: ApplicationFiled: May 10, 2024Publication date: November 28, 2024Applicant: Allegro MicroSystems, LLCInventors: Nikita Strelkov, Andrey Timopheev, Salim Dounia
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Patent number: 12153073Abstract: Output buffer diagnostic circuits for monitoring a sensor output buffer include a duplicate resistive network corresponding to a resistive network in the monitored sensor output buffer. The duplicate resistive network may include the same or similar topology as the output buffer resistive network. The duplicate resistive network is configured to produce a differential duplicate signal indicative of when an error condition exits in the sensor output buffer. The diagnostic circuit can include averaging circuitry configured to receive the differential duplicate signal and produce an average duplicate signal. The diagnostic circuit can include an error comparison circuit configured to receive the average duplicate signal and detect when the average duplicate signal exceeds a nominal or preset error value corresponding to an error condition in the sensor output buffer. The error comparison circuit is configured to produce an error indication when the average duplicate signal exceeds the preset error value.Type: GrantFiled: November 9, 2022Date of Patent: November 26, 2024Assignee: Allegro MicroSystems, LLCInventors: Matthieu Thomas, Radek Zeipl, Petr Bily
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Publication number: 20240385015Abstract: In one example, an inductive sensor interface circuit includes: a coil driver configured to excite one or more transmit coils to generate a magnetic field at a target; a plurality of input channels for receiving input signals via respective ones of a plurality of receive coils, the input signals responsive to reflections of the magnetic field off the target and encoding information about a position of the target; a position detection processor to decode the information about the position of the target from the input signals; and an amplitude detection processor configured to calculate an amplitude of the input signals and to control a strength of the magnetic field generated by the coil driver based on a difference between the calculated amplitude to a predetermined desired input amplitude.Type: ApplicationFiled: May 16, 2023Publication date: November 21, 2024Applicant: Allegro MicroSystems, LLCInventors: Pablo Aguirre, Hernán D. Romero
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Patent number: 12140702Abstract: Methods and apparatus wavelength discrimination in a LiDAR system. An example embodiment, includes illuminating a field of view (FOV) with transmitted light having different wavelengths at different regions in the FOV, focusing incoming light with a lens of the LiDAR system, and diffracting the focused light from the lens with a diffraction optical element to generate signals having the different wavelengths to respective regions of a detector array, wherein each pixel position in the array corresponds to one of the different wavelengths and to a spatial location in the FOV. The data from the pixel array can be processed to discriminate any of the incoming light not transmitted by the LiDAR system.Type: GrantFiled: September 12, 2023Date of Patent: November 12, 2024Assignee: Allegro MicroSystems, LLCInventor: William P. Taylor
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Patent number: 12140646Abstract: Methods and apparatus for canceling inductive coupling in a magnetic field sensing device having one or more Hall elements. A device can include a Hall element having a first pair of first and second voltage sensing terminals at diametrically opposed locations on the Hall element, and a second pair of third and fourth voltage sensing terminals diametrically opposed locations on the Hall element. A first mirror conductive path extends around a perimeter of the Hall element in a first direction a second mirror conductive path extends around the perimeter of the Hall element in a second direction so that the first and second mirror conductive paths are on opposite sides of the Hall element and are equal and opposite to cancel inductive coupling.Type: GrantFiled: February 6, 2023Date of Patent: November 12, 2024Assignee: Allegro MicroSystems, LLCInventors: Tyler Daigle, Srujan Shivanakere, Maxwell McNally, Alec Smith, Steven Daubert
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Patent number: 12135249Abstract: A sensor interface includes a signal path configured to receive a sensing element output signal from a sensing element and to generate an interface output signal indicative of a parameter sensed by the sensing element, an NTC interface and a diode interface. The NTC interface is configured to be coupled to an NTC element having a non-linear resistance over temperature and to generate an NTC signal indicative of a linearized version of the non-linear resistance of the NTC element and the diode interface configured to be coupled to a diode and to generate a diode signal indicative of an absolute temperature.Type: GrantFiled: March 12, 2021Date of Patent: November 5, 2024Assignee: Allegro MicroSystems, LLCInventors: Richard Stary, Petr Hribal, Milan Valenta, Miloslav Trnka
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Publication number: 20240363498Abstract: Aspects of the present disclosure include systems, structures, circuits, and methods providing integrated circuit (IC) packages or modules having diagonalized leads. First and second semiconductor dies are disposed on a substrate. First and second coils are configured on the substrate for a transformer. The transformer may include a core. The leads or pins may be aligned along a diagonal of the package body, providing increased creepage. The IC packages and modules may include various types of circuits; in some examples, IC packages or modules may include a galvanically isolated gate driver or other high voltage circuit.Type: ApplicationFiled: April 27, 2023Publication date: October 31, 2024Applicant: Allegro MicroSystems, LLCInventors: Maurizio Salato, William P. Taylor
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Publication number: 20240364353Abstract: Clock monitors for circuits having a plurality of oscillators. The clock monitors produce an error indication when one oscillator is determined to be outside of a desired operating range or beyond a defined threshold with respect to a second oscillator. The clock monitors include a synchronizer configured to receive a clock signal from a first oscillator of the plurality of oscillators and synchronize the received clock signal with a second oscillator and to produce a synchronized clock signal. The clock monitors can include a counter configured to produce a count value based on synchronized clock signal. The clock monitors include comparison circuitry configured to receive the count value and produce an error indication when the count value is outside a predetermined range. The clock monitors may be used to ensure correct clock operation for different transition scenarios, e.g., turning on or off a certain clock or power domain.Type: ApplicationFiled: July 10, 2024Publication date: October 31, 2024Applicant: Allegro MicroSystems, LLCInventors: Florencia Ferrer, Lucas Intile, Juan Manuel Cesaretti, Nicolás Rigoni
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Patent number: 12130342Abstract: In one aspect, a magnetic field current sensor includes an annihilation detector. The annihilation detector includes an annihilation bridge that includes magnetoresistance elements. The annihilation detector also includes a current bridge that includes at least two of the magnetoresistance elements, a first comparator configured to compare an output signal from the annihilation bridge and a second comparator configured to compare an output signal from the current bridge. An output of the annihilation detector indicates whether an annihilation exists in one or more of the magnetoresistance elements using at least one of the outputs signals of the first and second comparators.Type: GrantFiled: June 10, 2022Date of Patent: October 29, 2024Assignee: Allegro MicroSystems, LLCInventors: Rémy Lassalle-Balier, Alexander Latham
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Patent number: 12132469Abstract: The present application provides a packaged gate drive circuit having a transformer. The transformer which is used to transfer both signals and power from a primary side to a secondary side. The windings of the transformer are formed using a combination of tracks and wirebond wires. The transformer is positioned in a well formed using a first insulating material and covered with a second insulating material.Type: GrantFiled: June 1, 2021Date of Patent: October 29, 2024Assignee: Allegro MicroSystems, LLCInventors: Andrew Thompson, Joe Duigan, Karl Rinne
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Publication number: 20240355797Abstract: Systems, structures, circuits, and methods provide integrated circuit (IC) packages or modules having a transformer initially fabricated without a core. First and second semiconductor dies are disposed on a lead frame or other substrate. First and second coils are configured to about an aperture region. A hole or aperture may be formed in the IC package in the aperture region so a core may be placed and received in the aperture at a later time, e.g., such as after testing. The core may be a soft ferromagnetic material, e.g., metal, ferrite, and/or or a moldable material. In some examples, an insulating coating may be placed on the package to increase the isolation capability of the final package. The IC packages and modules may include various types of circuits; in some examples, IC packages or modules may include a galvanically isolated gate driver or other high voltage circuit.Type: ApplicationFiled: April 19, 2023Publication date: October 24, 2024Applicant: Allegro MicroSystems, LLCInventors: Maurizio Salato, Joseph Duigan, Andrew Bernard Keogh, Andrew Thompson, William P. Taylor, Vijay Mangtani
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Publication number: 20240356539Abstract: Methods and apparatus for a differential receiver having a differential latch. The latch can include first and second circuits each having first and second inputs to receive a differential input signal and first and second outputs to output a differential output signal. An offset structure includes a bandgap reference circuit with a first current source and a resistor, wherein the offset compensation structure provides a stable threshold for an input signal on the first and second inputs.Type: ApplicationFiled: April 20, 2023Publication date: October 24, 2024Applicant: Allegro MicroSystems, LLCInventors: John Horan, Guillaume Aulagnier
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Patent number: 12126346Abstract: Methods and apparatus for a differential receiver having a differential latch. The latch can include first and second circuits each having first and second inputs to receive a differential input signal and first and second outputs to output a differential output signal. An offset structure includes a bandgap reference circuit with a first current source and a resistor, wherein the offset compensation structure provides a stable threshold for an input signal on the first and second inputs.Type: GrantFiled: April 20, 2023Date of Patent: October 22, 2024Assignee: Allegro MicroSystems, LLCInventors: John Horan, Guillaume Aulagnier
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Patent number: 12126340Abstract: Magnetically-activated solid state switches can include a magnetic field sensor, control circuitry configured to implement a comparison or ON/OFF logic, an output switch, a rectifier, power regulator, and charge pump, as shown. A magnetically-activated solid state switch can include a sensor bias or driver block. An analog front end may be present to amplify and/or condition the output signals produced by magnetic field sensor. Terminals can accommodate a unidirectional DC input signal or a bidirectional or AC input signal. In the ON state, the solid state output switch is configured by the control circuitry to turn OFF at a periodic rate to maintain sufficient charge to allow the solid state magnetic field sensor to sense a magnetic field. In the OFF state, the low-power regulator can periodically turn on and provide power to the magnetic field sensor for taking a magnetic field measurement.Type: GrantFiled: February 27, 2023Date of Patent: October 22, 2024Assignee: Allegro MicroSystems, LLCInventor: Matthew Hein
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Publication number: 20240347472Abstract: Aspects of the present disclosure include systems, structures, circuits, and methods providing voltage-isolated integrated circuit (IC) packages or modules having a transformer integrated with or implemented on a lead frame. A portion of transformer windings may include a conductive portion of a lead frame. Conductive structure, such as wire bonds, may be used for other portions of transformer windings. In some examples, an insulating coating may be placed on the package to increase the isolation capability of the final package. The IC packages and modules may include various types of circuits; in some examples, IC packages or modules may include a galvanically isolated gate driver or other high voltage circuit.Type: ApplicationFiled: April 14, 2023Publication date: October 17, 2024Applicant: Allegro MicroSystems, LLCInventors: Vijay Mangtani, William P. Taylor, Paul A. David
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Publication number: 20240347473Abstract: Aspects of the present disclosure include systems, structures, circuits, and methods providing integrated circuit (chip) packages or modules having a transformer that is disposed or mounted on or to a side of the lead frame opposite to the related semiconductor dies of the chip package. The transformer may be placed on a PCB structure. In some examples, an insulating coating may be placed on the package to increase the isolation capability of the final package. The packages and modules may include various types of circuits; in some examples, chip packages or modules may include a galvanically isolated gate driver or other high voltage circuit.Type: ApplicationFiled: April 14, 2023Publication date: October 17, 2024Applicant: Allegro MicroSystems, LLCInventor: William P. Taylor
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Publication number: 20240345182Abstract: A magnetoresistive element comprising a reference layer, a ferromagnetic sense layer having a free sense magnetization, and a tunnel barrier layer between the reference layer and the sense layer. The sense layer comprises a first sense layer portion in contact with the tunnel barrier layer and a second sense layer portion in contact with the first sense layer portion. The first sense layer portion is configured such that a magnetic coupling between the first and second sense layer portions is between ±10?4 J/m2 and ±10?3 J/m2; and a perpendicular magnetic anisotropy (PMA) originating from the interface between the first sense layer portion and the tunnel barrier layer is between 8×104 A/m and 8×105 A/m, such as to shift positively the TCS of the magnetoresistive element and compensate the negative temperature coefficient of TMR of the magnetoresistive element.Type: ApplicationFiled: July 8, 2022Publication date: October 17, 2024Applicant: Allegro MicroSystems, LLCInventors: Andrey Timopheev, Clarisse Ducruet, Jeffrey Childress
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Patent number: 12117291Abstract: A method for use in a sensor, comprising: generating a signal that is indicative of an angular position of a rotating target, the signal being generated by at least one magnetic field sensing element; adjusting the signal to produce an adjusted signal, the signal being adjusted based on a current value of a first adjustment coefficient and a current value of a second adjustment coefficient, the first adjustment coefficient including a gain adjustment coefficient, and the second adjustment coefficient including an offset adjustment coefficient; generating an output signal based on the adjusted signal; and updating the first adjustment coefficient, the updating including replacing the current value of the first adjustment coefficient with a new value of the first adjustment coefficient, the updating being performed by minimizing a function that is based on the current value of the first adjustment coefficient and the current value of the second adjustment coefficient.Type: GrantFiled: June 27, 2023Date of Patent: October 15, 2024Assignee: Allegro MicroSystems, LLCInventor: Christophe Lutz
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Patent number: 12119413Abstract: A Schottky diode includes a substrate having a first type dopant, a buried layer within the substrate and having a second type dopant, an epitaxial layer above the buried layer and having the second type dopant, a plurality of rings within the epitaxial layer and having the first type dopant, wherein the plurality of rings comprises an L-shaped ring, a shallow trench isolation (STI) layer at the top region of the epitaxial layer, an anode, a cathode spaced from the anode by the STI layer, and wherein the buried layer has an open region substantially vertically aligned with the anode.Type: GrantFiled: August 16, 2022Date of Patent: October 15, 2024Assignee: Allegro MicroSystems, LLCInventors: Yu-Chun Li, Felix Palumbo, Chung C. Kuo, Thomas S. Chung, Maxim Klebanov
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Patent number: 12117465Abstract: A method including: calculating a value of an average phase offset between a first signal and a second signal, wherein: (i) the first signal is generated by one or more first magnetic field sensing elements in response to the magnetic field, (ii) the second signal is generated by one or more second magnetic field sensing elements in response to the magnetic field, and (iii) the magnetic field is associated with a rotating target; storing the value of the average phase offset between the first signal and the second signal at an address in a non-volatile memory of the sensor; when the sensor is restarted, copying the value of the average phase offset from the address in the non-volatile memory to a working memory of the sensor; and using the copy of the value of the average phase offset that is stored in the working memory of the sensor to generate an output signal, the output signal being generated further based on the first signal and the second signal.Type: GrantFiled: March 30, 2021Date of Patent: October 15, 2024Assignee: Allegro MicroSystems, LLCInventors: Solène Bastien, Andreas P. Friedrich