Patents Assigned to Allegro Microsystems, LLC
  • Publication number: 20220416078
    Abstract: A first semiconductor region, a second semiconductor region, and a third semiconductor region are arranged in layers. Trenches penetrate through the second semiconductor region and reach the first semiconductor region. Each of the trenches may include a gate electrode, and an insulating film insulating the gate electrode from the first semiconductor region and the second semiconductor region. An upper electrode is electrically connected to the second semiconductor region and the third semiconductor region. A fourth semiconductor region of the second conductivity type is arranged on an outer side of the trench of which the gate electrode is an outermost gate electrode in a plan view. An edge trench is arranged on an outer side of the fourth semiconductor region. The fourth semiconductor region is electrically connected to the upper electrode and a bottom of the fourth semiconductor may be arranged deeper than a bottom of the second semiconductor region.
    Type: Application
    Filed: June 29, 2021
    Publication date: December 29, 2022
    Applicants: SANKEN ELECTRIC CO., LTD., Allegro MicroSystems, LLC
    Inventor: Bungo TANAKA
  • Patent number: 11538934
    Abstract: A semiconductor device is disclosed that includes a group of trenches positioned in active region inside a first semiconductor region. A first trench is positioned in an outer peripheral region on an outer side of an active region. A second trench is positioned on an outer side of the first trench positioned in the outer peripheral region on the outer side of the active region. A mesa portion is positioned between the first and the second trenches. An insulating layer is positioned inside the first and second trenches. A second field plate is positioned inside the insulating layer in the first trench. A third field plate positioned inside the second insulating layer in the second trench. The mesa portion includes the semiconductor region electrically coupled to the first main electrode on an outermost side. The first trench does not have the gate electrode at upper part of the first trench.
    Type: Grant
    Filed: January 12, 2021
    Date of Patent: December 27, 2022
    Assignees: SANKEN ELECTRIC CO., LTD., Allegro MicroSystems, LLC
    Inventor: Taro Kondo
  • Publication number: 20220404182
    Abstract: A sensor includes a sensing element configured to generate a sensing element output signal indicative of a sensed parameter and a signal path responsive to the sensing element output signal and having at least one of an adjustable gain or an adjustable offset, wherein the signal path is configured to generate a sensor output signal indicative of the sensed parameter. A supply voltage detector is configured to generate a supply voltage signal indicative of which of a plurality of voltage ranges a supply voltage of the sensor falls within and at least one of the adjustable gain or the adjustable offset is adjustable in response to the supply voltage signal.
    Type: Application
    Filed: June 17, 2021
    Publication date: December 22, 2022
    Applicant: Allegro MicroSystems, LLC
    Inventors: Alexander Latham, Evan Shorman, Michael C. Doogue
  • Publication number: 20220406830
    Abstract: Methods and apparatus for a first photodetector array die having pixels from a first end to a second end and a second photodetector array die having pixels from a first end to a second end. A readout integrated circuit (ROIC) can be electrically coupled to the first and second photodetector array die. One or more microlenses can steer light onto the photodetector arrays.
    Type: Application
    Filed: June 21, 2021
    Publication date: December 22, 2022
    Applicant: Allegro MicroSystems, LLC
    Inventors: Bryan Cadugan, Harry Chandra, William P. Taylor
  • Publication number: 20220397382
    Abstract: Methods and apparatus for prosing a sensor IC package having first and second sets of magnetic field sensing elements and a third set of magnetic field sensing elements located between the first and second positions, wherein the first, second, and third sets of magnetic field sensing elements have a first axis of sensitivity and a second axis of sensitivity, wherein the first and second axes of sensitivity are orthogonal. The sensor IC package is positioned in relation to a target comprising a two-pole magnet and the first and second axes of sensitivity are perpendicular to an axis about which the target rotates. Differential signals are processed to determine an absolute position of the target. A first secondary angle position is generated from the first and third sets of magnetic field sensing elements.
    Type: Application
    Filed: June 10, 2021
    Publication date: December 15, 2022
    Applicant: Allegro MicroSystems, LLC
    Inventors: Yannick Vuillermet, Andreas P. Friedrich
  • Patent number: 11525875
    Abstract: In one aspect, a magnetic field sensor includes a plurality of tunneling magnetoresistance (TMR) elements that includes a first TMR element, a second TMR element, a third TMR element and a fourth TMR element. The first and second TMR elements are connected to a voltage source and the third and fourth TMR elements are connected to ground. Each TMR element has a pillar count of more than one pillar and the pillar count is selected to reduce the angle error below 1.0°.
    Type: Grant
    Filed: October 15, 2021
    Date of Patent: December 13, 2022
    Assignee: Allegro MicroSystems, LLC
    Inventors: Rémy Lassalle-Balier, Pierre Belliot, Christophe Hoareau, Jean-Michel Daga
  • Patent number: 11525705
    Abstract: In one aspect, an integrated circuit (IC) includes a magnetic-field sensor. The magnetic field sensor includes a first and second magnetoresistance circuitries configured to receive a magnetic field signal from a target and convert the magnetic field signal received to a first signal and second signal; analog circuitry configured to receive the first and second signals; digital circuitry configured to receive a first and second analog output signals from analog circuitry and to convert the first and second analog output signals to a first and second digital signals representing a first and second channel output signals; and diagnostic circuitry configured to receive, from the digital circuitry, an input signal related to a separation of the first and second channel output signals, and configured to provide a test signal at a pin of the IC indicating whether a distance between the IC and the target complies with at least one rule.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: December 13, 2022
    Assignee: Allegro MicroSystems, LLC
    Inventor: Kevin Maffei
  • Publication number: 20220390257
    Abstract: A sensor, comprising: a processing circuitry configured to: receive a first signal that is generated by a first magnetic field sensing element, the first signal being generated in response to a magnetic field that is indicative of rotation of a target; identify N local maxima of the first signal, where N is a positive integer, and N>1; identify N local minima of the first signal; generate a first offset adjustment signal and a first gain adjustment signal based on: (i) a first sum of the local maxima of the first signal and (ii) a second sum of the local minima of the first signal; and adjust the first signal based on the first offset adjustment signal and the first gain adjustment signal.
    Type: Application
    Filed: May 27, 2021
    Publication date: December 8, 2022
    Applicant: Allegro MicroSystems, LLC
    Inventors: Sergio Nicolás Deligiannis, Nicolás Rigoni
  • Publication number: 20220390903
    Abstract: Methods and apparatus for an arrayed time to digital converter (TDC) having matched delay line sampling. In embodiments, a TDC includes a coarse counter circuit to provide an event coarse timing measurement for an event, a coarse counter delivery network to deliver a count value in the coarse counter circuit to a memory storage element circuit, and an array of matched delay lines to provide an event fine timing measurement to the memory storage element circuit. An array of event sample signal generators can generate signals for the event and an array of encoders can encode fine timing measurement information from the memory storage element circuit, where an output of the encoder and the event coarse timing measurement information provide a timestamp for the event. A global delay-locked loop can incorporate a matched delay line coupled to the array of matched delay lines.
    Type: Application
    Filed: June 2, 2022
    Publication date: December 8, 2022
    Applicant: Allegro MicroSystems, LLC
    Inventors: Charles Myers, Shunming Sun, Adam Lee
  • Patent number: 11519946
    Abstract: A packaged current sensor integrated circuit includes a primary conductor having an input portion and an output portion configured to carry a current to be measured by a magnetic sensing element supported by a semiconductor die adjacent to the primary conductor. Each of the input portion and output portion of the primary conductor is exposed from orthogonal sides of the package body. A fault signal may be provided to indicate an overcurrent condition in the integrated current sensor package. The primary current path may be made of a thick lead frame material to reduce the primary current path resistance.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: December 6, 2022
    Assignee: Allegro MicroSystems, LLC
    Inventors: Simon E. Rock, Alexander Latham, Robert A. Briano, Shixi Louis Liu
  • Patent number: 11519939
    Abstract: A current sensor integrated circuit (IC) includes a unitary lead frame having at least one first lead having a terminal end, at least one second lead having a terminal end, and a paddle having a first surface and a second opposing surface. A semiconductor die is supported by the first surface of the paddle, wherein the at least one first lead is electrically coupled to the semiconductor die and the at least one second lead is electrically isolated from the semiconductor die. The current sensor IC further includes a first mold material configured to enclose the semiconductor die and the paddle and a second mold material configured to enclose at least a portion of the first mold material, wherein the terminal end of the at least one first lead and the terminal end of the at least one second lead are external to the second mold material.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: December 6, 2022
    Assignee: Allegro MicroSystems, LLC
    Inventors: Shixi Louis Liu, Paul A. David, Shaun D. Milano, Rishikesh Nikam, Alexander Latham, Wade Bussing, Natasha Healey, Georges El Bacha
  • Publication number: 20220385169
    Abstract: A converter to convert an input voltage into a regulated output current for supplying a load includes a reverse current protection diode having an anode coupled to the input voltage and a cathode, an energy storage element coupled to the cathode of the reverse current protection diode, a high side transistor coupled to the energy storage element and responsive to a high side control signal, and a low side transistor coupled to the energy storage element and responsive to a low side control signal. A controller is configured to generate the high side control signal and the low side control signal such that the low side transistor is enabled and the high side transistor is disabled during a pre-regulation interval.
    Type: Application
    Filed: May 28, 2021
    Publication date: December 1, 2022
    Applicant: Allegro MicroSystems, LLC
    Inventors: Vishal Ghorband, George P. Humphrey
  • Patent number: 11515246
    Abstract: An apparatus, comprising: a substrate; a coupling capacitor that is formed over the substrate; and an isolator that is formed between the substrate and the coupling capacitor, the isolator including: (a) an MP-well layer, (b) a first well layer, (c) an epi tub layer that is nested in the MP-well layer and the first well layer, and (d) a second well layer that is nested in the epi tub layer.
    Type: Grant
    Filed: October 9, 2020
    Date of Patent: November 29, 2022
    Assignee: Allegro MicroSystems, LLC
    Inventors: Sundar Chetlur, Maxim Klebanov, Cory Voisine, Kenneth Snowdon, Hsuan-Jung Wu
  • Patent number: 11513141
    Abstract: A method can use a current sensor that can include a magnetic flux concentrator along with first and second magnetic field sensing elements disposed proximate to the magnetic flux concentrator, wherein the magnetic flux concentrator is operable to influence a direction of first and second magnetic fields at the first and second magnetic field sensing elements, respectively, the first and second magnetic fields resulting from an electrical current passing through a conductor, the first and second magnetic field sensing elements operable to generate first and second signals, respectively, in response to the first and second magnetic fields, respectively, wherein the current sensor can also include a differencing circuit operable to subtract the first and second signals to generate a difference signal related to the electrical current.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: November 29, 2022
    Assignee: Allegro MicroSystems, LLC
    Inventors: Yannick Vuillermet, Cédric Gillet, Loïc André Messier, Xavier Blanc
  • Patent number: 11493361
    Abstract: A magnetic field sensor includes: a substrate; a transmission coil formed on the substrate, the transmission coil being configured to generate a direct magnetic field; a sensing bridge that is formed on the substrate, the sensing bridge being configured to detect the direct magnetic field and a reflected magnetic field that is generated by a target, the reflected magnetic field being generated in response to eddy currents that are induced in the target by the direct magnetic field; a processing circuitry being configured to generate an output signal that is indicative of a position of the target, the output signal being generated by normalizing a first signal with respect to a second signal, the first signal being generated at least in part by using the sensing bridge, and the second signal being generated at least in part by using the sensing bridge, wherein the second signal is based on the detected direct magnetic field.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: November 8, 2022
    Assignee: Allegro MicroSystems, LLC
    Inventor: Hernán D. Romero
  • Publication number: 20220342007
    Abstract: A magnetic field sensor includes at least one coil responsive to an AC coil drive signal; at least one magnetic field sensing element responsive to a sensing element drive signal and configured to detect a directly coupled magnetic field generated by the at least one coil and to generate a magnetic field signal in response to the directly coupled magnetic field; a processor responsive to the magnetic field signal to compute a sensitivity value associated with detection of the directly coupled magnetic field and substantially independent of a reflected magnetic field reflected by a conductive target disposed proximate to the at least one magnetic field sensing element; and an output signal generator configured to generate an output signal of the magnetic field sensor indicative of the reflected magnetic field.
    Type: Application
    Filed: July 1, 2022
    Publication date: October 27, 2022
    Applicants: Allegro MicroSystems, LLC, Commissariat à l'énergie atomique et aux énergies alternatives
    Inventors: Alexander Latham, Claude Fermon, Jason Boudreau, Myriam Pannetier-Lecoeur, Bryan Cadugan, Hernán D. Romero
  • Publication number: 20220345097
    Abstract: In some embodiments, a circuit includes: a first chopping circuit configured to receive an input signal and generate a modulated signal responsive to the input signal; first and second input capacitors selectively coupled to receive a modulated signal or a common-mode voltage; an amplifier having an input and an output, the input coupled to the first and second input capacitors; an auto-zeroing circuit comprising one or more auto-zeroing feedback capacitors selectively coupled between the amplifier input and output; a gain selection circuit comprising one or more gain selection feedback capacitors coupled to the amplifier input and selectively coupled to the amplifier output or the common-mode voltage; an offset compensation circuit comprising one or more offset capacitors coupled to the amplifier input and selectively coupled to a reference voltage or the common-mode voltage; and a second chopping circuit configured to generate a demodulated signal responsive to the amplifier output.
    Type: Application
    Filed: April 21, 2021
    Publication date: October 27, 2022
    Applicant: Allegro MicroSystems, LLC
    Inventors: Karel Znojemsky, Richard Stary
  • Publication number: 20220342010
    Abstract: An electronic circuit can have a first plurality of vertical Hall elements and a second plurality of vertical Hall elements all disposed on a substrate having a plurality of crystal unit cells, wherein the first plurality of vertical Hall elements have longitudinal axes disposed within five degrees of parallel to an edge of the crystal unit cells, and wherein the second plurality of vertical Hall elements have longitudinal axes disposed between eighty-five and ninety-five degrees relative to the longitudinal axes of the first plurality of vertical Hall elements.
    Type: Application
    Filed: April 23, 2021
    Publication date: October 27, 2022
    Applicant: Allegro MicroSystems, LLC
    Inventors: Hernán D. Romero, Gerardo A. Monreal
  • Patent number: 11480630
    Abstract: According to some embodiments, a method implemented in electronic circuitry includes: receiving a first signal having a sinusoidal waveform; receiving a second signal having a sinusoidal waveform; generating a composite signal responsive to the first and second signals; determining an orthogonality adjustment coefficient based on a duty cycle of the composite signal; and applying the orthogonality adjustment coefficient to generate an adjusted second signal that is substantially orthogonal to the first signal.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: October 25, 2022
    Assignee: Allegro MicroSystems, LLC
    Inventors: Sergio Nicolás Deligiannis, Nicolás Rigoni
  • Publication number: 20220337767
    Abstract: Methods and apparatus for temperature sensing in a detector system. Dark current from pixels in a pixel array of the detector system can be filtered to remove noise and processed to determine a temperature of the pixel array from the filtered dark current. Calibration of the dark current for a range of temperatures can be performed. In embodiments, the pixels comprise photodiodes.
    Type: Application
    Filed: April 14, 2021
    Publication date: October 20, 2022
    Applicant: Allegro MicroSystems, LLC
    Inventor: Bryan Cadugan