Patents Assigned to Allegro Microsystems, LLC
  • Publication number: 20190025346
    Abstract: A current sensor for sensing a direct magnetic field generated by a current through a conductor includes at least one first magnetic field sensing element spaced from at least one second magnetic field sensing element, with the magnetic field sensing elements configured to sense the direct magnetic field at different magnitudes. The direct magnetic field has a first direct coupling factor with respect to the at least one first magnetic field sensing element and a second direct coupling factor with respect to the at least one second magnetic field sensing element. A feedback conductor configured to carry a feedback current generates a feedback magnetic field that has a first feedback coupling factor with respect to the at least one first magnetic field sensing element and a second feedback coupling factor with respect to the at least one second magnetic field sensing element.
    Type: Application
    Filed: July 19, 2017
    Publication date: January 24, 2019
    Applicant: Allegro Microsystems, LLC
    Inventor: Alexander Latham
  • Publication number: 20190018081
    Abstract: A magnetic field sensor includes a plurality of magnetoresistance elements, each having at least one characteristic selected to provide a respective, different response to an applied magnetic field, wherein each of the plurality of magnetoresistance elements is coupled in parallel. Illustrative characteristics selected to provide the respective responses include dimensions and/or construction parameters such as materials, layer thickness and order, and spatial relationship of the magnetoresistance element to the applied magnetic field. A method includes providing each of a plurality of magnetoresistance elements with at least one characteristic selected to provide a respective, different response to an applied magnetic field, wherein each of the plurality of magnetoresistance elements is coupled in parallel.
    Type: Application
    Filed: September 20, 2018
    Publication date: January 17, 2019
    Applicant: Allegro MicroSystems, LLC
    Inventors: Jeffrey Eagen, William P. Taylor
  • Publication number: 20190020278
    Abstract: Methods and apparatus for a DC-DC converter having input voltage feedforward for reducing the effects of input voltage signal transients. In embodiments, a feedback circuit receives an output voltage and generates a feedback signal and a modulation circuit receives the feedback signal and generates a control signal for a switching element for generating the output voltage, which is boosted from an input voltage. A feedforward module combines a slope compensation signal, the input voltage, and current information for an inductive energy storage element, which forms a boost circuit for generating the output voltage and generates a ramp signal to the modulation circuit. A duty cycle of the control signal is proportional to an impedance compensation input, inversely proportional to the slope compensation and the input voltage, and inversely proportional to the inductor current.
    Type: Application
    Filed: September 18, 2018
    Publication date: January 17, 2019
    Applicant: Allegro MicroSystems, LLC
    Inventors: Pranav Raval, Vijay Mangtani
  • Publication number: 20190018074
    Abstract: The present disclosure is directed to an electronic circuit having a Hall effect element and a resistor bridge, all disposed over a common semiconductor substrate. The resistor bridge includes a first set of resistive elements having a first vertical epitaxial resistor and a first lateral epitaxial resistor coupled in series, and a second set of resistive elements having a second vertical epitaxial resistor and a second lateral epitaxial resistor coupled in series. The first set of resistive elements and the second set of resistive elements can be coupled in parallel. The resistor bridge can be configured to sense a stress value of the Hall effect element.
    Type: Application
    Filed: September 17, 2018
    Publication date: January 17, 2019
    Applicant: Allegro MicroSystems, LLC
    Inventor: Juan Manuel Cesaretti
  • Publication number: 20190018079
    Abstract: Methods and apparatus for a sensor having non-ratiometric fault trip level setting. In embodiments, a sensor has a sensing element with a fixed gain. A signal processing module receives the fault trip level setting and maintains the fault trip level setting constant during changes in the supply voltage.
    Type: Application
    Filed: September 11, 2018
    Publication date: January 17, 2019
    Applicant: Allegro MicroSystems, LLC
    Inventors: Alexander Latham, Stephen Marshall, Aaron Cook
  • Patent number: 10181810
    Abstract: Methods and apparatus for determining a position of a rotor in motor, such as a three-phase motor by determining first and second ones of sectors in which a first one of the magnetic poles of the rotor may be positioned by driving phase pairs with complementary signals and examining a voltage of a floating one of the phases. Embodiments can further include driving first and second currents towards the first and second ones of the sectors and analyzing a time for each of the first and second currents to reach a threshold to identify which of the first and second ones of the sectors is aligned with the first one of the magnetic poles of the rotor.
    Type: Grant
    Filed: June 16, 2016
    Date of Patent: January 15, 2019
    Assignee: ALLEGRO MICROSYSTEMS, LLC
    Inventors: Yisong Lu, Lyndon Ambruson
  • Patent number: 10181791
    Abstract: A control circuit for a voltage regulator includes a digital compensator having adaptive compensation to permit operation over different operating conditions. The digital compensator includes a gain parameter that is inversely proportional to the input voltage and is independent of the switching frequency. In embodiments, the voltage regulator has a crossover frequency established by at least one pole and at least one zero and the corner frequency of the converter output filter has a first fixed, predetermined relationship with respect to the switching frequency, a second fixed, predetermined relationship with respect to the crossover frequency, and a third fixed, predetermined relationship with respect to the at least one pole and at least one zero.
    Type: Grant
    Filed: January 22, 2018
    Date of Patent: January 15, 2019
    Assignee: Allegro MicroSystems, LLC
    Inventors: Kapil Kesarwani, Mackenzie Tope
  • Patent number: 10162017
    Abstract: The systems and methods described can reduce high order temperature coefficients on the Hall plate sensitivity. A temperature coefficient circuit may include a first amplifier to receive a first reference voltage generated in conjunction with a proportional to absolute temperature (PTAT) device and a second amplifier to receive a second reference voltage generated in conjunction with a complementary to absolute temperature (CTAT) device, the second amplifier having a second output node. A plurality of resistors may be disposed in a signal path between output node of the first amplifier and an output node of the second amplifier. The plurality of resistors may be coupled to at least one voltage-to-current converter through one or more resistors taps. The voltage-to-current converter may generate at least one current signal that can be operable to apply a multiplication factor or a division divisor to an amplifier coupled to the voltage-to-current converter.
    Type: Grant
    Filed: July 12, 2016
    Date of Patent: December 25, 2018
    Assignee: Allegro MicroSystems, LLC
    Inventor: Juan Manuel Cesaretti
  • Patent number: 10162020
    Abstract: In one aspect, a Hall Effect sensing element includes a Hall plate having a thickness less than about 100 nanometers an adhesion layer directly in contact with the Hall plate and having a thickness in a range about 0.1 nanometers to 5 nanometers. In another aspect, a sensor includes a Hall Effect sensing element. The Hall Effect sensing element includes a substrate that includes one of a semiconductor material or an insulator material, an insulation layer in direct contact with the substrate, an adhesion layer having a thickness in a range of about 0.1 nanometers to 5 nanometers and in direct contact with the insulation layer and a Hall plate in direct contact with the adhesion layer and having a thickness less than about 100 nanometers.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: December 25, 2018
    Assignee: Allegro MicroSystems, LLC
    Inventors: William P. Taylor, Harianto Wong
  • Publication number: 20180365974
    Abstract: A sensor integrated circuit includes at least two processing channels responsive to the same or different analog input signals to generate respective processed signals. The two processing channels are non-homogenous and, in some embodiments have different processing accuracies. A checker circuit receives the first and second processed signals and is configured to detect a fault in the sensor integrated circuit when the first and second processed signals differ from each other by more than a predetermined amount.
    Type: Application
    Filed: June 14, 2017
    Publication date: December 20, 2018
    Applicant: Allegro MicroSystems, LLC
    Inventors: David J. Haas, Juan Manuel Cesaretti
  • Publication number: 20180366479
    Abstract: Systems, methods, and techniques described here provide for a hybrid electrically erasable programmable read-only memory (EEPROM) that functions as both a single polysilicon EEPROM and a double polysilicon EEPROM. The two-in-one hybrid EEPROM can be programmed and/or erased as a single polysilicon EEPROM and/or as a double polysilicon EEPROM. The hybrid EEPROM memory cell includes a programmable capacitor disposed on a substrate. The programmable capacitor includes a floating gate forming a first polysilicon layer, an oxide-nitride-oxide (ONO) layer having disposed over a first surface of the floating gate, and a control gate forming a second polysilicon layer with the control gate formed over a first surface of the ONO layer to form a hybrid EEPROM having a single polysilicon layer and a double polysilicon EEPROM. The single polysilicon EEPROM includes the first polysilicon layer and the double polysilicon EEPROM includes the first and second polysilicon layers.
    Type: Application
    Filed: March 6, 2018
    Publication date: December 20, 2018
    Applicant: Allegro MicroSystems, LLC
    Inventor: Yigong Wang
  • Publication number: 20180367073
    Abstract: A motor control system includes an estimator responsive to measured motor winding voltage and measured motor winding current to generate an estimated position signal indicative of an estimate of a position of the motor and/or an estimated speed signal indicative of an estimate of a speed of the motor. A diagnostic checker circuit compares the estimated position signal and/or the estimated speed signal to a respective one of an actual position of the motor or an actual speed of the motor.
    Type: Application
    Filed: September 7, 2017
    Publication date: December 20, 2018
    Applicant: Allegro MicroSystems, LLC
    Inventor: David J. Haas
  • Patent number: 10156614
    Abstract: The concepts, systems, circuits and techniques described herein are directed toward sensing a voltage transient within a magnetic field sensor integrated circuit, such as a current sensor. A magnetic field sensor integrated circuit includes a substrate having a first surface and a second opposing surface, at least one magnetic field sensing element supported by a first surface of the substrate, an electromagnetic shield layer disposed on a shielded region of the first surface of the substrate adjacent to an unshielded region of the first surface of the substrate and an electrode disposed in the unshielded region of the first surface of the substrate and configured to permit detection of the voltage transient. In some embodiments, the shielded region and/or the electrode can be omitted.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: December 18, 2018
    Assignee: Allegro MicroSystems, LLC
    Inventors: Alexander Latham, William P. Taylor
  • Patent number: 10156461
    Abstract: A magnetic field sensor for detecting motion of an object includes error detection circuiting and processing. Magnetic field sensing elements are configured to generate at least two magnetic field signals in response to a magnetic field associated with the object which signals are used by detectors to generate right and left channel signals with edges indicative of motion of the object. A direction calculation processor responsive to right and left channel signals generates a direction signal having a state indicative of a direction of motion of the object and an output signal generator generates an output signal having a pulse indicative of the direction of motion of the object in response to the direction signal. An error detection processor responsive to the output signal and to the direction signal is configured to detect an error in at least one of the direction signal and the output signal.
    Type: Grant
    Filed: October 31, 2014
    Date of Patent: December 18, 2018
    Assignee: Allegro MicroSystems, LLC
    Inventors: Steven E. Snyder, Craig McConnell, Peter G. Wells
  • Patent number: 10145908
    Abstract: Methods and apparatus for detecting a magnetic field include a semiconductor substrate, a coil configured to provide a changing magnetic field in response to a changing current in the coil; and a magnetic field sensing element supported by the substrate. The coil receives the changing current and, in response, generates a changing magnetic field. The magnetic field sensing element detects the presence of a magnetic target by detecting changes to the magnetic field caused by the target and comparing them to an expected value.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: December 4, 2018
    Assignee: Allegro MicroSystems, LLC
    Inventors: Paul David, William P. Taylor
  • Patent number: 10145904
    Abstract: An apparatus includes a package, a plurality of external connections extending outside the package, and a first die having a first electrical contact coupled to a first connection of the plurality of external connections. The apparatus also includes a second die having a second electrical contact coupled to a second connection of the plurality of external connections. A conductor is electrically coupled between the first contact and the second contact to allow electrostatic discharge current to flow between the first die to the second die.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: December 4, 2018
    Assignee: Allegro MicroSystems, LLC
    Inventors: Maxim Klebanov, Washington Lamar, William P. Taylor
  • Patent number: 10147688
    Abstract: An integrated circuit device includes a package and at least two leads exposed external to the package to permit electrical connections to the package. A first die situated in the package has a first substrate and at least a first terminal electrically coupled to a first one of the leads. A second die situated in the package has a second substrate and at least a second terminal electrically coupled to a second one of the lead. An adhesive material holding the first and second die in place forms a voltage-triggered conduction path between the first and second die electrically that isolates the second die from the first die under a first condition and provides an ESD current path between the first one of the leads and the second one of the leads under a second condition.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: December 4, 2018
    Assignee: Allegro Microsystems, LLC
    Inventors: William Wilkinson, Washington Lamar, Maxim Klebanov
  • Patent number: 10147689
    Abstract: An electronic device includes a package, a plurality of external leads extending outside the package, a first die within the package having one or more first contacts electrically coupled to at least a first one of the external leads, and a second die within the package having one or more second contacts electrically coupled to at least a second one of the external leads. A capacitive coupling may be positioned between the first and second die to allow electrostatic discharge (ESD) current to flow between the first die and the second die in response to an ESD event and to electrically isolate the first and second die from each other in the absence of the ESD event.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: December 4, 2018
    Assignee: Allegro MicroSystems, LLC
    Inventors: Washington Lamar, Maxim Klebanov
  • Publication number: 20180342500
    Abstract: A metal-oxide semiconductor (MOS) transistor structure is provided herein having one or more horizontal and/or one or more vertical MOS transistor structures formed around trench and liner isolation regions. The trench region serves as a gate electrode, while the liner is formed around the sidewalls of trench region and serves as a gate dielectric of a parasitic MOS within the transistor structure. The MOS transistor structure includes various doped regions formed around one or more portions of the trench and liner regions. The doped regions can have one or more different doping types such that in response to a voltage applied to the trench region, a channel region is formed in at least one of the doped regions and provides a current path within the MOS transistor between different doped regions.
    Type: Application
    Filed: May 26, 2017
    Publication date: November 29, 2018
    Applicant: Allegro Microsystems, LLC
    Inventors: Sundar Chetlur, Maxim Klebanov, Washington Lamar
  • Publication number: 20180340987
    Abstract: An apparatus comprises one or more substrates and one or more coils. At least one of the coils is configured to produce a first magnetic field that induces eddy currents in a conductive target, which generates a reflected magnetic field. One or more magnetic field sensing elements supported by the one or more substrates detect the reflected magnetic field. A conductive support structure supports the one or more substrates. The support structure includes a gap in an area adjacent to the one or more coils so that the support structure does not generate a reflected magnetic field in response to the first magnetic field.
    Type: Application
    Filed: May 26, 2017
    Publication date: November 29, 2018
    Applicant: Allegro MicroSystems, LLC
    Inventors: Alexander Latham, Michael C. Doogue, Jason Boudreau