Patents Assigned to Alpha and Omega Semiconductor (Cayman) LTD
  • Patent number: 9882500
    Abstract: The present invention relates to a power supply device for voltage converter, which includes a master switch, a first controller for generating a first pulse signal to drive the master switch to be turned on and turned off, a second controller for comparing a detection voltage representing an output voltage and/or load current with a first reference voltage to determine the logic state of a control signal generated by the second controller, and a coupling element connected between the first controller and the second controller for transmitting the logic state of the control signal to the first controller and enabling the first controller to determine the logic state of the first pulse signal according to the logic state of the control signal. The second controller includes a driving module for generating a second control signal to drive a synchronous switch to be turned on and turned off.
    Type: Grant
    Filed: August 18, 2016
    Date of Patent: January 30, 2018
    Assignee: Alpha & Omega Semiconductor (Cayman), Ltd.
    Inventors: Tien-Chi Lin, Yu-Ming Chen, Jung-Pei Cheng, Yung-Chuan Hsu, Yueh-Ping Yu, Wei-Ting Wang, Pei-Lun Huang
  • Publication number: 20180005912
    Abstract: A wafer level chip scale package (WLCSP) structure and a manufacturing method are disclosed. The WLCSP structure comprises a semiconductor die and a stack. The stack comprises a protective tape and a molding compound. A portion of a first interface surface between the molding compound and the protective tape is curved. The manufacturing method comprises the steps of forming a semiconductor structure; attaching the semiconductor structure on a dummy wafer; performing a first dicing process using a first cutting tool; depositing a molding compound; removing the dummy wafer; performing a second dicing process with a second cutting tool. A first aperture of the first cutting tool is larger than a second aperture of the second cutting tool. The portion of the first interface surface being curved reduces the possibility of generation of cracks in the WLCSP structure.
    Type: Application
    Filed: June 29, 2016
    Publication date: January 4, 2018
    Applicant: Alpha and Omega Semiconductor (Cayman) Ltd.
    Inventors: Cheow Khoon Oh, Ming-Chen Lu, Xiaoming Sui, Bo Chen, Vincent Xue
  • Publication number: 20170373139
    Abstract: A trench type power semiconductor device with improved breakdown voltage and UIS performance and a method for preparation the device are disclosed. The trench type power semiconductor device includes a first contact hole formed in a mesa in the active area and a second contact hole formed in a mesa in an active to termination intermediate area, where the first contact hole is deeper and wider than the second contact hole. The method comprises the steps of providing a semiconductor substrate, etching an epitaxial layer, depositing a conductive material, depositing an insulation passivation layer and etching through the insulation passivation layer.
    Type: Application
    Filed: July 10, 2017
    Publication date: December 28, 2017
    Applicant: Alpha and Omega Semiconductor (Cayman) Ltd.
    Inventors: Yongping Ding, Hamza Yilmaz, Xiaobin Wang, Madhur Bobde
  • Publication number: 20170372987
    Abstract: A semiconductor power device is disclosed. The semiconductor power device comprises a lead frame unit, two or more pluralities of single in-line leads, two or more semiconductor chip stacks, and a molding encapsulation. Each semiconductor chip stack includes a high-side semiconductor chip, a low-side semiconductor chip and a clip connecting a top surface of the high-side semiconductor chip to a bottom surface of the low-side semiconductor chip. This invention further discloses a method for fabricating semiconductor power devices.
    Type: Application
    Filed: July 25, 2017
    Publication date: December 28, 2017
    Applicant: Alpha and Omega Semiconductor (Cayman) Ltd.
    Inventors: Yan Xun Xue, Zhiqiang Niu
  • Patent number: 9854686
    Abstract: A preparation method of a thin power device comprising the steps of steps S1, S2 and S3. In step S1, a substrate is provided. The substrate comprises a first set of first contact pads and a second set of second contact pads arranged at a front surface and a back surface of the substrate respectively. Each first contact pad of the first set of contact pads is electrically connected with a respective second contact pad of the second set of contact pads via a respective interconnecting structure formed inside the substrate. A through opening is formed in the substrate aligning with a third contact pad attached to the back surface of the substrate. The third contact pad is not electrically connected with the first set of contact pads. In step S2, a semiconductor chip is embedded into the through opening. A back metal layer at a back surface of the semiconductor chip is attached to the third contact pad.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: December 26, 2017
    Assignee: ALPHA AND OMEGA SEMICONDUCTOR (CAYMAN) LTD.
    Inventors: Yuping Gong, Yan Xun Xue, Ming-Chen Lu, Ping Huang, Jun Lu, Hamza Yilmaz
  • Patent number: 9843268
    Abstract: A power factor correction device comprises a power stage circuit converting input alternating current voltage into input current according to a pulse width modulation signal and outputs the input current to a load generating output voltage on the load, and sampling the input current outputting a correcting current; a current compensating circuit receiving and comparing the correcting current with a reference current signal generating a compensating current signal; a voltage compensating circuit receiving and comparing the output voltage with a reference voltage generating a compensating voltage signal; a multiplication amplifier receiving the compensating current signal and the compensating voltage signal generating an updated reference current signal by multiplying the compensating current signal with the compensating voltage signal; and a pulse width modulation converter receiving the compensating current signal and the compensating voltage signal generating the pulse width modulation signal to synchronize
    Type: Grant
    Filed: April 9, 2014
    Date of Patent: December 12, 2017
    Assignee: ALPHA AND OMEGA SEMICONDUCTOR (CAYMAN) LTD.
    Inventors: Chung-Ping Ku, Wei-Chi Huang
  • Patent number: 9742276
    Abstract: The present invention discloses a voltage control method. At first, the load voltage of the load is divided to generate a feedback voltage. The feedback voltage and a triangular wave of a triangular wave periodic signal, including the positive voltage and negative voltage, are combined to generate a sum signal. The sum signal is compared with a target voltage, and when the sum signal is less than the target voltage signal, a control signal is generated to control the switches to turn on or off. Finally, the switch receives the control signal and accordingly providing an input voltage to update and stabilize the load voltage.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: August 22, 2017
    Assignee: Alpha & Omega Semiconductor (Cayman), Ltd.
    Inventors: Kong Soon Ng, Wei-Chi Huang, Jean-Shin Wu
  • Patent number: 9704789
    Abstract: An intelligent power module (IPM) has a first, second, third and fourth die paddles, a first, second, third, fourth, fifth and sixth transistors, a tie bar, a low voltage IC, a high voltage IC, a first, second and third boost diodes, a plurality of leads and a molding encapsulation. The first transistor is attached to the first die paddle. The second transistor is attached to the second die paddle. The third transistor is attached to the third die paddle. The fourth, fifth and sixth transistor s are attached to the fourth die paddle. The low and high voltage ICs are attached to the tie bar. The molding encapsulation encloses the first, second, third and fourth die paddles, the first, second, third, fourth, fifth and sixth transistors, the tie bar, the low and high voltage ICs, and the first, second and third boost diodes. The IPM has a reduced top surface area and a reduced number of leads compared to a conventional IPM.
    Type: Grant
    Filed: October 16, 2016
    Date of Patent: July 11, 2017
    Assignee: ALPHA AND OMEGA SEMICONDUCTOR (CAYMAN) LTD.
    Inventors: Bum-Seok Suh, Zhiqiang Niu, Wonjin Cho, Cheow Khoon Oh, Son Tran, James Rachana Bou
  • Patent number: 9704948
    Abstract: A trench type power semiconductor device with improved breakdown voltage and UIS performance and a method for preparation the device are disclosed. The trench type power semiconductor device includes a first contact hole formed in a mesa in the active area and a second contact hole formed in a mesa in an active to termination intermediate area, where the first contact hole is deeper and wider than the second contact hole.
    Type: Grant
    Filed: August 9, 2014
    Date of Patent: July 11, 2017
    Assignee: Alpha & Omega Semiconductor (Cayman), Ltd.
    Inventors: Yongping Ding, Hamza Yilmaz, Xiaobin Wang, Madhur Bobde
  • Publication number: 20170186675
    Abstract: A power semiconductor package has a small footprint. A preparation method is used to fabricate the power semiconductor package. A first semiconductor chip and a second semiconductor chip are attached to a front side and a back side of a die paddle respectively. Conductive pads are then attached to electrodes at top surfaces of the first and second semiconductor chips. It is followed by a formation of a plastic package body covering the die paddle, the first and second semiconductor chips, and the conductive pads. Side surfaces of the conductive pads are exposed from a side surface of the plastic package body.
    Type: Application
    Filed: March 14, 2017
    Publication date: June 29, 2017
    Applicant: Alpha and Omega Semiconductor (Cayman) Ltd.
    Inventors: Hongtao Gao, Jun Lu, Ming-Chen Lu, Jianxin Ye, Yan Huo, Hua Pan
  • Patent number: 9685874
    Abstract: A circuit and a method for evaluating a load condition in a flyback converter are disclosed. A first current source is used for providing a preset current ISUM equal to a sum of the off current value IOFF and the blanking current value ILEB to charge a first capacitor, and a second current source is used for providing a reference current IREF to charge a second capacitor. A comparator receives a voltage applied on the first capacitor at its positive input end and a voltage applied on the second capacitor at its negative input end. The output current transmitted to the load by the flyback converter is varied to the change of the preset current ISUM, as such the load condition is detected by the comparison result generated by the comparator.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: June 20, 2017
    Assignee: Alpha & Omega Semiconductor (Cayman), Ltd.
    Inventors: Yu-Ming Chen, Jung-Pei Cheng, Pei-Lun Huang
  • Patent number: 9664714
    Abstract: The present invention relates to power conversion systems, specifically, it relates to a device for detecting the DC voltage rectified from the AC power supply voltage in an AC-DC converter, primarily used to determine whether the DC input voltage is under a brown-out level and to monitor whether the AC power supply is removed and to discharge the residue DC voltage generated in a high frequency filter capacitor, which is used to filter high frequency noise signals of the AC power supply, during the removal of the AC power.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: May 30, 2017
    Assignee: Alpha & Omega Semiconductor (Cayman), Ltd.
    Inventors: Yu-Ming Chen, Chih-Yuan Liu, Pei-Lun Huang
  • Patent number: 9653383
    Abstract: A semiconductor device with thick bottom metal comprises a semiconductor chip covered with a top plastic package layer at its front surface and a back metal layer at its back surface, the top plastic package layer surrounds sidewalls of the metal bumps with a top surface of the metal bumps exposing from the top plastic package layer, a die paddle for the semiconductor chip to mount thereon and a plastic package body.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: May 16, 2017
    Assignee: Alpha & Omega Semiconductor (Cayman), Ltd.
    Inventors: Hamza Yilmaz, Yan Xun Xue, Jun Lu, Ming-Chen Lu, Yan Huo, Aihua Lu
  • Patent number: 9646920
    Abstract: A power semiconductor package has a small footprint. A preparation method is used to fabricate the power semiconductor package. A first semiconductor chip and a second semiconductor chip are attached to a front side and a back side of a die paddle respectively. Conductive pads are then attached to electrodes at top surfaces of the first and second semiconductor chips. It is followed by a formation of a plastic package body covering the die paddle, the first and second semiconductor chips, and the conductive pads. Side surfaces of the conductive pads are exposed from a side surface of the plastic package body.
    Type: Grant
    Filed: June 7, 2014
    Date of Patent: May 9, 2017
    Assignee: ALPHA AND OMEGA SEMICONDUCTOR (CAYMAN), LTD
    Inventors: Hongtao Gao, Jun Lu, Ming-Chen Lu, Jianxin Ye, Yan Huo, Hua Pan
  • Patent number: 9627983
    Abstract: A control circuit and the control method for controlling the current voltage converter of a power conversion system in the start-up phase are disclosed. A first voltage is applied to the non-inverting input terminal of the comparator and a reference voltage is applied to the inverting input terminal of the comparator. When the first voltage exceeds the reference voltage, the comparison result from the comparator triggers the frequency of the clock signal generated by the oscillator to reduce preventing the primary current flowing through the primary winding of the transformer exceeding a pre-set value.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: April 18, 2017
    Assignee: Alpha & Omega Semiconductor (Cayman), Ltd.
    Inventors: Yu-Ming Chen, Jung-Pei Cheng, Pei-Lun Huang
  • Publication number: 20170059630
    Abstract: A power conversion system and a method for voltage change detection, specifically, relates to a detection circuit implemented in the AC-DC power converter, detect the voltage change. The AC input voltage is rectified to convert into a DC input voltage transmitted to a detection unit generating a detection voltage signal at different logical states corresponding to the input voltage changes. A charge current source unit is used for charging the capacitor when the detection voltage signal is in a second state and a discharge current source unit is used for discharging the capacitor when the detection voltage signal is in a first state. A primary comparator compares the voltage changes of the capacitor in the alternating charge and discharge processes with a critical zero potential and outputs a detection signal identifying the changing trend of the input voltage.
    Type: Application
    Filed: November 10, 2016
    Publication date: March 2, 2017
    Applicant: Alpha and Omega Semiconductor (Cayman) Ltd.
    Inventors: Yu-Ming Chen, Chih-Yuan Liu, Pei-Lun Huang
  • Patent number: 9577518
    Abstract: The present invention discloses a voltage control method. First, the load voltage of the load is divided to generate a feedback voltage. Then, an absolute value of a periodic triangular wave signal is retrieved to generate a positive feedback signal, which and the feedback voltage are then combined to produce a sum signal. The sum signal is then compared with a target voltage and when the sum signal is less than the target voltage, a control signal is generated and thus the load voltage is updated and stabilized using an input voltage. In an alternative method, the feedback voltage and the periodic triangular wave signal are combined to generate a sum signal, which is compared with the target voltage. When sum signal is less than the target voltage, a control signal is generated and thus the load voltage is for updated and stabilized using an input voltage.
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: February 21, 2017
    Assignee: Alpha & Omega Semiconductor (Cayman), Ltd.
    Inventors: Kong Soon Ng, Wei-Chi Huang, Jean-Shin Wu
  • Patent number: 9577542
    Abstract: The present invention discloses a constant on-time isolated converter comprising a transformer with a primary side and a secondary side. The primary side is connected to an electronic switch and secondary-side is connected to a load and a processor. The processor is connected to a driver on primary side through at least one coupling element and to the electronic switch. The processor receives an output voltage or an output current across the load generating a control signal accordingly. The driver receives the control signal through the coupling element and accordingly changes the ON/OFF state of the electronic switch, regulating the output voltage and the output current via the transformer, where the duration of the ON/OFF state of the electronic switch is determined between the moment control signal changes from negative to positive and the moment it changes from positive to negative to achieve a high-speed load transient response.
    Type: Grant
    Filed: December 7, 2014
    Date of Patent: February 21, 2017
    Assignee: Alpha & Omega Semiconductor (Cayman), Ltd.
    Inventors: Tien-Chi Lin, Chih-Yuan Liu, Yung-Chuan Hsu, Pei-Lun Huang
  • Patent number: 9577543
    Abstract: The present invention discloses a constant on-time isolated converter comprising a transformer with a primary side and a secondary side. The primary side is connected to an electronic switch and secondary-side is connected to a load and a processor. The processor is connected to a driver on primary side through at least one coupling element and to the electronic switch. The processor receives an output voltage or an output current across the load generating a control signal accordingly. The driver receives the control signal through the coupling element and accordingly changes the ON/OFF state of the electronic switch, regulating the output voltage and the output current via the transformer, where the duration of the ON/OFF state of the electronic switch is determined between the moment control signal changes from negative to positive and the moment it changes from positive to negative to achieve a high-speed load transient response.
    Type: Grant
    Filed: December 7, 2014
    Date of Patent: February 21, 2017
    Assignee: Alpha & Omega Semiconductor (Cayman), Ltd.
    Inventors: Tien-Chi Lin, Chih-Yuan Liu, Yueh-Ping Yu, Pei-Lun Huang
  • Publication number: 20170047853
    Abstract: An output current calculating circuit for a flyback converter operating under CCM and DCM is disclosed. The off current value IOFF and the blanking current value ILEB flowing through a sensing resistor are calculated using a detection module and are summed together using a current summing unit. A voltage converted from the sum value of the off current value IOFF and the blanking current value ILEB is transmitted through an output stage in a predetermined time ratio of a cycle with the duty cycle determined by a logic control unit, in which the logic control unit controls the output stage to receive the voltage converted from sum current in a predetermined time period of each cycle, and prevents the output stage to receive the voltage converted from sum current in the remaining time other than such predetermined time period of each cycle.
    Type: Application
    Filed: November 3, 2016
    Publication date: February 16, 2017
    Applicant: Alpha and Omega Semiconductor (Cayman) Ltd.
    Inventors: Yu-Ming Chen, Jung-Pei Cheng, Pei-Lun Huang