Abstract: Apparatus and associated methods relate to dynamic bandwidth control of a variable frequency modulation circuit by selective contribution of a crossover frequency tuning engine (XFTE) in response to a transient in a switching frequency. In an illustrative example, the XFTE may generate a transient control signal (Ctrans) in response to a transient in a control output signal (Cout) indicative of switching frequency and received from a feedback control circuit. The XFTE may generate Ctrans, for example, according to a predetermined relationship between a crossover frequency and the switching frequency of the modulation circuit. The feedback control circuit may, for example, generate Cout from a predetermined reference and a control input signal. Cout may, for example, correspond to a pulse-width modulated output delivered to a load through an inductor. Various embodiments may advantageously increase the effective bandwidth of the modulation circuit while maintaining desired frequency response characteristics.

Abstract: A wafer level chip scale semiconductor package comprises a device semiconductor layer, a backside metallization layer, a film laminate layer, and a metal layer. The device semiconductor layer comprises a plurality of metal electrodes disposed on a front surface of the device semiconductor. Each side surface of the backside metallization layer is coplanar with a corresponding side surface of the device semiconductor layer. Each side surface of the metal layer is coplanar with a corresponding side surface of the film laminate layer. A surface area of a back surface of the backside metallization layer is smaller than a surface area of a front surface of the metal layer.

Abstract: A method comprises the steps of providing a wafer; applying a redistribution layer, grinding a back side of the wafer; depositing a metal layer; and applying a singulation process. A semiconductor package comprises a metal-oxide-semiconductor field-effect transistor (MOSFET), a redistribution layer, and a metal layer. The MOSFET comprises a source electrode, a gate electrode, a drain electrode and a plurality of partial drain plugs. The source electrode, the gate electrode, and the drain electrode are positioned at a front side of the MOSFET.

Abstract: A semiconductor package comprises a lead frame, a chip, and a molding encapsulation. The lead frame comprises one or more die paddles comprising a first die paddle. The first die paddle comprises one or more through holes, one or more protrusions with grooves on top surfaces of the one or more protrusions, or one or more squeezed extensions. Each of the one or more through holes is filled with a respective portion of the molding encapsulation. Each of the one or more through holes may be of a rectangular shape, a rectangular shape with four filleted corners, a circular shape, or an oval shape. Each of the grooves is filled with a respective portion of the molding encapsulation. A respective side wall of each of the one or more squeezed extensions is of a swallowtail shape. The swallowtail shape directly contacts the molding encapsulation.

Abstract: A semiconductor package comprises a lead frame, a first field-effect transistor (FET), a second low side FET, a first high side FET, a second high side FET, a first metal clip, a second metal clip, and a molding encapsulation. The semiconductor package further comprises an optional integrated circuit (IC) controller or an optional inductor. A method for fabricating a semiconductor package. The method comprises the steps of providing a lead frame; attaching a first low side FET, a second low side FET, a first high side FET, and a second high side FET to the lead frame; mounting a first metal clip and a second metal clip; forming a molding encapsulation; and applying a singulation process.

Abstract: A multi-phase current mode hysteretic modulator implements phase current balancing among the multiple power stages using slope-compensated emulated phase current signals and individual phase control signal for each phase. In some embodiments, the slope-compensated emulated phase current signals of all the phases are averaged and compared to the slope-compensated emulated phase current signal of each phase to generate a phase current balance control signal for each phase. The phase current balance control signal is combined with the voltage control loop error signal to generate a phase control signal for each phase where the phase control signals are generated for the multiple phases to control the phase current delivered by each power stage.

Abstract: A flyback converter to control conduction time in AC/DC conversion technology. The flyback converter includes a primary side and a secondary side. The primary side includes a main switch connecting a primary coil to the input of the flyback converter in series. The secondary side includes a secondary coil coupling with the output terminal of the flyback converter. When a switching frequency of the main switch is at a preset first on time in the range between the off frequency and the second switching frequency, the on-time of the main switch continuously changes corresponding to output load changes. When the switching frequency of the main switch is higher than the first switching frequency, the on time of the main switch is constant. The on time is controlled to change linearly, so as to avoid excessive changes in the output voltage ripples, thereby improving circuit efficiency.

Abstract: A system and method in an electronic system including multiple serial ports, each coupled to a port controller circuit. In one embodiment, the method includes providing a monitor terminal at each port controller circuit, each monitor terminal having a first resistance value; connecting together electrically at least two of the monitor terminals of the port controller circuits of the multiple serial ports; and sensing, at each port controller circuit, a first voltage at the monitor terminal. In operation, when the first voltage is outside a predetermined voltage window, a first signal is generated at a first port controller circuit where the first signal has a state indicating a failure detected in at least one of the port controller circuits with connected monitor terminals.

Abstract: A power semiconductor package comprises a lead frame, a semiconductor chip, and a molding encapsulation. The lead frame comprises an elevated section comprising a source section; a drain section; and a plurality of leads. The semiconductor chip includes a metal-oxide-semiconductor field-effect transistor (MOSFET) disposed over the lead frame. The semiconductor chip comprises a source electrode, a drain electrode, and a gate electrode. The source electrode of the semiconductor chip is electrically and mechanically connected to the source section of the elevated section of the lead frame. The semiconductor chip is served as a low side field-effect transistor as a flipped-chip connected to a heat sink by a first thermal interface material. A high side field-effect transistor is connected to the heat sink by a second thermal interface material. The low side field-effect transistor and the high side field-effect transistor are mounted on a printed circuit board.

Abstract: A semiconductor device and a method of making thereof are disclosed. The device includes a substrate heavily doped with a first conductivity type and an epitaxial layer lightly doped with the first conductivity type formed on the substrate. A buffer layer between the substrate and the epitaxial layer is doped with the first conductivity type at a doping level between that of the substrate and that of the epitaxial layer. A cell includes a body region doped with the second conductivity formed in the epitaxial layer. The second conductivity type is opposite the first conductivity type. The cell includes a source region doped with the first conductivity type and formed in at least the body region. The device further includes a short region doped with the second conductivity type formed in the epitaxial layer separated from source region of the cell by the body region of the cell wherein the short region is conductively coupled with the source region.

Abstract: Apparatus and associated methods relate to dynamic bandwidth control of a variable frequency modulation circuit by selective contribution of a crossover frequency tuning engine (XFTE) in response to a transient in a switching frequency. In an illustrative example, the XFTE may generate a transient control signal (Ctrans) in response to a transient in a control output signal trans, (Cout) indicative of switching frequency and received from a feedback control circuit. The XFTE may generate Ctrans, for example, according to a predetermined relationship between a crossover frequency and the switching frequency of the modulation circuit. The feedback control circuit may, for example, generate Cout from a predetermined reference and a control input signal. Cout may, for example, correspond to a pulse-width modulated output delivered to a load through an inductor.

Abstract: A semiconductor package comprises a lead frame, a chip, and a molding encapsulation. The lead frame comprises one or more die paddles, a first plurality of leads, and a second plurality of leads. A respective end surface of each lead of the first plurality of leads and the second plurality of leads is plated with a metal. A first respective window on a first side of each lead of the first plurality of leads and the second plurality of leads is not plated with the metal. A second respective window on a second side of each lead of the first plurality of leads and the second plurality of leads is not plated with the metal. A method for fabricating a semiconductor package comprises the steps of providing a lead frame array, mounting a chip, forming a molding encapsulation, and applying a cutting process or a punching process.

Abstract: A power stage in a multi-phase switching power supply incorporates a current sense circuit coupled to the output voltage disconnect transistor to conduct a portion of an inductor current flowing in the output inductor of the power stage. The current sense circuit is controlled by the same control signal controlling the output voltage disconnect transistor. The portion of the inductor current being conducted by the current sense circuit includes an upslope current and a downslope current of the inductor current. A phase redundant controller generates a sense current signal indicative of the portion of the inductor current conducted by the current sense circuit. Accurate current sensing is implemented for the power stage where the current sense value dose not require temperature compensation.

Abstract: A semiconductor package comprises a semiconductor substrate, a first metal layer, an adhesive layer, a second metal layer, a rigid supporting layer, and a plurality of contact pads. A thickness of the semiconductor substrate is equal to or less than 50 microns. A thickness of the rigid supporting layer is larger than the thickness of the semiconductor substrate. A thickness of the second metal layer is larger than a thickness of the first metal layer. A method comprises the steps of providing a device wafer; providing a supporting wafer; attaching the supporting wafer to the device wafer via an adhesive layer; and applying a singulaton process so as to form a plurality of semiconductor packages.

Abstract: A flyback converter to control conduction time in AC/DC conversion technology. The flyback converter includes a primary side and a secondary side. The primary side includes a main switch connecting a primary coil to the input of the flyback converter in series. The secondary side includes a secondary coil coupling with the output terminal of the flyback converter. When a switching frequency of the main switch is at a preset first on time in the range between the off frequency and the second switching frequency, the on-time of the main switch continuously changes corresponding to output load changes. When the switching frequency of the main switch is higher than the first switching frequency, the on time of the main switch is constant. The on time is controlled to change linearly, so as to avoid excessive changes in the output voltage ripples, thereby improving circuit efficiency.

Abstract: An isolated converter has a constant voltage mode and a constant current mode. The isolated converter includes a transformer, a main switch, a driver, a controller, and an isolator. The controller includes a constant current control unit, a voltage comparator, and a control logic unit. The constant current control unit generates a voltage adjustment signal to adjust the reference voltage or voltage feedback signal according to a current feedback signal for sensing the output current. The control logic unit generates a trigger signal according to the comparison signal of the voltage comparator. The isolator connects the output terminal of the controller and the driver. The input terminal is used to transmit the trigger signal to the input terminal of the driver. The isolated converter can provide excellent constant voltage transient response and stable constant current regulation according to load conditions by improving the controller.

Abstract: A semiconductor package comprises a semiconductor substrate, a first metal layer, an adhesive layer, a second metal layer, a rigid supporting layer, and a plurality of contact pads. A thickness of the semiconductor substrate is equal to or less than 50 microns. A thickness of the rigid supporting layer is larger than the thickness of the semiconductor substrate. A thickness of the second metal layer is larger than a thickness of the first metal layer. A method comprises the steps of providing a device wafer; providing a supporting wafer; attaching the supporting wafer to the device wafer via an adhesive layer; and applying a singulation process so as to form a plurality of semiconductor packages.

Abstract: Apparatus and associated methods relate to a power supply noise disturbance rejection circuit (NDRC) having a first circuit reference potential (CRP1), a second circuit reference potential (CRP2), and a galvanic link conductively connecting CRP1 and CRP2 and providing a non-zero resistance return path for at least one current mode signal (CMS). In an illustrative example, a power supply monitor circuit (PSMC) may be referenced to CRP1 and a control circuit to CRP2. The PMSC may, for example, generate a voltage mode signal (VMS) relative to CRP1 and representing an output parameter of a power supply circuit (PSC), and convert the VMS into a first CMS (CMS1). The control circuit may, for example, generate a control signal for the PSC from CMS1. Various embodiments may advantageously attenuate a noise margin of a CMS presented at the control circuit by a factor of at least 10 relative to an equivalent VMS.

Abstract: A signal transmission circuit is configured for transmitting control information from a secondary side of a power converter to a primary side of the power converter. The signal transmission circuit includes a transmitter circuit, a signal transformer and a detection circuit. The transmitter circuit is configured to generate a ramp signal at least according to a first control signal outputted from the secondary side. The first control signal indicates the control information provided for a switch in the primary side. The signal transformer, coupled to the transmitter circuit, is configured to convert the ramp signal to generate an output signal. The output signal includes a positive-going component and a negative-going component to indicate the control information. The detection circuit, coupled to the signal transformer, is configured to detect the positive-going component and the negative-going component to provide the control information for the switch.

Abstract: A flyback converter to control conduction time in AC/DC conversion technology. The flyback converter includes a primary side and a secondary side. The primary side includes a main switch connecting a primary coil to the input of the flyback converter in series. The secondary side includes a secondary coil coupling with the output terminal of the flyback converter. When a switching frequency of the main switch is at a preset first on time in the range between the off frequency and the second switching frequency, the on-time of the main switch continuously changes corresponding to output load changes. When the switching frequency of the main switch is higher than the first switching frequency, the on time of the main switch is constant. The on time is controlled to change linearly, so as to avoid excessive changes in the output voltage ripples, thereby improving circuit efficiency.