Patents Assigned to Alta Devices, Inc.
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Patent number: 10932323Abstract: A reactor for chemical vapor deposition is equipped with an IR radiation compensating susceptor assembly that supports one or more semiconductor substrates above linear IR heater lamps arranged in a parallel array. A set of primary IR radiation reflectors beneath the lamps directs IR radiation back toward the susceptor in a pattern selected to provide uniform IR irradiation of the susceptor assembly to thereby uniformly heat the substrates. Secondary IR shield reflectors may be provided in selected patterns on the underside of the susceptor assembly as a fine tuning measure to direct IR radiation away from the assembly in a controlled pattern. The combined IR radiation reflectors have an IR signature that compensates for any non-uniform heating profile created by the linear IR heater lamp array. The heating profile of the lamp array might also be tailored in order to reduce the amount of compensation required to be supplied by the IR reflectors.Type: GrantFiled: August 3, 2015Date of Patent: February 23, 2021Assignee: ALTA DEVICES, INC.Inventors: Brian Burrows, Abril Cabreros, David M. Ishikawa, Brian Brown, Alexander Lerner
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Patent number: 10916676Abstract: Embodiments generally relate to optoelectronic semiconductor devices such as solar cells. In one aspect, a device includes an absorber layer made of gallium arsenide (GaAs) and having only one type of doping. An emitter layer is located closer than the absorber layer to a back side of the device and is made of a different material and having a higher bandgap than the absorber layer. A heterojunction is formed between the emitter layer and the absorber layer, and a p-n junction is formed between the emitter layer and the absorber layer and at least partially within the different material at a location offset from the heterojunction. An intermediate layer is located between the absorber layer and the emitter layer and provides the offset of the p-n junction from the heterojunction, and includes a graded layer and an ungraded back window layer.Type: GrantFiled: April 20, 2018Date of Patent: February 9, 2021Assignee: ALTA DEVICES, INC.Inventors: Brendan M. Kayes, Hui Nie, Isik C. Kizilyalli
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Patent number: 10873001Abstract: A growth structure having a lattice transition (or graded buffer) or an engineered growth structure with a desired lattice constant, different from a lattice constant of conventional substrates like GaAs, Si, Ge, InP, under a release layer or an etch stop layer is used as a seed crystal for growing optoelectronic devices. The optoelectronic device can be a photovoltaic device having one or more subcells (e.g., lattice-matched or lattice-mismatched subcells). The release layer can be removed using different processes to separate the optoelectronic device from the growth structure, which may be reused, or from the engineered growth structure. When using the etch stop layer, the growth structure or the engineered growth structure may be grinded or etched away. The engineered growth structure may be made from a layer transfer process between two wafers or from a ternary and/or a quaternary material. Methods for making the optoelectronic device are also described.Type: GrantFiled: October 18, 2019Date of Patent: December 22, 2020Assignee: ALTA DEVICES, INC.Inventors: Nikhil Jain, Andrew J. Ritenour, Ileana Rau, Claudio Canizares, Lori D. Washington, Gang He, Brendan M. Kayes
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Patent number: 10811557Abstract: A growth structure having a lattice transition under a release layer is used as a seed crystal for growth of optoelectronic devices. The optoelectronic device can be a single- or multi-junction photovoltaic device. The release layer can be selectively removed in an epitaxial lift-off (ELO) process to separate the optoelectronic device from the growth structure and leave the region with the lattice transition intact to reuse the growth structure to grow additional devices. A manufacturing method is described that includes providing a growth structure having a substrate and a lattice transition from a first lattice constant to a second lattice constant, depositing a release layer on the growth structure, depositing on the release layer an epitaxial layer having a lattice constant that matches the second lattice and including an optoelectronic device, and removing the release layer to separate the epitaxial layer and the optoelectronic device from the growth structure.Type: GrantFiled: June 14, 2018Date of Patent: October 20, 2020Assignee: Alta Devices, Inc.Inventors: Andrew J. Ritenour, Ileana Rau, Claudio Canizares, Lori D. Washington, Brendan M. Kayes, Gang He
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Patent number: 10797187Abstract: Methods and apparatus for converting electromagnetic radiation, such as solar energy, into electric energy with increased efficiency when compared to conventional solar cells are provided. A photovoltaic (PV) device generally includes a window layer; an absorber layer disposed below the window layer such that electrons are generated when photons travel through the window layer and are absorbed by the absorber layer; and a plurality of contacts for external connection coupled to the absorber layer, such that all of the contacts for external connection are disposed below the absorber layer and do not block any of the photons from reaching the absorber layer through the window layer. Locating all the contacts on the back side of the PV device avoids solar shadows caused by front side contacts, typically found in conventional solar cells. Therefore, PV devices described herein with back side contacts may allow for increased efficiency when compared to conventional solar cells.Type: GrantFiled: May 7, 2015Date of Patent: October 6, 2020Assignee: ALTA DEVICES, INC.Inventors: Gang He, Isik C. Kizilyalli, Melissa J. Archer, Harry A. Atwater, Thomas J. Gmitter, Andreas G. Hegedus, Gregg S. Higashi
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Patent number: 10797197Abstract: A thin film, flexible optoelectronic device is described. In an aspect, a method for fabricating a single junction optoelectronic device includes forming a p-n structure on a substrate, the p-n structure including a semiconductor having a lattice constant that matches a lattice constant of substrate, the semiconductor including a dilute nitride, and the single-junction optoelectronic device including the p-n structure; and separating the single-junction optoelectronic device from the substrate. The dilute nitride includes one or more of GaInNAs, GaInNAsSb, alloys thereof, or derivatives thereof.Type: GrantFiled: June 18, 2018Date of Patent: October 6, 2020Assignee: ALTA DEVICES, INC.Inventors: Nikhil Jain, Brendan M. Kayes, Gang He
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Patent number: 10741712Abstract: A photovoltaic module is disclosed. The photovoltaic module comprises an array of shingled tiles disposed between a transparent front substrate and a back substrate, wherein the array of shingled tiles comprises a plurality of photovoltaic tiles in electrically contact with each other and positioned in overlapping rows. Each photovoltaic tile comprises a front metallic contact layer disposed on an epitaxial film stack disposed on a back metallic contact layer disposed on a support carrier layer. The photovoltaic module includes at least one busbar in electrical contact with the array of shingled tiles and disposed between the front and back glass substrates. The photovoltaic module also includes an encapsulation layer between the front and back glass substrates.Type: GrantFiled: February 15, 2012Date of Patent: August 11, 2020Assignee: ALTA DEVICES, INC.Inventors: Gang He, Laila S. Mattos, Shawn Scully
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Patent number: 10718051Abstract: An example method for chemical vapor deposition (CVD) of thin films includes providing a deposition zone in a reaction chamber having a fixed showerhead assembly that introduces CVD reactive gases under positive pressure into the deposition zone. The example method also includes moving a substrate carrier beneath the showerhead assembly in the reaction chamber, the substrate carrier supports and transports at least one substrate within the reaction chamber so as to be subjected to a CVD process by the CVD reactive gases. The example method also includes providing a liner assembly shrouding the deposition zone and including at least one partial enclosure around the deposition zone isolating the deposition zone and the substrate carrier, whereby solid reaction byproducts are plated onto material in the liner assembly and gaseous reaction byproducts flow radially outward, the liner assembly being mounted on the substrate carrier for motion with the substrate carrier.Type: GrantFiled: May 4, 2018Date of Patent: July 21, 2020Assignee: ALTA DEVICES, INC.Inventors: Gregg Higashi, Khurshed Sorabji, Lori D. Washington
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Patent number: 10693027Abstract: A photovoltaic module comprises a back substrate having a plurality of conductive interconnects on top thereof. A conductive interconnect includes a first contact region and a second contact region. The photovoltaic module further comprises a plurality of photovoltaic cells comprising front electrodes disposed on a front surface of a photovoltaic layer on top of back electrodes on top of a support substrate. A plurality of back vias extending through the support substrate of a first cell form an electrical contact between the back electrodes and the second contact region, and a plurality of front vias extending through the support substrate, the back electrodes and the photovoltaic layer of a second cell form an electrical contact between the front electrodes and the first contact region, and is insulated from an electrical contact with the back electrodes and a P side of the photovoltaic layer.Type: GrantFiled: January 13, 2016Date of Patent: June 23, 2020Assignee: ALTA DEVICES, INC.Inventors: Liguang Lan, Linlin Yang, Jian Ding
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Patent number: 10615304Abstract: An optoelectronic device and a method for fabricating the optoelectronic device are disclosed. The optoelectronic device comprises a p-n structure, a patterned dielectric layer comprising a dielectric material and a metal layer disposed on the dielectric layer. The metal layer makes one or more contact to the p-n structure through the patterned dielectric layer. The dielectric material may be chemically resistant to acids and may provide adhesion to the p-n structure and the metal layer. The method for fabricating an optoelectronic device comprises providing a p-n structure, providing a dielectric layer on the p-n structure and providing a metal layer on the dielectric layer and then lifting the device off the substrate, such that after the lift off the p-n structure is closer than the patterned dielectric layer to a front side of the device; wherein the device comprises the p-n structure, the patterned dielectric layer, and the metal layer.Type: GrantFiled: December 11, 2017Date of Patent: April 7, 2020Assignee: ALTA DEVICES, INC.Inventors: Brendan M. Kayes, Melissa J. Archer, Thomas J. Gmitter, Gang He
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Patent number: 10586884Abstract: A multi-junction optoelectronic device and method of fabrication are disclosed. In an aspect, the method includes forming a first p-n structure on a substrate, the first p-n structure including a semiconductor having a lattice constant that matches a lattice constant of the substrate; forming one or more additional p-n structures on the first p-n structure, each of the one or more additional p-n structures including a semiconductor having a lattice constant that matches the lattice constant of the substrate, the semiconductor of a last of the one or more additional p-n structures that is formed including a dilute nitride, and the multi-junction optoelectronic device including the first p-n structure and the one or more additional p-n structures; and separating the multi-junction optoelectronic device from the substrate. In some implementations, it is possible to have the dilute nitride followed by a group IV p-n structure.Type: GrantFiled: June 18, 2018Date of Patent: March 10, 2020Assignee: ALTA DEVICES, INC.Inventors: Nikhil Jain, Brendan M. Kayes, Gang He
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Patent number: 10505058Abstract: Methods and apparatus are provided for converting electromagnetic radiation, such as solar energy, into electric energy with increased efficiency when compared to conventional solar cells. One embodiment of the present invention provides a photovoltaic (PV) device. The PV device comprises an absorber layer made of a compound semiconductor; and an emitter layer located closer than the absorber layer to a first side of the device. The PV device includes a p-n junction formed between the emitter layer and the absorber layer, the p-n junction causing a voltage to be generated in the device in response to the device being exposed to light at a second side of the device. Such innovations may allow for greater efficiency and flexibility in PV devices when compared to conventional solar cells.Type: GrantFiled: May 6, 2019Date of Patent: December 10, 2019Assignee: ALTA DEVICES, INC.Inventors: Melissa J. Archer, Thomas J. Gmitter, Gang He, Gregg Higashi
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Patent number: 10483410Abstract: System and method of providing a photovoltaic (PV) cell having a cushion layer to alleviate stress impact between a front metal contact and a thin film PV layer. A cushion layer is disposed between an extraction electrode and a photovoltaic (PV) surface. The cushion layer is made of a nonconductive material and has a plurality of vias filled with a conductive material to provide electrical continuity between the bus bar and the PV layer. The cushion layer may be made of a flexible material preferably with rigidity that matches the substrate. Thus, the cushion layer can effectively protect the PV layer from physical damage due to tactile contact with the front metal contact.Type: GrantFiled: October 20, 2015Date of Patent: November 19, 2019Assignee: ALTA DEVICES, INC.Inventors: Linlin Yang, Liguang Lan, Chris France, Gang He, Erhong Li, Jose Corbacho
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Patent number: 10418933Abstract: A flexible circuit that allows a standardized connection interface to connect flexible solar cell(s) for easy integration into electronics devices. This interconnection scheme does not limit the intrinsic solar cell flexibility and may conform to standard design practices in electronic device manufacturing. In an aspect, a solar module is described that includes one or more solar panels and a flexible trace or interconnect having conductive wires inside an insulation material. In another aspect, an electronic device is described that includes a circuit board, one or more solar panels and a flexible trace or interconnect having conductive wires inside an insulation material. The electronic device may be an internet-of-things (IoT) device or an unmanned aerial vehicle (UAV), for example. In yet another aspect, a lighting module is described that includes one or more lighting panels and a flexible trace or interconnect having conductive wires inside an insulation material.Type: GrantFiled: December 7, 2016Date of Patent: September 17, 2019Assignee: ALTA DEVICES, INC.Inventors: Christopher Earl France, Linlin Yang, Liguang Lan
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Patent number: 10337087Abstract: Embodiments described herein provide processes for forming and removing epitaxial films and materials from growth wafers by epitaxial lift off (ELO) processes. In some embodiments, the growth wafer has edge surfaces with an off-axis orientation which is utilized during the ELO process. The off-axis orientation of the edge surface provides an additional variable for controlling the etch rate during the ELO process and therefore the etch front may be modulated to prevent the formation of high stress points which reduces or prevents stressing and cracking the epitaxial film stack. In one embodiment, the growth wafer is rectangular and has an edge surface with an off-axis orientation rotated by an angle greater than 0° and up to 90° relative to an edge orientation of <110> at 0°.Type: GrantFiled: January 19, 2018Date of Patent: July 2, 2019Assignee: ALTA DEVICES, INC.Inventors: Thomas Gmitter, Gang He, Melissa Archer, Siew Neo
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Patent number: 10326033Abstract: Methods and apparatus are provided for converting electromagnetic radiation, such as solar energy, into electric energy with increased efficiency when compared to conventional solar cells. One embodiment of the present invention provides a photovoltaic (PV) device. The PV device comprises an absorber layer made of a compound semiconductor; and an emitter layer located closer than the absorber layer to a first side of the device. The PV device includes a p-n junction formed between the emitter layer and the absorber layer, the p-n junction causing a voltage to be generated in the device in response to the device being exposed to light at a second side of the device. Such innovations may allow for greater efficiency and flexibility in PV devices when compared to conventional solar cells.Type: GrantFiled: February 20, 2013Date of Patent: June 18, 2019Assignee: ALTA DEVICES, INC.Inventors: Melissa J. Archer, Thomas J. Gmitter, Gang He, Gregg Higashi
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Patent number: 10259206Abstract: Epitaxial lift off systems and methods are presented. In one embodiment a tape is disposed on the opposite side of the epitaxial material than the substrate is used to hold the epitaxial material during the etching and removal steps of the ELO process. In various embodiments, the apparatus for removing the ELO film from the substrates without damaging the ELO film may include an etchant reservoir, substrate handling and tape handling mechanisms, including mechanisms to manipulate (e.g., cause tension, peel, widen the etch gap, etc.) the lift off component during the lift off process.Type: GrantFiled: March 2, 2011Date of Patent: April 16, 2019Assignee: ALTA DEVICES, INC.Inventors: Brian Brown, Brian Burrows, David Berkstressor, Gang He, Thomas J Gmitter
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Patent number: 10204831Abstract: Embodiments of the invention generally relate to apparatuses and methods for producing epitaxial thin films and devices by epitaxial lift off (ELO) processes. In one embodiment, a method for forming thin film devices during an ELO process is provided which includes coupling a plurality of substrates to an elongated support tape, wherein each substrate contains an epitaxial film disposed over a sacrificial layer disposed over a wafer, exposing the substrates to an etchant during an etching process while moving the elongated support tape, and etching the sacrificial layers and peeling the epitaxial films from the wafers while moving the elongated support tape. Embodiments also include several apparatuses, continuous-type as well as a batch-type apparatuses, for forming the epitaxial thin films and devices, including an apparatus for removing the support tape and epitaxial films from the wafers on which the epitaxial films were grown.Type: GrantFiled: September 22, 2015Date of Patent: February 12, 2019Assignee: ALTA DEVICES, INC.Inventors: Thomas Gmitter, Gang He, Melissa Archer, Andreas Hegedus
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Patent number: 10076896Abstract: A method and system for connecting a plurality of materials using pressure and curing is disclosed. The method provides for: a) receiving the plurality of materials on the vacuum conveyor; b) conveying the received plurality of materials from the first location to a second location along the vacuum conveyor; c) applying a predetermined vacuum pressure; and d) curing the compressed plurality of materials. The system comprises a vacuum conveyor for receiving the plurality of materials at a first location, a moving belt adaptively positioned above the vacuum conveyor at a second location and the vacuum conveyor and the moving belt are arranged to be driven in a predetermined relation to one another, a vacuum pressure source for applying a predetermined vacuum pressure creating a force compressing the plurality of materials; and a curing source at a second location for curing the compressed plurality of materials.Type: GrantFiled: June 23, 2016Date of Patent: September 18, 2018Assignee: ALTA DEVICES, INC.Inventor: Khurshed Sorabji
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Patent number: 10066297Abstract: A showerhead for a semiconductor processing reactor formed by an array of showerhead tiles. Each showerhead tile has a plurality of process gas apertures, which may be in a central area of the tile or may extend over the entire tile. Each showerhead tile can be dimensioned for processing a respective substrate or a plurality of substrates or the array can be dimensioned for processing a substrate. An exhaust region surrounds the process gas apertures. The exhaust region has at least one exhaust aperture, and may include an exhaust slot, a plurality of connected exhaust slots or a plurality of exhaust apertures. The exhaust region surrounds the array of showerhead tiles, or a respective portion of the exhaust region surrounds the plurality of process gas apertures in each showerhead tile or group of showerhead tiles. A gas curtain aperture may be between the exhaust region and the process gas apertures of one of the showerhead tiles or adjacent to the central area of the tile.Type: GrantFiled: October 27, 2015Date of Patent: September 4, 2018Assignee: ALTA DEVICES, INC.Inventors: Gregg Higashi, Alexander Lerner, Khurshed Sorabji, Lori D. Washington, Andreas Hegedus