Patents Assigned to Amazing Microelectronics Corp.
  • Patent number: 8431999
    Abstract: A low capacitance transient voltage suppressor is disclosed. The suppressor comprises an N-type heavily doped substrate and an epitaxial layer formed on the substrate. At least one steering diode structure formed in the epitaxial layer comprises a diode lightly doped well and a first P-type lightly doped well, wherein a P-type heavily doped area is formed in the diode lightly doped well and a first N-type heavily doped area and a second P-type heavily doped area are formed in the first P-type lightly doped well. A second P-type lightly doped well having two N-type heavily doped areas is formed in the epitaxial layer. In addition, an N-type heavily doped well and at least one deep isolation trench are formed in the epitaxial layer, wherein the trench has a depth greater than or equal to depths of all the doped wells, so as to separate at least one doped well.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: April 30, 2013
    Assignee: Amazing Microelectronic Corp.
    Inventors: Yu-Shu Shen, Kun-Hsien Lin, Che-Hao Chuang, Ryan Hsin-Chin Jiang
  • Patent number: 8330538
    Abstract: An improved self-oscillating audio amplifier and a method for restraining audio distortion of the self-oscillating audio amplifier are disclosed. The improved self-oscillating audio amplifier comprises a distortion restraint unit configured to detect whether modulated audio signals outputted from the self-oscillating audio amplifier is distorted and, if so, to restrain the distortion. The method for restraining audio distortion of the self-oscillating audio amplifier includes the following steps of: determining whether the modulated audio signals outputted from an audio amplifier positive output terminal is distorted by a first flip-flop set, and if yes, restraining the distortion of the modulated audio signals outputted from the audio amplifier positive output terminal; and outputting the modulated audio signals to drive a speaker by the audio amplifier positive output terminal and an audio amplifier negative output terminal.
    Type: Grant
    Filed: November 11, 2009
    Date of Patent: December 11, 2012
    Assignee: Amazing Microelectronic Corp.
    Inventors: Ming-Hsiung Chen, Shang-Shu Chung, Tung-Sheng Ku
  • Patent number: 8304838
    Abstract: An electrostatic discharge protection device structure is disclosed, which comprises a semiconductor substrate and an N-type epitaxial layer arranged on the semiconductor substrate. At least one snapback cascade structure is arranged in the N-type epitaxial layer, wherein the snapback cascade structure further comprises first and second P-type wells arranged in the N-type epitaxial layer. First and second heavily doped areas arranged in the first P-type well respectively belong to opposite types. And, third and fourth heavily doped areas arranged in the second P-type well respectively belong to opposite types, wherein the second and third heavily doped areas respectively belong to opposite types and are electrically connected with each other. When the first heavily doped area receives an ESD signal, an ESD current flows from the first heavily doped area to the fourth heavily doped area through the first P-type well, the N-type epitaxial layer, and the second P-type well.
    Type: Grant
    Filed: August 23, 2011
    Date of Patent: November 6, 2012
    Assignee: Amazing Microelectronics Corp.
    Inventors: Zi-Ping Chen, Tung-Yang Chen, Kun-Hsien Lin, Ryan Hsin-Chin Jiang
  • Patent number: 8237193
    Abstract: A lateral transient voltage suppressor for low-voltage applications. The suppressor includes an N-type heavily doped substrate and at least two clamp diode structures horizontally arranged in the N-type heavily doped substrate. Each clamp diode structure further includes a clamp well arranged in the N-type heavily doped substrate and having a first heavily doped area and a second heavily doped area. The first and second heavily doped areas respectively belong to opposite conductivity types. There is a plurality of deep isolation trenches arranged in the N-type heavily doped substrate and having a depth greater than depth of the clamp well. The deep isolation trenches can separate each clamp well. The present invention avoids the huge leakage current to be suitable for low-voltage application.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: August 7, 2012
    Assignee: Amazing Microelectronic Corp.
    Inventors: Che-Hao Chuang, Kun-Hsien Lin, Ryan Hsin-Chin Jiang
  • Patent number: 8232601
    Abstract: The present invention relates a transient voltage suppressor (TVS) for directional ESD protection. The TVS includes: a conductivity type substrate; a first type lightly doped region, having a first type heavily doped region arranged therein; a second type lightly doped region, having a second type heavily doped region and a third type heavily doped region arranged therein; a third type lightly doped region, having a fourth type heavily doped region arranged therein; a plurality of closed isolation trenches, arranged on the conductivity type substrate, wherein at least one of the plurality of closed isolation trenches is neighbored one of the type lightly doped regions; and a first pin. Accordingly, the TVS of present invention may adaptively provide effective ESD protection under positive and negative ESD stresses, improve the efficiency of ESD protection within the limited layout area.
    Type: Grant
    Filed: May 18, 2012
    Date of Patent: July 31, 2012
    Assignee: Amazing Microelectronic Corp.
    Inventors: Kun-Hsien Lin, Che-Hao Chuang, Ryan Hsin-Chin Jiang
  • Patent number: 8217462
    Abstract: The present invention relates a transient voltage suppressor (TVS) for directional ESD protection. The TVS includes: a conductivity type substrate; a first type lightly doped region, having a first type heavily doped region arranged therein; a second type lightly doped region, having a second type heavily doped region and a third type heavily doped region arranged therein; a third type lightly doped region, having a fourth type heavily doped region arranged therein; a plurality of closed isolation trenches, arranged on the conductivity type substrate, wherein at least one of the plurality of closed isolation trenches is neighbored one of the type lightly doped regions; and a first pin. Accordingly, the TVS of present invention may adaptively provide effective ESD protection under positive and negative ESD stresses, improve the efficiency of ESD protection within the limited layout area.
    Type: Grant
    Filed: September 22, 2010
    Date of Patent: July 10, 2012
    Assignee: Amazing Microelectronic Corp.
    Inventors: Kun-Hsien Lin, Che-Hao Chuang, Ryan Hsin-Chin Jiang
  • Patent number: 8217421
    Abstract: A new ESD protection device with an integrated-circuit vertical transistor structure is disclosed, which includes a heavily doped p-type substrate (P+ substrate), a n-type well (N well) in the P+ substrate, a heavily doped p-type diffusion (P+ diffusion) in the N well, a heavily doped n-type diffusion (N+ diffusion) in the N well, and a p-type well (P well) surrounding the N well in the P+ substrate. A bond pad is connected to both the P+ and N+ diffusions, and a ground is coupled to the P+ substrate. Another P+ diffusion is implanted in the N well or another N+ diffusion is implanted in the P well to form a Zener diode, which behaves as a trigger for the PNP transistor when a positive ESD zaps. A parasitic diode is formed at the junction between the P+ substrate and the N well, to bypass a negative ESD stress on the bond pad.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: July 10, 2012
    Assignee: Amazing Microelectronic Corp.
    Inventors: Zi-Ping Chen, Kun-Hsien Lin, Ryan Hsin-Chin Jiang
  • Patent number: 8169000
    Abstract: A lateral transient voltage suppressor with ultra low capacitance is disclosed. The suppressor comprises a first conductivity type substrate and at least one diode cascade structure arranged in the first conductivity type substrate. The cascade structure further comprises at least one second conductivity type lightly doped well and at least one first conductivity type lightly doped well, wherein there are two heavily doped areas arranged in the second conductivity type lightly doped well and the first conductivity type lightly doped well. The cascade structure neighbors a second conductivity type well, wherein there are three heavily doped areas arranged in the second conductivity type well. The suppressor further comprises a plurality of deep isolation trenches arranged in the first conductivity type substrate and having a depth greater than depths of the second conductivity type lightly doped well, the second conductivity type well and the first conductivity type lightly doped well.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: May 1, 2012
    Assignee: Amazing Microelectronic Corp.
    Inventors: Che-Hao Chuang, Kun-Hsien Lin, Ryan Hsin-Chin Jiang
  • Patent number: 8116049
    Abstract: The invention discloses a transient voltage detection circuit suitable for an electronic system. The electronic system includes a high voltage line and a low voltage line. The transient voltage detection circuit includes at least one detection circuit and a judge module. Each detection circuit includes a P-typed transistor and/or an N-typed transistor, a capacitor and a detection node. The transistor is coupled with the capacitor, and the detection node is located between the transistor and the capacitor. The judge module is coupled to each of the detection nodes. The judge module generates a judgment according to voltage levels of the detection nodes. Accordingly, the transient voltage detection circuit is formed. The electronic system may selectively execute a protective action according to the judgment.
    Type: Grant
    Filed: November 24, 2009
    Date of Patent: February 14, 2012
    Assignee: Amazing Microelectronic Corp.
    Inventors: Ming-Dou Ker, Hsin-Chin Jiang, Wen-Yi Chen
  • Patent number: 8067952
    Abstract: An ESD detection circuit for detecting a level of an ESD voltage on a power rail is provided. The ESD detection circuit includes a resistive component, a diode unit, and a controller. The resistive component is coupled between a detection node and a ground node corresponding to the power rail. The diode unit is coupled between the power rail and the detection node in a forward direction toward the power rail. The controller, coupled to the detection node, is used for determining the level of the ESD voltage based on the voltage of the detection node and the breakdown voltage of the diode unit.
    Type: Grant
    Filed: April 18, 2008
    Date of Patent: November 29, 2011
    Assignee: Amazing Microelectronic Corp.
    Inventors: Ming-Dou Ker, Wen-Yi Chen, Hsin-Chin Jiang
  • Patent number: 8049247
    Abstract: The present invention discloses an asymmetric bidirectional silicon-controlled rectifier, which comprises: a second conduction type substrate; a first conduction type undoped epitaxial layer formed on the substrate; a first well and a second well both formed inside the undoped epitaxial layer and separated by a portion of the undoped epitaxial layer; a first buried layer formed in a junction between the first well and the substrate; a second buried layer formed in a junction between the second well and the substrate; a first and a second semiconductor area with opposite conduction type both formed inside the first well; a third and a fourth semiconductor area with opposite conduction type both formed inside the second well, wherein the first and second semiconductor areas are connected to the anode of the silicon-controlled rectifier, and the third and fourth semiconductor areas are connected to the cathode of the silicon-controlled rectifier.
    Type: Grant
    Filed: May 1, 2008
    Date of Patent: November 1, 2011
    Assignee: Amazing Microelectronic Corp.
    Inventors: Tang-Kuei Tseng, Che-Hao Chuang, Ryan Hsin-Chin Jiang, Ming-Dou Ker
  • Patent number: 7999610
    Abstract: A Class D amplifier capable of setting restraint power is provided, which comprises: an audio amplification unit, a pulse width modulation (PWM) unit, a first pre-drive unit, a second pre-drive unit, a first power transistor set, a second power transistor set and a power restraint unit. The power restraint unit has a comparator circuit and a power restraint circuit. The comparator circuit is configured to compare the level of first/second amplified audio signals against the level of a first reference voltage that is externally settable. When the high level of the first/second amplified audio signals is higher than the level of the first reference voltage, the comparator circuit outputs a first comparison signal and a second comparison signal to the power restraint circuit to restrain the power.
    Type: Grant
    Filed: November 11, 2009
    Date of Patent: August 16, 2011
    Assignee: Amazing Microelectronic Corp.
    Inventors: Ming-Hsiung Chen, Shang-Shu Chung, Tung-Sheng Ku
  • Patent number: 7989923
    Abstract: A bidirectional transient voltage suppression device is disclosed. The bi-directional transient voltage suppression device comprises a semiconductor die. The semiconductor die has a multi-layer structure comprising a semiconductor substrate of a first conductivity type, a buried layer of a second conductivity type, an epitaxial layer, and five diffused regions. The buried layer and the semiconductor substrate form a first semiconductor junction. The first diffused region of the second conductivity type and the semiconductor substrate form a second semiconductor junction. The fourth diffused region of the first conductivity type and the third diffused region of the second conductivity type form a third semiconductor junction. The fifth diffused region of the first conductivity type and the second diffused region of the second conductivity type form a fourth semiconductor junction.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: August 2, 2011
    Assignee: Amazing Microelectronic Corp.
    Inventors: Tang-Kuei Tseng, Kun-Hsien Lin, Hsin-Chin Jiang
  • Patent number: 7974053
    Abstract: An ESD protection circuit for a differential I/O pair is provided. The circuit includes an ESD detection circuit, a discharge device, and four diodes. The first diode is coupled between the first I/O pin and the discharge device in a forward direction toward the discharge device. The second diode is coupled between the second I/O pin and the discharge device in a forward direction toward the second I/O pin. The third diode is coupled between the discharge device and the positive power line in a forward direction toward the positive power line. The fourth diode is coupled between the discharge device and the negative power line in a forward direction toward the discharge device. Via an output end, the ESD detection circuit triggers the discharge device during ESD events.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: July 5, 2011
    Assignee: Amazing Microelectronic Corp
    Inventors: Ming-Dou Ker, Yuan-Wen Hsiao, Hsin-Chin Jiang
  • Patent number: 7944297
    Abstract: A class D amplifier including a PWM circuit, a buffer amplifying circuit, a low-pass filter, and two current sources is provided. The PWM circuit transfers an analog signal into a PWM signal. The buffer amplifying circuit amplifies the PWM signal and generates an amplified signal. The low-pass filter will filter high frequency components out from the amplified signal and then transmit the filtered signal to a loading of the class D amplifier. The two current sources provide currents flowing into and out from a feedback node in the PWM circuit, respectively. The charging and discharging provided by the two current sources can generate a triangular signal for the PWM circuit.
    Type: Grant
    Filed: December 11, 2008
    Date of Patent: May 17, 2011
    Assignee: Amazing Microelectronic Corp.
    Inventors: Ming-Hsiung Chen, Shang-Shu Chung, Tung-Sheng Ku
  • Patent number: 7944315
    Abstract: The invention discloses a programmable voltage-controlled oscillator. The programmable voltage-controlled oscillator has an output frequency. The programmable voltage-controlled oscillator includes a control unit, a current selector, a current mirror unit, an oscillator module, and a one-time-programming component. The one-time-programming component is used for providing a programmable code. The current selector is used for generating a selected current according to the programmable code. The current mirror unit is used for generating a first mirroring current and a second mirroring current according to the selected current. The oscillator module is used for oscillating according to the first mirroring current and the second mirroring current. After the programmable code is tuned to drive the output frequency to approach a predetermined frequency, the control unit will burn the tuned programmable code into one-time-programming component.
    Type: Grant
    Filed: July 23, 2009
    Date of Patent: May 17, 2011
    Assignee: Amazing Microelectronic Corp.
    Inventor: Wei-Cheng Lin
  • Patent number: 7915955
    Abstract: The invention discloses a bias balancing circuit. The bias balancing circuit is used for balancing an output voltage outputted by an amplifier module. The amplifier module has a variable gain. The bias balancing circuit comprises a comparator and a voltage selector. The comparator is used for comparing the output voltage and a reference voltage, to generate a comparison signal. The voltage selector is used for generating a selected voltage according to the comparison signal. When the variable gain is changed to result in an offset from the output voltage to the reference voltage, the bias balancing circuit is capable of balancing the output voltage toward the reference voltage by the selected voltage.
    Type: Grant
    Filed: July 23, 2009
    Date of Patent: March 29, 2011
    Assignee: Amazing Microelectronic Corp.
    Inventor: Wei-Cheng Lin
  • Patent number: 7915638
    Abstract: The present invention discloses a symmetric bidirectional silicon-controlled rectifier, which comprises: a substrate; a buried layer formed on the substrate; a first well, a middle region and a second well, which are sequentially formed on the buried layer side-by-side; a first semiconductor area and a second semiconductor area both formed inside the first well; a third semiconductor area formed in a junction between the first well and the middle region, wherein a first gate is formed over a region between the second and third semiconductor areas; a fourth semiconductor area and a fifth semiconductor area both formed inside the second well; a sixth semiconductor area formed in a junction between the second well and the middle region, wherein a second gate is formed over a region between the fifth and sixth semiconductor areas.
    Type: Grant
    Filed: May 1, 2008
    Date of Patent: March 29, 2011
    Assignee: Amazing Microelectronic Corp.
    Inventors: Tang-Kuei Tseng, Che-Hao Chuang, Ryan Hsin-Chin Jiang, Ming-Dou Ker
  • Patent number: 7889470
    Abstract: An ESD protection circuit is provided. The circuit includes a discharging component, a diode, and an ESD detection circuit. The discharging component is coupled between an input/output pad and a first power line of an IC. The diode is coupled between the input/output pad and a second power line of the IC in a forward direction toward the second power line. The ESD detection circuit includes a capacitor, a resistor, and a triggering component. The capacitor and the resistor are formed in series and coupled between the first power line and the second power line. The triggering component has a positive power end coupled to the input/output pad and a negative power end coupled to the first power line. An input of the triggering component is coupled to a node between the capacitor and the resistor.
    Type: Grant
    Filed: February 1, 2010
    Date of Patent: February 15, 2011
    Assignee: Amazing Microelectronic Corp.
    Inventors: Ming-Dou Ker, Yuan-Wen Hsiao, Ryan Hsin-Chin Jiang
  • Patent number: 7855597
    Abstract: The invention discloses a class-D amplifier, which is used for driving a two-terminal load according to a set of analog signals. The D-class amplifier includes a pulse-width modulation (PWM) circuit, a signal processing circuit and a driving amplifier circuit. The PWM circuit receives the set of analog signals and converts them into a set of PWM signals with identical phase. The signal processing circuit generates a set of pulse signals which are attached to the set of PWM signals respectively. The driving amplifier circuit is coupled between the signal processing circuit and the two-terminal load. The driving amplifier circuit receives and amplifies the set of PWM signals. According to the set of PWM signals, the driving amplification circuit drives the two-terminal in a filterless way.
    Type: Grant
    Filed: November 20, 2009
    Date of Patent: December 21, 2010
    Assignee: Amazing Microelectronic Corp.
    Inventors: Ming-Hsiung Chen, Shang-Shu Chung, Tung-Sheng Ku