Abstract: An apparatus having a plurality of memory cells and a circuit is disclosed. The memory cells may be configured to store a plurality of context variables. The circuit may be configured to predict a plurality of next states in each of a plurality of next cycles that follow a current cycle of an arithmetic decode. A subset of the context variables corresponding to the next states are generally copied from the memory cells to a buffer. A selected one or more of the context variables may be read from the buffer based on a current binary value decoded in the current cycle.

Abstract: An apparatus comprising a first sensor, a second sensor, a processor and a controller. The first sensor may generate a first signal in response to a first type of activity. The second sensor may generate a second signal in response to a second type of activity. The processor may be configured to operate in one of a plurality of power consumption stages. The first power consumption stage waits for a wakeup signal. The second power consumption stage captures a video signal of a targeted view of an environment. The controller may be configured to generate a first intermediate signal if the first type of activity is detected. The controller may generate the wakeup signal if the first intermediate signal is present and the second signal relates to the first signal. The wakeup signal may activate one or more power consuming video processing features of the processor.

Abstract: An apparatus includes an input circuit configured to receive a sequence of pictures and a processing circuit. The processing circuit may be configured to (i) remap image data of a first picture based upon a respective picture brightness values for the first picture and a second picture selected from the sequence of pictures, and (ii) perform temporal filtering between the first picture and the second picture utilizing the remapped image data.

Abstract: An arbiter circuit and a translation circuit. The arbiter circuit may be configured to generate a first address signal in a virtual memory space by arbitrating among a plurality of clients to access a physical memory space. The clients may be classified as either privileged clients or non-privileged clients. The physical memory space may comprise at least one secure space. The secure space may be used to protect data of the privileged clients from being accessed by the non-privileged clients. The translation circuit may be configured to generate a second address signal by translating a page in the virtual memory space into the physical memory space. The page may correspond to a particular one of the clients that won the arbitration. The page may translate into the secure space if the particular client is one of the privileged clients. The page may also translate outside the secure space if the particular client is one of the non-privileged clients.

Abstract: An apparatus comprising a sensor, an interface and a processor. The sensor may be configured to generate a video signal based on a targeted view of a driver. The interface may be configured to receive status information about one or more components of a vehicle. The processor may be configured to generate a control signal in response to a determined field of view of the driver. The control signal may be used to adjust one or more mirrors of the vehicle. The field of view may be determined based on (i) the video signal and (ii) the status information.

Abstract: An apparatus having a circuit and a processor is disclosed. The circuit may be configured to (i) generate a plurality of sets of coefficients by compressing a block in a picture in a video signal at a plurality of different sizes of coding units in a coding tree unit and (ii) generate an output signal by entropy encoding a particular one of the sets of coefficients. Each set of coefficients may be generated in a corresponding one of a plurality of pipelines that operate in parallel. The processor may be configured to select the particular set of coefficients in response to the compressing.

Abstract: A method of rate-distortion computations for video compression is disclosed. The method may include steps (A) to (C). Step (A) may generate a plurality of transform coefficients from a residual block of the video using a circuit. Step (B) may generate a block distortion value (i) based on the transform coefficients and (ii) independent of a plurality of inverse transform samples produced from the residual block. Step (C) may generate a rate-distortion value from the block distortion value.

Abstract: An apparatus comprising a sensor and a processor. The sensor may be configured to capture a first video signal having a first field of view. The processor may be configured to generate a second video signal having a second field of view and a third video signal having a third field of view. The second video signal may generate the second field of view to include a first portion of the first video signal. The third video signal may generate the third field of view to include a second portion of the first video signal. The second portion may be processed to remove possible warping present on a bottom portion of the first video signal. The first and second portions may comprise an area less than the first field of view.

Abstract: An apparatus having a server is disclosed. The server may be configured to (i) receive via a network a first clip of video generated by a camera, (ii) receive via the network first information to edit the first clip, (iii) receive via the network one or more segments of a second clip of video generated by the camera as identified by the first information and (iv) create a third clip of video by editing the segments according to the first information. The second clip is generally a higher resolution version of the first clip. The third clip may have the higher resolution.

Abstract: A method for level-based motion detection in a sequence of pictures is disclosed. Step (A) of the method may compute one or more local tonal values in an area around a sample of a target picture in the sequence of pictures. Step (B) may compare the target picture and a reference picture in the sequence of pictures in the area to compute a motion score. Step (C) generally detects a motion of the sample based on the local tonal values, the motion score and one or more gain settings with a circuit.

Abstract: An apparatus comprising an interface and a processor. The interface may be configured to (i) receive a first clip of video generated by a camera through a network, (ii) receive edit information through the network, (iii) transfer parsing information to the camera and (iv) receive one or more segments of a second clip of video generated by the camera as identified by the parsing information through the network. The processor may be configured to (i) send/receive data to/from the interface, (ii) edit the first clip in response to the edit information, (iii) generate the parsing information based on the edit information and (iv) create a third clip of video by editing the segments according to the edit information. The second clip may be a higher resolution version of the first clip. The third clip may have the higher resolution.

Abstract: An apparatus having a first circuit and a second circuit is disclosed. The first circuit may be configured to (i) generate a sequence of intermediate matrices by multiplying a sequence of original matrices by a predetermined matrix and (ii) write the intermediate matrices into a memory in a first order that alternates between (a) a first of the intermediate matrices in a row order and (b) a second of the intermediate matrices in a column order. The second circuit may be configured to (i) read the sequence of the intermediate matrices from the memory in a second order that alternates between (a) the first intermediate matrix in the column order and (b) the second intermediate matrix in the row order and (ii) generate a sequence of transform matrices by multiplying the intermediate matrices as read from the memory by another predetermined matrix.

Abstract: An apparatus comprising a sensor, a motion detector, a memory and a processor. The sensor may be configured to capture a first image. The motion detector may be configured to initiate the capture of the first image. The memory may be configured to store exposure data associated with the first image. The processor may be configured to determine if the stored exposure data is usable to capture a second image.

Abstract: An apparatus comprising a scaling circuit, a luma circuit and a blending circuit. The scaling circuit may generate a plurality of scaled frames in response to a first plurality of frames generated by a sensor. The first plurality of frames may have a first exposure. The luma circuit may generate an average luminance value for each of a plurality of processed pixels in each of a second of the plurality of frames generated by the sensor. The second of the plurality of frames may have a second exposure and each of the average luminance values is calculated based on a plurality of neighboring pixels in a neighborhood of the processed pixel.

Abstract: A method for representing a plurality of data samples is disclosed. The method generally includes steps (A) and (B). Step (A) may generate an exponent common to all of the data samples using a circuit. Step (B) may generate a plurality of mantissae based on the exponent. Each of the mantissae generally corresponds to a different one of the data samples.

Abstract: A method for synchronizing a first circuit to an electro-optical sensor is disclosed. The method generally includes steps (A) to (D). Step (A) may generate with the first circuit a configuration signal that conveys a request to capture at least one frame of a plurality of periodic frames. Step (B) may receive the periodic frames at a second circuit from the electro-optical sensor. Step (C) may discard a first frame of the periodic frames where the first frame precedes the request. Step (D) may store a plurality of active pixels in a second frame of the periodic frames in a memory where the second frame follows the request. The second circuit is generally a hardware implementation.

Abstract: An apparatus including a memory, a first circuit and a second circuit. The memory may be divided into eight banks. Each bank may store a portion of a three-dimensional (3D) color correction lookup table. The first circuit may be configured to address the memory in response to an index of an input point. The second circuit may be configured to arrange outputs of the eight banks for color interpolation.

Abstract: An apparatus comprising a decoder circuit, a memory circuit and a processing circuit. The decoder circuit may be configured to generate a first intermediate signal having a plurality of coefficients of a target layer and a plurality of coefficients of a base layer, in response to an input bitstream. The memory circuit may be configured to (i) store the first intermediate signal and (ii) present (a) a second intermediate signal comprising the plurality of coefficients of the target layer or (b) a third intermediate signal comprising the plurality of coefficients of the base layer.

Abstract: A method for temporal filtering with local neighborhood limitations is disclosed. Step (A) of the method may perform a temporal filter operation on a target sample in a current picture of a sequence of pictures to generate an intermediate value of the target sample. Step (B) may find a minimum value and a maximum value among a plurality of local samples in a local neighborhood in the current picture around the target sample. The minimum value and the maximum value generally bound a minimum/maximum range. Step (C) may adjust the intermediate value toward the minimum/maximum range to generate a final value of the target sample if the intermediate value is outside a limited range. The limited range is generally based on the minimum/maximum range.

Abstract: An apparatus generally having a first memory, a second memory and a circuit is disclosed. The first memory may be configured to store a warp table. The warp table is generally accessed through a single data port of the first memory. The second memory may be configured to buffer an input image. The input image may have a plurality of input pixels arranged in two dimensions. The circuit may be configured to generate an output image by a warp correction of an input image. The warp correction may be defined by the warp table. The output image may include a plurality of output pixels. At least one of the output pixels may be generated during each clock cycle of the circuit.