Patents Assigned to AmberWave Systems
  • Publication number: 20090321882
    Abstract: A device includes an epitaxially grown crystalline material within an area confined by an insulator. A surface of the crystalline material has a reduced roughness. One example includes obtaining a surface with reduced roughness by creating process parameters which result in the dominant growth component of the crystal to be supplied laterally from side walls of the insulator. In a preferred embodiment, the area confined by the insulator is an opening in the insulator having an aspect ratio sufficient to trap defects using an ART technique.
    Type: Application
    Filed: June 2, 2009
    Publication date: December 31, 2009
    Applicant: Amberwave Systems Corporation
    Inventor: Ji-Soo Park
  • Patent number: 7638842
    Abstract: Monolithic lattice-mismatched semiconductor heterostructures are fabricated by bonding patterned substrates with alternative active-area materials formed thereon to a rigid dielectric platform and then removing the highly-defective interface areas along with the underlying substrates to produce alternative active-area regions disposed over the insulator and substantially exhausted of misfit and threading dislocations.
    Type: Grant
    Filed: September 7, 2005
    Date of Patent: December 29, 2009
    Assignee: AmberWave Systems Corporation
    Inventors: Matthew T. Currie, Anthony J. Lochtefeld, Zhiyuan Cheng, Thomas A. Langdo
  • Patent number: 7626246
    Abstract: Methods of forming areas of alternative material on crystalline semiconductor substrates, and structures formed thereby. Such areas of alternative material are suitable for use as active areas in MOSFETs or other electronic or opto-electronic devices.
    Type: Grant
    Filed: July 26, 2006
    Date of Patent: December 1, 2009
    Assignee: Amberwave Systems Corporation
    Inventors: Anthony J. Lochtefeld, Matthew T. Currie, Zhi-Yuan Cheng, James Fiorenza
  • Patent number: 7615829
    Abstract: A semiconductor structure having a surface layer disposed over a substrate, the surface layer including strained silicon. A contact layer is disposed over a portion of the surface layer, the contact layer including a metal-semiconductor alloy. A bottommost boundary of the contact layer is disposed above a bottommost boundary of the surface layer.
    Type: Grant
    Filed: June 7, 2002
    Date of Patent: November 10, 2009
    Assignee: AmberWave Systems Corporation
    Inventors: Anthony J. Lochtefeld, Thomas A. Langdo, Richard Westhoff
  • Patent number: 7594967
    Abstract: A semiconductor structure including a cap layer formed over a semiconductor substrate having a rough edge, which discourages formation of dislocation pile-up defects.
    Type: Grant
    Filed: October 10, 2002
    Date of Patent: September 29, 2009
    Assignee: AmberWave Systems Corporation
    Inventors: Christopher J. Vineis, Richard Westhoff, Mayank Bulsara
  • Patent number: 7588994
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Grant
    Filed: May 13, 2005
    Date of Patent: September 15, 2009
    Assignee: AmberWave Systems Corporation
    Inventors: Thomas A. Langdo, Matthew T. Currie, Richard Hammond, Anthony J. Lochtefeld, Eugene A. Fitzgerald
  • Patent number: 7566606
    Abstract: A semiconductor structure includes a strain-inducing substrate layer having a germanium concentration of at least 10 atomic %. The semiconductor structure also includes a compressively strained layer on the strain-inducing substrate layer. The compressively strained layer has a germanium concentration at least approximately 30 percentage points greater than the germanium concentration of the strain-inducing substrate layer, and has a thickness less than its critical thickness. The semiconductor structure also includes a tensilely strained layer on the compressively strained layer. The tensilely strained layer may be formed from silicon having a thickness less than its critical thickness.
    Type: Grant
    Filed: October 6, 2006
    Date of Patent: July 28, 2009
    Assignee: AmberWave Systems Corporation
    Inventors: Matthew T. Currie, Anthony J. Lochtefeld, Christopher W. Leitz, Eugene A. Fitzgerald
  • Patent number: 7541208
    Abstract: Oxidation methods, which avoid consuming undesirably large amounts of surface material in Si/SiGe heterostructure-based wafers, replace various intermediate CMOS thermal oxidation steps. First, by using oxide deposition methods, arbitrarily thick oxides may be formed with little or no consumption of surface silicon. These oxides, such as screening oxide and pad oxide, are formed by deposition onto, rather than reaction with and consumption of the surface layer. Alternatively, oxide deposition is preceded by a thermal oxidation step of short duration, e.g., rapid thermal oxidation. Here, the short thermal oxidation consumes little surface Si, and the Si/oxide interface is of high quality. The oxide may then be thickened to a desired final thickness by deposition. Furthermore, the thin thermal oxide may act as a barrier layer to prevent contamination associated with subsequent oxide deposition.
    Type: Grant
    Filed: February 9, 2007
    Date of Patent: June 2, 2009
    Assignee: AmberWave Systems Corporation
    Inventors: Matthew T. Currie, Anthony J. Lochtefeld
  • Patent number: 7504704
    Abstract: A structure including a transistor and a trench structure, with the trench structure inducing only a portion of the strain in a channel region of the transistor.
    Type: Grant
    Filed: May 17, 2005
    Date of Patent: March 17, 2009
    Assignee: AmberWave Systems Corporation
    Inventors: Matthew T. Currie, Anthony J. Lochtefeld
  • Publication number: 20090065047
    Abstract: Solar cell structures including multiple sub-cells that incorporate different materials that may have different lattice constants. In some embodiments, solar cell devices include several photovoltaic junctions.
    Type: Application
    Filed: June 26, 2008
    Publication date: March 12, 2009
    Applicant: AmberWave Systems Corporation
    Inventors: James Fiorenza, Anthony J. Lochtefeld
  • Patent number: 7501351
    Abstract: Structures and methods for fabricating high speed digital, analog, and combined digital/analog systems using planarized relaxed SiGe as the materials platform. The relaxed SiGe allows for a plethora of strained Si layers that possess enhanced electronic properties. By allowing the MOSFET channel to be either at the surface or buried, one can create high-speed digital and/or analog circuits. The planarization before the device epitaxial layers are deposited ensures a flat surface for state-of-the-art lithography.
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: March 10, 2009
    Assignee: AmberWave Systems Corporation
    Inventor: Eugene A. Fitzgerald
  • Patent number: 7494881
    Abstract: Misfit dislocations are selectively placed in layers formed over substrates. Thicknesses of layers may be used to define distances between misfit dislocations and surfaces of layers formed over substrates, as well as placement of misfit dislocations and dislocation arrays with respect to devices subsequently formed on the layers.
    Type: Grant
    Filed: November 26, 2007
    Date of Patent: February 24, 2009
    Assignee: AmberWave Systems Corporation
    Inventors: Anthony J. Lochtefeld, Christopher Leitz, Matthew T. Currie, Mayank T. Bulsara
  • Publication number: 20090039361
    Abstract: A method of forming a semiconductor structure includes forming an opening in a dielectric layer, forming a recess in an exposed part of a substrate, and forming a lattice-mismatched crystalline semiconductor material in the recess and opening.
    Type: Application
    Filed: July 25, 2008
    Publication date: February 12, 2009
    Applicant: Amberwave Systems Corporation
    Inventors: Jizhong Li, Anthony J. Lochtefeld
  • Publication number: 20090042344
    Abstract: Methods of forming structures that include InP-based materials, such as a transistor operating as an inversion-type, enhancement-mode device. A dielectric layer may be deposited by ALD over a semiconductor layer including In and P. A channel layer may be formed above a buffer layer having a lattice constant similar to a lattice constant of InP, the buffer layer being formed over a substrate having a lattice constant different from a lattice constant of InP.
    Type: Application
    Filed: June 13, 2008
    Publication date: February 12, 2009
    Applicants: AmberWave Systems Corporation, Purdue Research Foundation
    Inventors: Peide Ye, Zhiyuan Cheng, Yi Xuan, Yanqing Wu, Bunmi Adekore, James Fiorenza
  • Patent number: 7465619
    Abstract: A semiconductor-based device includes a channel layer, which includes a distal layer and a proximal layer in contact with the distal layer. The distal layer supports at least a portion of hole conduction for at least one p-channel component, and the proximal layer supports at least a portion of electron conduction for at least one n-channel component. The proximal layer has a thickness that permits a hole wave function to effectively extend from the proximal layer into the distal layer to facilitate hole conduction by the distal layer. A method for fabricating a semiconductor-based device includes providing a distal portion of a channel layer and providing a proximal portion of the channel layer.
    Type: Grant
    Filed: May 17, 2005
    Date of Patent: December 16, 2008
    Assignee: Amberwave Systems Corporation
    Inventor: Eugene A. Fitzgerald
  • Publication number: 20080265280
    Abstract: Abstract Semiconductor-on-insulator structures facilitate the fabrication of devices, including MOSFETs that are at least partially depleted during operation and FinFETs including bilayer fins and/or crystalline oxide.
    Type: Application
    Filed: May 22, 2008
    Publication date: October 30, 2008
    Applicant: AmberWave Systems Corporation
    Inventor: Matthew T. Currie
  • Publication number: 20080257409
    Abstract: Structures including crystalline material disposed in openings defined in a non-crystalline mask layer disposed over a substrate. A photovoltaic cell may be disposed above the crystalline material.
    Type: Application
    Filed: April 9, 2008
    Publication date: October 23, 2008
    Applicant: AmberWave Systems Corporation
    Inventors: Jizhong Li, Anthony J. Lochtefeld, Calvin Sheen, Zhiyuan Cheng
  • Patent number: 7439164
    Abstract: Methods for fabricating facetless semiconductor structures using commercially available chemical vapor deposition systems are disclosed herein. A key aspect of the invention includes selectively depositing an epitaxial layer of at least one semiconductor material on the semiconductor substrate while in situ doping the epitaxial layer to suppress facet formation. Suppression of faceting during selective epitaxial growth by in situ doping of the epitaxial layer at a predetermined level rather than by manipulating spacer composition and geometry alleviates the stringent requirements on the device design and increases tolerance to variability during the spacer fabrication.
    Type: Grant
    Filed: July 20, 2006
    Date of Patent: October 21, 2008
    Assignee: AmberWave Systems Corporation
    Inventors: Thomas A. Langdo, Anthony J. Lochtefeld
  • Publication number: 20080245400
    Abstract: A backside illuminated multi-junction solar cell module includes a substrate, multiple multi-junction solar cells, and a cell interconnection that provides a series connection between at least two of the multi-junction solar cells. The substrate may include a material that is substantially transparent to solar radiation. Each multi-junction solar cell includes a first active cell, grown over the substrate, for absorbing a first portion of the solar radiation for conversion into electrical energy and a second active cell, grown over the first active cell, for absorbing a second portion of the solar radiation for conversion into electrical energy. At least one of the first and second active cells includes a nitride.
    Type: Application
    Filed: February 14, 2008
    Publication date: October 9, 2008
    Applicant: Amberwave Systems Corporation
    Inventor: Jizhong Li
  • Patent number: 7432139
    Abstract: A method for forming a semiconductor structure, the method including forming in a processing chamber a dielectric layer over a substrate; and subsequently forming, in the same processing chamber and without removing the substrate therefrom, an electrode layer directly over and in contact with the dielectric layer.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: October 7, 2008
    Assignee: AmberWave Systems Corp.
    Inventor: Matthew T. Currie