Abstract: A die package is formed, which allows additional electrical connections to the die by using internal leads or traces from a lead frame. The internal leads are exposed through an upper or lower surface of the package, thereby allowing an additional die package to be stacked and electrically connected to the underlying die or additional inputs/outputs to underlying external circuitry, such as a printed circuit board.

Abstract: FileNameFileName-33-Integrated circuit packages including interconnection posts with multiple metal terminals are disclosed. An exemplary package includes a molded plastic body with integral plastic posts extending from the body. Each post is coated with a plurality of electrically separate metal terminals. The metal terminals extend from a surface of the body, along a sidewall of a respective post, to an end of the post. An integrated circuit is mounted on the body. Conductive paths, which may include vias through the body, electrically couple different bond pads of the integrated circuit to the metal terminals of the posts. In some embodiments, posts on opposing sides of the plastic body enable stacking, and electrical coupling, of two or more packages. The metal terminals of posts of the lower package may be engaged with the metal terminals of corresponding posts on a mounting substrate.

Abstract: Semiconductor packages having a thin structure capable of easily discharging heat from a semiconductor chip included therein, and methods for fabricating such semiconductor packages, are disclosed.

Abstract: A thin integrated circuit package having an optically transparent window provides a small profile optical integrated circuit assembly for use in digital cameras, video cellular telephones and other devices requiring a small physical size and optical integrated circuit technology. A tape having a conductive metal layer on a surface is used to interface the optical integrated circuit die with electrical interconnects disposed on a surface of the tape opposite the die. A supporting structure surrounds the die and a glass cover is either bonded to the top of the supporting structure over the die, or the glass cover is bonded to the top of the die and the gap between the glass cover and supporting structure filled with encapsulant. The resulting assembly yields a very thin optical integrated circuit package.

Abstract: A solderable injection-molded integrated circuit substrate provides a mounting and interconnect structure for integrated circuits. Circuit traces within channels on the substrate provide interconnects that are isolated by the channel sides and solderable mounting contacts for Ball Grid Array (BGA) or wire-bondable integrated circuit dies. The substrate is injection-molded and then electroplated or seed plated and an etchant-resistive material is applied. The substrate is exposed to an etchant, removing the plated material from undesired locations and leaving the plated material in contact areas and trace areas within the channels. An integrated circuit die is then wire-bonded or solder ball attached to the substrate.

Abstract: There is provided a semiconductor package and method for fabricating the same.

Abstract: A mounting for a package containing a semiconductor chip is disclosed, along with methods of making such a mounting. The mounting includes a substrate having a mounting surface with conductive traces thereon, and an aperture extending through the substrate. The package includes a base, such as a leadframe or a laminate sheet, and input/output terminals. A chip is on a first side of the base and is electrically connected (directly or indirectly) to the input/output terminals. A cap, which may be a molded encapsulant, is provided on the first side of the base over the chip. The package is mounted on the substrate so that the cap is in the aperture, and a peripheral portion of the first side of the base is over the mounting surface so as to support the package in the aperture and allow the input/output terminals of the package to be juxtaposed with to the circuit patterns of the mounting surface. Because the cap is within the aperture, a height of the package above the mounting surface is minimized.

Abstract: A carrier frame and semiconductor package including a carrier frame provide improved thermal performance and mechanical stability for semiconductor packages using thin substrate materials. A metal carrier frame is attached to a substrate to provide support during and after the manufacturing process. A semiconductor die is mounted through an aperture in the center of the carrier frame and electrically connected to the substrate via wire bonding. The assembly is then encapsulated and singulated and a portion of the carrier frame remains in the package, improving thermal transfer from the semiconductor die. The assembly may further include a header for covering the aperture after the semiconductor die is wire bonded. The header/carrier combination may include means for improving encapsulant flow to the region under the header and surrounding the semiconductor die, which may include cut portions in the carrier frame or aligned holes through the carrier frame and header.

Abstract: A package includes a substrate having a pocket, an overflow reservoir around a periphery of the pocket, and a mating surface around a periphery of the overflow reservoir. An electronic component is mounted within the pocket. The pocket is over filled with a flowable material. A window or waveguide is mounted to the substrate. The overflow reservoir captures the flowable material that spills out of the pocket during mounting of the window or waveguide thus preventing contamination of the mating surface.

Abstract: Semiconductor packages having a thin structure capable of easily discharging heat from a semiconductor chip included therein, and methods for fabricating such semiconductor packages, are disclosed.

Abstract: A method of forming an image sensor package includes wire bonding bond pads of an image sensor to interior traces on a substrate with bond wires. A first optically curable material is applied to enclose the bond wires. A second optically curable material is applied between a lid and the substrate. The first and second optically curable materials are cured through the lid with ultraviolet radiation. The first and second optically curable materials are cured rapidly without heating thus minimizing the fabrication cost of the image sensor package.

Abstract: Semiconductor packages are disclosed. An exemplary package includes horizontal leads each having a first side and an opposite second side. The second side includes a recessed horizontal surface. Two stacked semiconductor chips are within the package and are electrically interconnected in a flip chip style. One chip extends over the first side of the leads and is electrically connected thereto. The chips are encapsulated in a package body formed of an encapsulating material. The recessed horizontal surface of the leads is covered by the encapsulating material, and a portion of the second side of each lead is exposed at an exterior surface of the package body as an input/output terminal. A surface of one or both chips may be exposed. The stack of chips may be supported on the first side of the leads or on a chip mounting plate.

Abstract: A two-lead, surface-mounting, high-power micro-leadframe semiconductor package has the same outline, mounting, and electrical functionality as industry standard leadframe packages but provides a lower internal resistance, a higher package power rating, and costs less to produce. The novel package incorporates one of a rectangular array of “micro-leadframes” (“MLFs”), each having parallel and respectively coplanar upper and lower surfaces etched in a plate having a uniform thickness. Each micro-leadframe includes an I-shaped die pad having a head, a foot, and opposite sides. First and second leads are disposed at the foot of the die pad, each having a side aligned with one of the sides of the pad. The second lead has an right-angled wire-bonding pad next to the die pad. A portion of a lower surface of each of the die pad and the leads is exposed through a lower surface of an envelope of plastic molded on the package to define package input/output terminals.

Abstract: A semiconductor package that can accommodate a larger semiconductor chip while keeping the foot print area afforded to a conventional semiconductor package. The semiconductor package of the present invention also has an improved locking strength between a chip paddle and an encapsulation material. Additionally, the semiconductor chip of the present invention exhibits an improved heat radiation of the semiconductor chip over conventional semiconductor packages.

Abstract: A stackable semiconductor package. The semiconductor package comprises a plurality of first and second leads which are arranged in a generally quadrangular array having one pair of opposed sides defined by the first leads and one pair of opposed sides defined by the second leads. The first and second leads each include opposed, generally planar first and second surfaces, and a third surface which is also disposed in opposed relation to the second surface and positioned between the first and second surfaces. A first semiconductor die is electrically connected to the third surfaces of the first leads, with a second semiconductor die being electrically connected to the third surfaces of the second leads. A package body at least partially encapsulates the first and second leads and the first and second semiconductor dies such that the first and second surfaces of each of the first and second leads are exposed in the package body.

Abstract: An integrated circuit having multiple power/ground connections to a single external terminal and method for manufacturing an integrated circuit provides an integrated circuit having a reduced number of external power/ground terminals. The multiple connections may be made by conductive circuit paths on one side of the substrate and a terminal pad on the same side of the substrate, with the conductive circuit paths leading from die terminals terminating at the terminal pad, or a via may be formed either directly above the terminal pad or contacting its circumference to provide a connection through from the opposite side of the substrate. Multiple vias may be formed above the terminal pad and within its circumference to provide connection of multiple die terminals to the terminal pad.

Abstract: An optical device package having improved conductor efficiency, optical coupling and thermal transfer, as well as various methods for packaging a semiconductor die provide reduced connection length, and improved optical and thermal characteristics. In one package, a conductive circuit pattern disposed on a transparent or translucent cover connects bond pads on the light receiving surface of the semiconductor die to external electrical contacts. The construction of the package reduces connection length and eliminates the air gap between the glass and the die. In another package, a substrate having a protruding wall supports the glass and the substrate provides an electrical connection to terminals for connection to an external device. In another package, the glass is supported by a die mounting board that supports the semiconductor die and includes leads for connection to an external device.

Abstract: Semiconductor packages including at least two semiconductor dies are disclosed. A first die is mounted on a substrate, which may be a metallized laminate or a leadframe. A rigid support structure is mounted on the substrate over the first die. The support structure may be thermally coupled to the substrate, and also may be electrically coupled to the substrate. A second die is mounted on the support structure, which spaces the second die away from the first die. Encapsulant fills the volume within the support structure, including the vertical space between the pair of dies. In an alternative package embodiment, a heat spreader formed of a flexible metal sheet may be thermally coupled between the two stacked dies. The heat spreader transfers heat from the first and second dies to a heat sink of the substrate. The support structure and the heat spreader mitigate the transfer of heat between the first and second dies.

Abstract: A chip size package (CSP) structure is disclosed. The CSP package structure utilizes columnar composite bump structures as contact joints to bond to contact pads. The columnar composite bump structures have high melting point bump layers on the contact pads and a low melting point bump layers. The high melting point and low melting point bump layers are formed on under bump metal (UBM) layers by composite plating processes so that both the bump layers need not to be etched and the underlying contact pads will not be damaged.

Abstract: A method for forming an image sensor assembly includes forming a lead frame or Land Grid Array (LGA) integrally into a molded image sensor die package so that the lead frame or LGA is fully supported and structurally fortified by the molded image sensor die package. An image sensor die is then attached to the thus supported lead frame or LGA using a standard flip-chip connection.