Patents Assigned to Amkor Technology
  • Patent number: 11854991
    Abstract: In one example, a semiconductor device comprises a main substrate having a top side and a bottom side, a first electronic component on the top side of the main substrate, a second electronic component on the bottom side of the main substrate, a substrate structure on the bottom side of the main substrate adjacent to the second electronic component, and an encapsulant structure comprising an encapsulant top portion on the top side of the main substrate and contacting a side of the first electronic component, and an encapsulant bottom portion on the bottom side of the main substrate and contacting a side of the second electronic component and a side of the substrate structure. Other examples and related methods are also disclosed herein.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: December 26, 2023
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Jin Seong Kim, Yeong Beom Ko, Kwang Seok Oh, Jo Hyun Bae, Sung Woo Lim, Yun Ah Kim, Yong Jae Ko, Ji Chang Lee
  • Patent number: 11855023
    Abstract: A wafer level fan out semiconductor device and a manufacturing method thereof are provided. A first sealing part is formed on lateral surfaces of a semiconductor die. A plurality of redistribution layers are formed on surfaces of the semiconductor die and the first sealing part, and solder balls are attached to the redistribution layers. The solder balls are arrayed on the semiconductor die and the first sealing part. In addition, a second sealing part is formed on the semiconductor die, the first sealing part and lower portions of the solder balls. The solder balls are exposed to the outside through the second sealing part. Since the first sealing part and the second sealing part are formed of materials having thermal expansion coefficients which are the same as or similar to each other, warpage occurring to the wafer level fan out semiconductor device can be suppressed.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: December 26, 2023
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: Boo Yang Jung, Jong Sik Paek, Choon Heung Lee, In Bae Park, Sang Won Kim, Sung Kyu Kim, Sang Gyu Lee
  • Publication number: 20230411342
    Abstract: In one example, a system comprises a laser assisted bonding (LAB) tool. The LAB tool comprises a stage block and a first lateral laser source facing the stage block from a lateral side of the stage block. The stage block is configured to support a substrate and a first electronic component coupled with the substrate, and the first electronic component comprises a first interconnect. The first lateral laser source is configured to emit a first lateral laser beam laterally toward the stage block to induce a first heat on the first interconnect to bond the first interconnect with the substrate. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: August 31, 2023
    Publication date: December 21, 2023
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Dong Hyeon Park, Min Ho Kim, Dong Su Ryu, Seok Ho Na, Choong Hoe Kim, Yun Seok Song, Woo Kyung Ju, Dong Joo Park
  • Publication number: 20230411257
    Abstract: A method for forming packaged electronic devices includes providing a substrate having pads connected by conductive pad linking portions and semiconductor devices attached to the pads in different orientations. A second substrate is provided having conductive connectors each with a plate portion, a conductive member extending from a side segment of the plate portion, a connective portion extending from the conductive member distal to the plate portion, and conductive linking portions physically connecting adjoining plate portions together. Each plate portion is attached to one of the semiconductor devices to provide a subassembly. A package body is provided to encapsulate at least portions of the subassembly. The method includes separating the encapsulated subassembly to provide the packaged electronic devices such that the separating step severs the conductive linking portions.
    Type: Application
    Filed: August 30, 2023
    Publication date: December 21, 2023
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Siang Miang YEO, Mohd Hasrul Bin ZULKIFLI
  • Patent number: 11848214
    Abstract: A method of manufacturing a semiconductor package includes mounting and electrically connecting a semiconductor die to a substrate. The semiconductor die and the substrate are encapsulated to form an encapsulation. Via holes are laser-ablated through the encapsulation and conductive material is deposited within the via holes to form vias. A first buildup dielectric layer is formed on the encapsulation. Laser-ablated artifacts are laser-ablated in the first buildup layer. The laser-ablated artifacts in the first buildup layer are filled with a first metal layer to form a first electrically conductive pattern in the first build up layer. The operations of forming a buildup layer, forming laser-ablated artifacts in the buildup layer, and filling the laser-ablated artifacts with an electrically conductive material to form an electrically conductive pattern can be performed any one of a number of times to achieve the desired redistribution.
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: December 19, 2023
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Ronald Patrick Huemoeller, Sukianto Rusli, David Jon Hiner
  • Patent number: 11848310
    Abstract: Various aspects of this disclosure provide a semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor device comprising a stacked die structure and a method of manufacturing thereof.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: December 19, 2023
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: Won Geol Lee, Won Chul Do, Ji Hun Yi
  • Patent number: 11848275
    Abstract: An integrated shield electronic component package includes a substrate having an upper surface, a lower surface, and sides extending between the upper surface and the lower surface. An electronic component is mounted to the upper surface of the substrate. An integrated shield is mounted to the upper surface of the substrate and includes a side shielding portion directly adjacent to and covering the sides of the substrate. The integrated shield covers and provides an electromagnetic interference (EMI) shield for the electronic component, the upper surface and sides of substrate. Further, the integrated shield is integrated within the integrated shield electronic package. Thus, separate operations of mounting an electronic component package and then mounting a shield are avoided thus simplifying manufacturing and reducing overall assembly costs.
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: December 19, 2023
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: Paul Mescher, Danny Brady
  • Patent number: 11842970
    Abstract: A semiconductor device structure and a method for manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor device structure (e.g., a sensor device structure), and method for manufacturing thereof, that comprises a three-dimensional package structure free of wire bonds, through silicon vias, and/or flip-chip bonding.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: December 12, 2023
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Jong Sik Paek, No Sun Park
  • Patent number: 11830823
    Abstract: In one example, an electronic device includes a substrate having a conductive structure. The conductive structure includes a substrate inward terminal at a first side of the substrate and a substrate outward terminal at a second side of the substrate. The substrate includes a dielectric structure with a first opening is at the second side. An electronic component is at the first side of the substrate and is electrically coupled to the substrate inward terminal, and an encapsulant encapsulates the electronic component. The substrate outward terminal comprises one of a multi-via terminal or a multi-stage via. The multi-via terminal includes pad conductive vias in the first opening a pad dielectric via interposed between the pad conductive vias in the first opening and a conductor comprising a conductor top side with micro dimples over the pad conductive vias and the pad dielectric via.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: November 28, 2023
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Tae Ki Kim, Jae Beom Shim, Min Jae Yi, Yi Seul Han, Young Ju Lee, Kyeong Tae Kim
  • Patent number: 11830860
    Abstract: An exemplary semiconductor device can comprise (a) a substrate comprising a substrate dielectric structure between the substrate top side and the substrate bottom side, conductive pads at the substrate bottom side, and a substrate cavity through the substrate dielectric structure, (b) a base electronic component comprising inner short bumps; outer short bumps bounding a perimeter around the inner short bumps, and tall bumps between the outer short bumps and an edge of the base component top side, and (c) a mounted electronic component coupled to the inner short bumps of the base electronic component. The tall bumps of the base component can be coupled to the conductive pads of the substrate. The mounted electronic component can be located in the substrate cavity. The substrate bottom side can cover at least a portion of the outer short bumps of the base electronic component. Other examples and related methods are disclosed herein.
    Type: Grant
    Filed: October 12, 2021
    Date of Patent: November 28, 2023
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Hyun Goo Cha, Dong Hee Kang, Sang Yun Ma, Sang Hyeok Cho, Jae Yeong Bae, Ron Huemoeller
  • Patent number: 11823913
    Abstract: An electronic device and a method of making an electronic device. As non-limiting examples, various aspects of this disclosure provide methods of making an electronic device, and electronic devices made thereby, that comprise forming first and second encapsulating materials, followed by further processing and the removal of the entire second encapsulating material.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: November 21, 2023
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: Bora Baloglu, Curtis Zwenger, Ronald Huemoeller
  • Publication number: 20230369240
    Abstract: In one example, a semiconductor device comprises a substrate comprising a conductive structure, a first electronic component over the substrate, an encapsulant over the substrate and contacting a lateral side of the first electronic component, a shield over the encapsulant and contacting a lateral side of the encapsulant and a portion of a lateral side of the substrate, and a communication structure coupled with the substrate. The substrate comprises a vertical groove side and a horizontal groove side defining a groove in the substrate, wherein a portion of the groove is uncovered by the shield. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: July 28, 2023
    Publication date: November 16, 2023
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Ji Hoon Oh, Dong Hyun Bang, Soo Jin Shin, Young Ik Kwon, Tae Kyeong Hwang, Min Jae Lee, Min Jae Kong
  • Publication number: 20230352374
    Abstract: In one example, a semiconductor device includes a substrate having leads that include lead terminals, lead steps, and lead offsets extending between the lead steps so that at least some lead steps reside on different planes. A first electronic component is coupled to a first lead step side and includes a first electronic component first side, and a first electronic component second side opposite to the first electronic component first side. A second electronic component is coupled to a second lead step side, and includes a second electronic component first side, and a second electronic component second side opposite to the second electronic component first side. An encapsulant encapsulates the first electronic component, the second electronic component, and portions of the substrate. The lead terminals are exposed from a first side of the encapsulant. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: July 3, 2023
    Publication date: November 2, 2023
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Jae Min BAE, Hyung Jun CHO, Seung Woo LEE
  • Publication number: 20230352370
    Abstract: A semiconductor device comprises a substrate having a substrate top side, a substrate lateral side, and a substrate bottom side, an electronic device on the substrate top side, and an encapsulant on the substrate top side and contacting a lateral surface of the electronic device. The substrate comprises a conductive structure and a dielectric structure that extends comprising a protrusion in contact with the encapsulant. The conductive structure comprises a lead comprising a lead flank, the lead flank comprising a cavity and a conductive coating on a surface of the lead in the cavity. The conductive structure comprises a pad exposed at the substrate top side, embedded in the dielectric structure, and adjacent to the protrusion, to electrically couple with the electronic device via a first internal interconnect. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: May 5, 2023
    Publication date: November 2, 2023
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Won Bae Bang, Kwang Seok Oh, George Scott
  • Patent number: 11804447
    Abstract: A semiconductor device includes a shielding wire formed across a semiconductor die and an auxiliary wire supporting the shielding wire, thereby reducing the size of a package while shielding the electromagnetic interference generated from the semiconductor die. In one embodiment, the semiconductor device includes a substrate having at least one circuit device mounted thereon, a semiconductor die spaced apart from the circuit device and mounted on the substrate, a shielding wire spaced apart from the semiconductor die and formed across the semiconductor die, and an auxiliary wire supporting the shielding wire under the shielding wire and formed to be perpendicular to the shielding wire. In another embodiment, a bump structure is used to support the shielding wire. In a further embodiment, an auxiliary wire includes a bump structure portion and wire portion and both the bump structure portion and the wire portion are used to support the shielding wire.
    Type: Grant
    Filed: January 22, 2021
    Date of Patent: October 31, 2023
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Jun Ho Jeon, Kyeong Sool Seong, Seok Ho Na, Jeong Il Kim, Young Kyu Kim, Sung Ho Jeon, Deok In Lim, Sung Moo Hong, Sung Jung Kim, Sung Han Ryu, Kyung Nam Kang, Seong Hak Yoo
  • Publication number: 20230343607
    Abstract: In one example, a semiconductor device can comprise a unit substrate comprising a unit conductive structure and a unit dielectric structure, and an electronic component coupled to the unit conductive structure. The unit substrate can comprise a portion of a singulated subpanel substrate of a panel substrate. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 26, 2023
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Jae Yoon Kim, Ji Hun Lee, Suresh Jayaraman, David Hiner, Won Chul Do, Jin Young Khim, Ju Hong Shin, Kye Ryung Kim
  • Publication number: 20230335883
    Abstract: A method for forming packaged electronic device structure includes providing a conductive leadframe. The leadframe can include a die pad and a plurality of conductive leads. The method can include coupling an electronic device to the plurality of conductive leads. The method can include providing an antenna structure, which can include a conductive pillar structure and an elongated conductive beam structure. The method can include providing a package body encapsulating the electronic device, at least portions of each conductive lead, and at least portions of the die pad. In an example, the conductive pillar structure can extend from the first package body surface to the second package body surface, the elongated conductive beam structure can be disposed adjoining the first package body surface and can be electrically connected to the conductive pillar structure, and a portion of the elongated conductive beam structure can be exposed outside of the package body.
    Type: Application
    Filed: April 28, 2023
    Publication date: October 19, 2023
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Marc Alan MANGRUM, Hyung Jun CHO, Byong Jin KIM, Gi Jeong KIM, Jae Min BAE, Seung Mo KIM, Young Ju LEE
  • Publication number: 20230326874
    Abstract: An electronic device includes a substrate comprising outward terminals. An electronic component is connected to the outward terminals. External interconnects are connected to the outward terminals and include a first external interconnect connected to a first outward terminal. A lower shield is adjacent to the substrate bottom side and is laterally between the external interconnects. The lower shield is electrically isolated from the first external interconnect by one or more of 1) a dielectric buffer interposed between the lower shield and the first external interconnect; or 2) the lower shield including a first part and a second part, the first part being laterally separated from the second part by a first gap, wherein the first part laterally surrounds lateral sides of the first external interconnect; and the second part is vertically interposed between the first outward terminal and the first external interconnect.
    Type: Application
    Filed: June 16, 2023
    Publication date: October 12, 2023
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Min Won PARK, Tae Yong LEE, Ji Hun YI, Cheol Ho LEE
  • Patent number: 11784457
    Abstract: A packaged electronic device structure includes a substrate having a major surface. A semiconductor device is connected to the major surface of the substrate, the semiconductor device having a first major surface, a second major surface opposite to the first major surface, and a side surface extending between the first major surface and the second major surface. A package body encapsulates a portion of the semiconductor device, wherein the side surface of the semiconductor device is exposed through a side surface of the package body. In some examples, the side surface of the semiconductor device is an active surface. In some examples, the package body comprises a molded structure that contacts and overlaps the first major surface of the semiconductor device.
    Type: Grant
    Filed: September 12, 2021
    Date of Patent: October 10, 2023
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Ramakanth Alapati, Darrell Paul Baker, Anthony B. Taguinod
  • Patent number: 11784101
    Abstract: In one example, a semiconductor device comprises a substrate comprising a conductive structure, an electronic component over a top side of the substrate and electrically coupled with the conductive structure, a lid structure over the substrate and over the electronic component, and a vertical interconnect in the lid structure extending to a top surface of the lid structure and electrically coupled with the conductive structure. Other examples and related methods are also disclosed herein.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: October 10, 2023
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Shaun Bowers, Bora Baloglu