Patents Assigned to Ampleon Netherlands B.V.
  • Patent number: 12690454
    Abstract: Example embodiments relate to electronic packages and devices that include electronic packages. One example electronic package includes a printed circuit board having a first surface and a second surface. The electronic package also includes a semiconductor die including electronic circuitry integrated thereon. The semiconductor die is mounted on the die pad and has a plurality of terminals for inputting and outputting electrical signals. Additionally, the electronic package includes a body of a solidified molding compound covering the first surface of the printed circuit board and encapsulating the semiconductor die at a first side of the body. The body has a second side opposite to the first side. Further, the electronic package includes a plurality of package terminals arranged on the second side of the body of solidified molding compound. Each package terminal is electrically connected using a conductive structure.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: July 21, 2026
    Assignee: Ampleon Netherlands B.V.
    Inventors: Atef Al Nukari, Jorge Manuel Soares Teixeira
  • Patent number: 12537484
    Abstract: Example embodiments relate to radiofrequency, RF, amplifiers and electronic devices that include RF amplifiers. One example RF amplifier includes a splitter configured to split an RF input signal received at an input of the RF amplifier into a plurality of RF signal parts. The RF amplifier also includes a plurality of Doherty amplifiers, each Doherty amplifier having a main amplifier and a peak amplifier. Each Doherty amplifier is configured to amplify a respective RF signal part and output a respective amplified RF signal part. Additionally, the RF amplifier includes a combiner. The combiner is configured to combine the amplified RF signal parts from the plurality of Doherty amplifiers into an RF output signal and output the RE output signal. The combiner includes a plurality of inputs and an output. Each input of the combiner is connected to an output of a respective Doherty amplifier among the plurality of Doherty amplifiers.
    Type: Grant
    Filed: March 6, 2023
    Date of Patent: January 27, 2026
    Assignee: Ampleon Netherlands B.V.
    Inventors: Junlei Zhao, Mohadig Widha Rousstia, Radjindrepersad Gajadharsing
  • Patent number: 12525933
    Abstract: Example embodiments relate to power amplifiers and Doherty amplifiers that include the same. One example embodiment includes a power amplifier. The power amplifier includes one or more radiofrequency (RF) output terminals. The power amplifier also includes a Gallium Nitride (GaN) semiconductor die on which a power field-effect transistor (FET) is integrated. The FET includes a plurality of FET cells that are adjacently arranged in a row. The FET cells are connected either directly or indirectly to the one or more RF output terminals via a respective first inductor. For FET cells arranged at opposing ends of the row of FET cells, a total FET cell gate width and an inductance of the first inductor is larger and smaller than the total FET cell gate width and inductance of the first inductor for one or more FET cells arranged in the middle of the row of FET cells, respectively.
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: January 13, 2026
    Assignee: Ampleon Netherlands B.V.
    Inventors: Zhi Geng, Yi Zhu
  • Patent number: 12470176
    Abstract: Example embodiments relate to Doherty amplifiers. One Doherty amplifier includes a packaged main amplifier that includes a main input lead for receiving a main RF signal, a main power transistor for amplifying the main RF signal, and a main output lead for outputting the main RF signal amplified by the main power transistor. The Doherty amplifier also includes a packaged peak amplifier that includes a peak input lead assembly for receiving a peak RF signal, a first peak power transistor configured for amplifying a part of the peak RF signal, a second peak power transistor configured for amplifying a remaining part of the peak RF signal, and a peak output lead for combining the part of the peak RF signal amplified by the first peak power transistor and the remaining part of the peak RF signal amplified by the second peak power transistor into an amplified peak RF signal.
    Type: Grant
    Filed: February 28, 2023
    Date of Patent: November 11, 2025
    Assignee: Ampleon Netherlands B.V.
    Inventors: Zhi Geng, Yi Zhu
  • Patent number: 12463607
    Abstract: Example embodiments relate to Doherty amplifiers. One example includes a radiofrequency (RF) power amplifier. The RF power amplifier includes an input lead. The RF power amplifier also includes a first output lead. Additionally, the RF power amplifier includes a first semiconductor die arranged in between the input lead and the first output lead. The first semiconductor die includes a first edge arranged adjacent to the input lead and an opposing second edge arranged adjacent to the first output lead. Further, the RF power amplifier includes a field-effect transistor integrated on the first semiconductor die. The field-effect transistor includes a gate bondpad assembly and a drain bondpad assembly. The field-effect transistor also includes a plurality of gate bondwires and a plurality of drain bondwires. In addition, the field-effect transistor includes a plurality of gate fingers extending in a first direction and a plurality of drain fingers extending in a second direction.
    Type: Grant
    Filed: March 14, 2023
    Date of Patent: November 4, 2025
    Assignee: Ampleon Netherlands B.V.
    Inventors: Junlei Zhao, Yi Zhu, Radjindrepersad Gajadharsing
  • Patent number: 12381135
    Abstract: Example embodiments relate to electronic packages and electronic devices that include the same. One embodiment includes an electronic package. The electronic package includes a package body. The electronic package also includes a heat-conducting substrate arranged inside the package body and having a bottom surface that is exposed to an outside of the package body. Additionally, the electronic package includes an electronic circuit arranged inside the package body and including a semiconductor die that has a bottom surface with which it is mounted to the heat-conducting substrate and an opposing upper surface. Further, the electronic package includes one or more leads partially extending from outside the package body to inside the package body and over the minimum bounding box, each lead having a first end that is arranged inside the package body. In addition, the electronic package includes one or more bondwires for connecting the first end(s) to the electronic circuit.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: August 5, 2025
    Assignee: Ampleon Netherlands B.V.
    Inventors: Jurgen Raben, Mariano Ercoli
  • Patent number: 12211916
    Abstract: Example embodiments relate to a field-effect transistors having improved layouts. One example field-effect transistor includes a semiconductor substrate on which at least one transistor cell array is arranged. Each transistor cell includes a first transistor cell unit. Each first transistor cell unit includes a plurality of gate fingers, a main gate finger segment, a plurality of drain fingers, and a main drain finger segment. Each first transistor cell unit also includes a main gate finger base connected to the main gate finger segment of the first transistor cell unit and extending from that main gate finger segment towards the main drain finger segment of that first transistor cell unit. Further, each first transistor cell unit includes a main drain finger base connected to the main drain finger segment of that first transistor cell and extending from that main drain finger segment towards that main gate finger segment.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: January 28, 2025
    Assignee: Ampleon Netherlands B.V.
    Inventor: Patrick Valk
  • Patent number: 12206371
    Abstract: Example embodiments relate to power amplifier devices and semiconductor dies. One example power amplifier device includes a semiconductor die having a first input terminal and a first output terminal. The power amplifier device also includes a power transistor integrated on the semiconductor die and including a second input terminal and a second output terminal arranged at an input side and output side of the power transistor, respectively. The power transistor has an output capacitance. Further, the power amplifier device includes a shunt network that includes a plurality of first bondwires arranged in series with a first capacitor. The first capacitor is arranged near the input side of the power transistor. At one end of the shunt network one end of the plurality of first bondwires is coupled to the second output terminal. Additionally, the power amplifier includes a pair of coupled lines formed on the semiconductor die.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: January 21, 2025
    Assignee: Ampleon Netherlands B.V.
    Inventor: Josephus Henricus Bartholomeus Van Der Zanden
  • Patent number: 12199571
    Abstract: Example embodiments relate to hybrid Doherty power amplifier modules. One embodiment includes a printed circuit board having an input RF terminal and an output RF terminal, and on which printed circuit board a primary Doherty amplifier is integrated. The primary Doherty amplifier includes a primary Doherty splitter arranged on the printed circuit board and configured for splitting an input RF signal received at the input RF terminal into a plurality of RF signal components. The primary Doherty amplifier also includes a plurality of amplifying paths, each amplifying path being partially integrated on a semiconductor die of a first kind mounted on the printed circuit board and partially integrated on a semiconductor die of a second kind mounted on the printed circuit board. Further, the primary Doherty amplifier includes a primary Doherty combiner arranged on the printed circuit board.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: January 14, 2025
    Assignee: Ampleon Netherlands B.V.
    Inventors: Zhi Geng, Yi Zhu
  • Patent number: 12142491
    Abstract: Example embodiments relate to packaged electronic devices. One example packaged electronic device includes a substrate. The packaged electronic device also includes a plurality of leads fixated relative to the substrate in a spaced apart manner. Additionally, the packaged electronic device includes a solidified molding compound that is fixedly connected to the plurality of leads. The solidified molding includes an upper ring part that extends away from the leads in a direction away from the substrate. Further, the packaged electronic device includes an electronic component mounted on the substrate and electrically connected to the leads. In addition, the packaged electronic device includes a lid having a lid base and a lid rim that extends towards the upper ring part. The lid rim is connected to the upper ring part using an adhesive. Each of the lid rim and upper ring part include an inner portion and an outer portion.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: November 12, 2024
    Assignee: Ampleon Netherlands B.V.
    Inventors: Frans Meeuwsen, Jurgen Raben
  • Patent number: 12142583
    Abstract: Example embodiments relate to RF amplifier packages. One example RF amplifier package includes an input terminal, an output terminal, a substrate, a first DC blocking capacitor having a first terminal and a grounded second terminal, and a second conductor die mounted on the substrate. The semiconductor die includes a semiconductor substrate, an RE power field-effect transistor (FET) integrated on the semiconductor substrate, a gate bondbar, a first drain bondbar, a second drain bondbar, and a plurality of first bondwires connecting the second drain bondbar to the first terminal of the first DC blocking capacitor. The RF power FET includes a plurality of gate fingers that are electrically connected to the gate bondbar and that each extend from the gate bondbar towards the first drain bondbar and underneath the second drain bondbar, a first set of drain fingers, and a second set of drain fingers.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: November 12, 2024
    Assignee: Ampleon Netherlands B.V.
    Inventors: Josephus Henricus Bartholomeus Van der Zanden, Daniel Maassen
  • Patent number: 12087678
    Abstract: Example embodiments relate to an electronic package, to an electronic device comprising such a package, and to a lead frame for manufacturing the electronic package. Some examples may particularly relate to electronic packages in which radiofrequency (RF) circuitry is arranged. According to the example embodiments, a width of the clamping portion is substantially larger than the width of the lead end portion, the width of the clamping portion being chosen such that bending of the inner part and/or body part relative to the outer part during the application of the molding compound was substantially prevented thereby having avoided flash and/or bleed of molding compound onto the inner part.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: September 10, 2024
    Assignee: Ampleon Netherlands B.V.
    Inventors: Frans Meeuwsen, Jurgen Raben
  • Patent number: 12009792
    Abstract: Example embodiments relate to power amplifiers with decreased RF return current losses. One embodiment includes a RF power amplifier package that includes a semiconductor die, an input lead, first bondwire connections, second bondwire connections, and a plurality of shields. The semiconductor die includes an RF power transistor that includes output bond pads, input bond pads, a plurality of input fingers, and a plurality of output fingers. Further, each shield of the plurality of shields is arranged in between a respective input finger of the plurality of input fingers and a respective output finger of the plurality of output fingers and extending along with said respective input finger and output finger. In addition, each shield of the plurality of shields is connected to a ground terminal of the RF power transistor. The input fingers, output fingers, and shields are formed using a metal layer stack of multiple metal layers.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: June 11, 2024
    Assignee: Ampleon Netherlands B.V.
    Inventors: Vittorio Cuoco, Jos Van Der Zanden, Yi Zhu, Iouri Volokhine
  • Patent number: 12010784
    Abstract: Example embodiments relate to wireless synchronization for multi-channel RE heating and drying devices. One embodiment includes a multi-channel RF device. The RE device includes a cavity. The RF device also includes a first channel configured to generate a first RF signal and to transmit the first RE signal into the cavity. In addition, the RE device includes a second channel spaced apart and electrically isolated from the first channel. The second channel is configured to wirelessly receive the first RE signal transmitted by the first channel. The second channel is also configured to extract a frequency of the first RE signal from the received first RE signal. In addition, the second channel is configured to generate, based on the extracted frequency, a second RE signal. Further, the second channel is configured to transmit the second RE signal into the cavity.
    Type: Grant
    Filed: March 2, 2021
    Date of Patent: June 11, 2024
    Assignee: Ampleon Netherlands B.V.
    Inventor: Yevhen Tymofieiev
  • Patent number: 11823986
    Abstract: The present disclosure relates to a molded radiofrequency, ‘RF’, power package. The present disclosure further relates to a method for manufacturing such package. According to example embodiments, weakening structures are provided in the leads to allow the leads to be bent without causing delamination in the body of solidified molding compound.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: November 21, 2023
    Assignee: Ampleon Netherlands B.V.
    Inventor: Leonardus Theodorus Maria Raben
  • Patent number: 11545942
    Abstract: Example embodiments relate to push-pull class E amplifiers. One example push-pull class E amplifier includes an input configured for receiving a signal to be amplified. The push-pull class E amplifier also includes an output configured for outputting the signal after amplification. Additionally, the push-pull class E amplifier includes a printed circuit board having a first dielectric layer and a second dielectric layer. Further, the push-pull class E amplifier includes a first amplifying unit and a second amplifying unit. Yet further, the push-pull class E amplifier includes a balun, a capacitive unit, a first line segment, a second line segment, a third line segment, and a fourth line segment. The first line segment and the second line segment are arranged on the first dielectric layer. A combined length of the third line segment and the fourth line segment corresponds to a quarter wavelength of an operational frequency of the amplifier.
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: January 3, 2023
    Assignee: Ampleon Netherlands B.V.
    Inventor: Yevhen Tymofieiev
  • Patent number: 11527451
    Abstract: The present invention relates to a molded air-cavity package. In addition, the present invention is related to a device comprising the same. The present invention is particularly related to molded air-cavity packages for radio-frequency ‘RF’ applications including but not limited to RF power amplifiers. Instead of using hard-stop features that are arranged around the entire perimeter of the package in a continuous manner, the present invention proposes to use spaced apart pillars formed by first and second cover supporting elements. By using only a limited amount of pillars, e.g. three or four, the position of the cover relative to the body can be defined in a more predictable manner. This particularly holds if the pillars are arranged in the outer corners of the package.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: December 13, 2022
    Assignee: Ampleon Netherlands B.V.
    Inventors: Leonardus Theodorus Maria Raben, Franciscus Gerardus Maria Meeuwsen, Jan Joseph Briones Miranda
  • Patent number: 11482501
    Abstract: Example embodiments relate to amplifiers having improved stability.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: October 25, 2022
    Assignee: Ampleon Netherlands B.V.
    Inventors: Yi Zhu, Josephus Henricus Bartholomeus Van Der Zanden, Rob Mathijs Heeres
  • Patent number: 11270954
    Abstract: The present invention relates to an electrical component. The present invention further relates to an electrical device comprising such an electrical component and to a flat no-lead package. According to the invention, the flat no-lead package comprises a semiconductor die comprising electrical circuitry that has a plurality of terminals for inputting and outputting one or more signals, a thermal pad on which the semiconductor die is mounted, a plurality of leads arranged spaced apart from the thermal pad, and a plurality of further leads that are integrally connected to the thermal pad. One or more terminals among the plurality of terminals are each connected to a respective lead, and one or more terminals among the plurality of terminals are each connected to a respective further lead.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: March 8, 2022
    Assignee: Ampleon Netherlands B.V.
    Inventor: Mariano Ercoli
  • Patent number: 11245364
    Abstract: The present invention relates to an amplifying device and to an amplifying system comprising the same. According to the present invention, an amplifier line-up is presented comprising four amplifying units which is operable in a Doherty mode and an outphasing mode. By integration of Chireix compensating elements in the matching networks used in the amplifying units a bandwidth improvement can be obtained.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: February 8, 2022
    Assignee: Ampleon Netherlands B.V.
    Inventors: Abdul Raheem Qureshi, Sergio Carlos da Conceicao Pires