Patents Assigned to Ampleon Netherlands B.V.
  • Publication number: 20190172804
    Abstract: The present disclosure relates to a radio frequency (RF) power transistor package. It further relates to a mobile telecommunications base station comprising such an RF power transistor package, and to an integrated passive die suitable for use in an RF power amplifier package. In example embodiments, an in-package impedance network is used that is connected to an output of the RF power transistor arranged inside the package. This network comprises a first inductive element having a first and second terminal, the first terminal being electrically connected to the output of the RF transistor, a resonance unit electrically connected to the second terminal of the first inductive element, and a second capacitive element electrically connected in between the resonance unit and ground, where the first capacitive element is arranged in series with the second capacitive element.
    Type: Application
    Filed: January 29, 2019
    Publication date: June 6, 2019
    Applicant: Ampleon Netherlands B.V.
    Inventors: Johannes Adrianus Maria De Boet, Freerk Van Rijs, Iordan Konstantinov Sveshtarov
  • Patent number: 10242960
    Abstract: The present disclosure relates to a radio frequency (RF) power transistor package. It further relates to a mobile telecommunications base station comprising such an RF power transistor package, and to an integrated passive die suitable for use in an RF power amplifier package. In example embodiments, an in-package impedance network is used that is connected to an output of the RF power transistor arranged inside the package. This network comprises a first inductive element having a first and second terminal, the first terminal being electrically connected to the output of the RF transistor, a resonance unit electrically connected to the second terminal of the first inductive element, and a second capacitive element electrically connected in between the resonance unit and ground, where the first capacitive element is arranged in series with the second capacitive element.
    Type: Grant
    Filed: July 20, 2017
    Date of Patent: March 26, 2019
    Assignee: Ampleon Netherlands B.V.
    Inventors: Johannes Adrianus Maria De Boet, Freerk Van Rijs, Iordan Konstantinov Sveshtarov
  • Patent number: 10218315
    Abstract: Embodiments described herein relate to a Doherty amplifier. The Doherty amplifier may include a main amplifier and a first peak amplifier, a second peak amplifier, and a third peak amplifier, each amplifier having an input and an output. The Doherty amplifier may also include a combining network configured for combining signals emerging at outputs of the amplifiers. The signals are combined at a combining node. The combining network includes a first impedance inverter arranged in between the output of the main amplifier and the output of the third peak amplifier. The combining network also includes a second impedance inverter arranged in between the output of the first peak amplifier and the output of the second peak amplifier. The combining network also includes a first 180 degrees phase shifter and a second 180 degrees phase shifter. Additionally, the combining network includes a third impedance inverter.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: February 26, 2019
    Assignee: Ampleon Netherlands B.V.
    Inventor: Xavier Bruno Jean Moronval
  • Patent number: 10218313
    Abstract: An amplifier assembly includes a three or more way Doherty amplifier arrangement (DAA) having at least three amplifiers, including a main amplifier and at least two peak amplifiers. The DAA is within a dual-path package including a first-RF-input-lead and a second-RF-input-lead for receiving components of a split RF-input signal and providing the components to the DAA. A first-RF-output-lead and a second-RF-output-lead receive a split output signal from the DAA. The DAA includes a first-semiconductor-die and a second-semiconductor-die, each having thereon respective amplifier(s). The first-semiconductor-die includes a Doherty-splitter element splitting the RF-input signal from the first-RF-input-lead to provide an input to two amplifiers thereon and a Doherty-combiner element to combine an output from the two amplifiers. The Doherty-combiner element is connected to the first-RF-output-lead.
    Type: Grant
    Filed: July 21, 2016
    Date of Patent: February 26, 2019
    Assignee: Ampleon Netherlands B.V.
    Inventors: Xavier Bruno Jean Moronval, Jean-Jacques Bouny
  • Patent number: 10143045
    Abstract: A radio frequency (RF) heating apparatus and a microwave oven including an RF heating apparatus. The apparatus includes a cavity for receiving an object to be heated. The apparatus also includes a plurality of channels for generating RF radiation to be introduced into the cavity. Each channel includes a frequency synthesizer, a power amplifier and an antenna. Each channel is operable to use a common phase reference signal for generating the RF radiation. Each channel may be controllably operable to generate RF radiation having different, respective frequency spectra. Forward and reverse signal detection circuitry may be provided that is operable to determine amplitude, frequency and/or phase information relating to RF radiation in the cavity. This information may be used for adaptively controlling the RF radiation generated by each channel.
    Type: Grant
    Filed: May 18, 2015
    Date of Patent: November 27, 2018
    Assignee: Ampleon Netherlands, B.V.
    Inventors: Robin Wesson, Roger Williams
  • Patent number: 10038407
    Abstract: A die is described comprising at least one 3-way Doherty amplifier comprising a main stage, a first peak stage and a second peak stage. An input is connected to an input network which is connected to the main stage, first peak stage and second peak stage. The input network includes a first impedance connected to an input of the first peak stage and providing a ?90° phase shift and a second impedance connected to an input of the second peak stage and providing a 90° phase shift. An output is connected to an output network which is connected to the main stage, first peak stage and second peak stage. The output network includes a third impedance connected to the output of the first peak stage and providing a 180° phase shift and a fourth impedance connected to the output of the main stage and providing a 90° phase shift.
    Type: Grant
    Filed: August 7, 2015
    Date of Patent: July 31, 2018
    Assignee: Ampleon Netherlands B.V.
    Inventors: Xavier Moronval, Jean-Jacques Bouny, Gerard Bouisse
  • Patent number: 10003318
    Abstract: The disclosure relates to a circuit comprising a balun portion, a balanced side impedance transforming element and an unbalanced side impedance transforming element. The balun portion at least partly transforms the signal between a balanced signal input/output terminal and an unbalanced signal input/output terminal. The impedance transforming elements at least partly alter the impedance presented at the balanced and unbalanced side of the balun. In addition at least one matching transmission element is provided. By separating the role of impedance transformation from balun signal conversion, the useful bandwidth of the circuit can be improved in comparison to a balun that provides both signal conversion and impedance transformation functions.
    Type: Grant
    Filed: June 9, 2017
    Date of Patent: June 19, 2018
    Assignee: Ampleon Netherlands B.V.
    Inventor: Jawad Hussain Qureshi
  • Patent number: 9941227
    Abstract: A package is provided. The package comprises a die and an impedance matching network. The die has a first terminal and a second terminal. The impedance matching network is coupled to the second terminal and comprises a first inductor and a first capacitor. The first inductor comprises first bond wire connections coupled between the second terminal and a first bond pad on the die, and second bond wire connections coupled between the first bond pad and a second bond pad coupled to the first capacitor.
    Type: Grant
    Filed: May 26, 2016
    Date of Patent: April 10, 2018
    Assignee: Ampleon Netherlands B.V.
    Inventors: Yi Zhu, Josephus Van Der Zanden, Iouri Volokhine, Rob Mathijs Heeres
  • Patent number: 9928954
    Abstract: A bond-wire transformer for an RF device is described. The primary and secondary circuits of the bond-wire transformer are formed using loops formed with a pair of normal profile and low profile bond-wires. This results in improved efficiency and higher power operation.
    Type: Grant
    Filed: August 7, 2015
    Date of Patent: March 27, 2018
    Assignee: Ampleon Netherlands B.V.
    Inventor: Vittorio Cuoco
  • Patent number: 9911628
    Abstract: For so called film assisted molding (FAM) device processing techniques there is provided lead frame for a semiconductor device, comprising a base portion and a connection lead, said base portion arranged for mounting a semiconductor die, said connection lead comprising a horizontal portion for external connection and an angled portion for connection to said semiconductor die, wherein the angled portion has a positive angle with respect to the base portion. The connection lead may comprise a recessed portion.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: March 6, 2018
    Assignee: Ampleon Netherlands B.V.
    Inventors: Freek Egbert van Straten, Jeremy Joy Montalbo Incomio, Albertus Reijs
  • Publication number: 20180034419
    Abstract: Embodiments described herein relate to a Doherty amplifier. The Doherty amplifier may include a main amplifier and a first peak amplifier, a second peak amplifier, and a third peak amplifier, each amplifier having an input and an output. The Doherty amplifier may also include a combining network configured for combining signals emerging at outputs of the amplifiers. The signals are combined at a combining node. The combining network includes a first impedance inverter arranged in between the output of the main amplifier and the output of the third peak amplifier. The combining network also includes a second impedance inverter arranged in between the output of the first peak amplifier and the output of the second peak amplifier. The combining network also includes a first 180 degrees phase shifter and a second 180 degrees phase shifter. Additionally, the combining network includes a third impedance inverter.
    Type: Application
    Filed: February 4, 2016
    Publication date: February 1, 2018
    Applicant: Ampleon Netherlands B.V.
    Inventor: Xavier Bruno Jean Moronval
  • Publication number: 20180026000
    Abstract: The present disclosure relates to a radio frequency (RF) power transistor package. It further relates to a mobile telecommunications base station comprising such an RF power transistor package, and to an integrated passive die suitable for use in an RF power amplifier package. In example embodiments, an in-package impedance network is used that is connected to an output of the RF power transistor arranged inside the package. This network comprises a first inductive element having a first and second terminal, the first terminal being electrically connected to the output of the RF transistor, a resonance unit electrically connected to the second terminal of the first inductive element, and a second capacitive element electrically connected in between the resonance unit and ground, where the first capacitive element is arranged in series with the second capacitive element.
    Type: Application
    Filed: July 20, 2017
    Publication date: January 25, 2018
    Applicant: Ampleon Netherlands B.V.
    Inventors: Johannes Adrianus Maria De Boet, Freerk Van Rijs, Iordan Konstantinov Sveshtarov
  • Patent number: 9820401
    Abstract: A packaged Radio Frequency power transistor device is described, which comprises a component carrier a die comprising a semiconductor transistor having a source, a gate and a drain, wherein the die is mounted at the component carrier, a ground connection being electrically connected to the source, an output lead being electrically connected to the drain, a resonance circuit being electrically inserted between the output lead and the ground connection, and a video lead being electrically connected to the resonance circuit. The video lead is configured for being connected to a first contact of a decoupling capacitor. The ground connection is configured for being connected to a second contact of the decoupling capacitor. It is further described a RF power amplifier comprising such a packaged Radio Frequency power transistor device.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: November 14, 2017
    Assignee: Ampleon Netherlands B.V.
    Inventors: Yi Zhu, Josephus van der Zanden
  • Patent number: 9786640
    Abstract: A transistor arrangement comprising an electrically conductive substrate; a semiconductor body including a transistor structure, the transistor structure including a source terminal connected to said substrate; a bond pad providing a connection to the transistor structure configured to receive a bond wire; wherein the semiconductor body includes an RF-return current path for carrying return current associated with said bond wire, said RF-return current path comprising a strip of metal arranged on said body, said strip configured such that it extends beneath said bond pad and is connected to said source terminal of the transistor structure.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: October 10, 2017
    Assignee: Ampleon Netherlands B.V.
    Inventors: Petra Christina Anna Hammes, Josephus Henricus van der Zanden, Rob Mathijs Heeres, Albert Gerardus Wilhelmus Philipus van Zuijlen
  • Patent number: 9768736
    Abstract: A power amplifier cell (401) comprising: a first power amplifier (410), a second power amplifier (416) and a balun (422). The balun (422) comprising: a first transmission line (430); a second transmission line (432); a third transmission line (434); a fourth transmission line (436); and a biasing circuit (438) connected between (i) a reference terminal, and (ii) a second end of the second transmission line and a second end of the fourth transmission line.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: September 19, 2017
    Assignee: Ampleon Netherlands B.V.
    Inventor: Jawad Hussain Qureshi
  • Patent number: 9698750
    Abstract: The disclosure relates to a circuit comprising a balun portion, a balanced side impedance transforming element and an unbalanced side impedance transforming element. The balun portion at least partly transforms the signal between a balanced signal input/output terminal and an unbalanced signal input/output terminal. The impedance transforming elements at least partly alter the impedance presented at the balanced and unbalanced side of the balun. In addition at least one matching transmission element is provided. By separating the role of impedance transformation from balun signal conversion, the useful bandwidth of the circuit can be improved in comparison to a balun that provides both signal conversion and impedance transformation functions.
    Type: Grant
    Filed: January 2, 2015
    Date of Patent: July 4, 2017
    Assignee: Ampleon Netherlands B.V.
    Inventor: Jawad Hussain Qureshi
  • Patent number: 9627301
    Abstract: An integrated circuit arrangement includes a flange, a transistor die, and a first conducting element defining a lead. The flange includes a conducting material and the transistor die is disposed on a surface of the flange. The first conducting element is electrically connected to the transistor die via connecting elements to allow current flow from the transistor die. The flange defines return current paths allowing the current flow via the connecting elements and the lead to return to the transistor die. The flange includes one or more reduced thickness portions that are configured to limit the return current paths and control current flow passing through the flange to the transistor die.
    Type: Grant
    Filed: May 3, 2015
    Date of Patent: April 18, 2017
    Assignee: Ampleon Netherlands B.V.
    Inventor: Vittorio Cuoco
  • Patent number: 9621109
    Abstract: An amplifier structure comprising a transistor element having a plurality of sub-sections arranged adjacent to one another along a transistor element axis, a bias distribution element comprising a first part and a second part, the first part configured to receive a bias signal and the second part configured to supply the bias signal to each of the sub-sections of the transistor stage, wherein the first part is configured and arranged to deliver the bias signal to a distribution point and the second part is configured to diverge from the distribution point to provide the bias signal to each of the sub-sections of the transistor element, the distribution point arranged substantially facing a center point of the transistor element axis.
    Type: Grant
    Filed: March 2, 2015
    Date of Patent: April 11, 2017
    Assignee: Ampleon Netherlands B.V.
    Inventors: Yi Zhu, Josephus van der Zanden, Kanjun Shi
  • Patent number: 9577585
    Abstract: A Doherty amplifier for amplifying an input signal to an output signal, the Doherty amplifier comprising: a main amplifier for receiving a first signal and for amplifying the first signal to generate a first amplified signal; a first peak amplifier for receiving a second signal and for generating a second amplified signal, the first peak amplifier only operating when the second signal has reached a first threshold power, the first and second signal split from the input signal; and output circuitry to combine the first and second amplified signals to generate an output signal having an operating bandwidth, the output circuitry comprising inductors arranged in the format of a branch line coupler, the inductors coupled to the output parasitic capacitances of the main and peak amplifier.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: February 21, 2017
    Assignee: Ampleon Netherlands B.V.
    Inventors: Xavier Moronval, Jean-Jacques Bouny, Gerard Bouisse
  • Patent number: 9570323
    Abstract: For so called film assisted moulding (FAM) device processing techniques there is provided lead frame for a semiconductor device, comprising a base portion and a connection lead, said base portion arranged for mounting a semiconductor die, said connection lead comprising a horizontal portion for external connection and an angled portion for connection to said semiconductor die, wherein the angled portion has a positive angle with respect to the base portion. The connection lead may comprise a recessed portion.
    Type: Grant
    Filed: September 4, 2014
    Date of Patent: February 14, 2017
    Assignee: Ampleon Netherlands B.V.
    Inventors: Freek Egbert van Straten, Jeremy Joy Montalbo Incomio, Albertus Reijs