Patents Assigned to Ampleon Netherlands B.V.
  • Patent number: 9543914
    Abstract: An integrated Doherty amplifier structure comprising; a main amplifier stage; at least one peak amplifier stage; an output combination bar configured to receive and combine an output from both the main amplifier stage and the or each peak amplifier stage; a main connection configured to connect an output of the main amplifier stage to the combination bar, the main connection comprising, at least in part, a bond wire forming a first inductance; a peak connection configured to connect an output of the peak amplifier stage to the combination bar; wherein the main connection connects to the combination bar at a first point along the bar and the peak connection connects to the combination bar at a second point along the bar spaced from the first point and the main amplifier stage is located further from the output combination bar than the at least one peak amplifier stage.
    Type: Grant
    Filed: October 10, 2014
    Date of Patent: January 10, 2017
    Assignee: Ampleon Netherlands B.V.
    Inventor: Jean-Jacques Bouny
  • Patent number: 9509252
    Abstract: The invention relates to a Doherty amplifier for amplifying an input signal at an operating frequency, comprising: a main amplifier; a first peak amplifier; a second peak amplifier, each of the amplifiers comprising an input for receiving the input signal and an output for providing an amplified signal, a plurality of peak amplifiers, each of the amplifiers comprising an input for receiving the input signal and an output for providing an amplified signal; a first input phase shifter; a second input phase shifter; a first capacitor coupled between the source and drain of the first peak amplifier; a first output phase shifter and a second output phase shifter.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: November 29, 2016
    Assignee: Ampleon Netherlands B.V.
    Inventors: Xavier Moronval, Gerard Jean-Louis Bouisse, Jean-Jacques Bouny
  • Patent number: 9496837
    Abstract: A Doherty amplifier has at least one peaking amplifier which has first and second drain connections, wherein the first drain connection is connected to the output network, and the other second drain connection is connection to the load. By providing two drain connections, separate package leads to the peaking amplifier can be taken into account when designing the impedance inverter and an output impedance. In this way, the circuit operation can be optimized both for the impedance inversion function and for driving the output load.
    Type: Grant
    Filed: June 11, 2014
    Date of Patent: November 15, 2016
    Assignee: Ampleon Netherlands B.V.
    Inventor: Jawad Qureshi
  • Patent number: 9496836
    Abstract: A Doherty amplifier has different drain voltages applied to the power transistors of the main and peaking stages. The impedance inverter comprises at least one first series phase shifting element between the output of the main amplifier and the Doherty amplifier output and at least one second series phase shifting element between the output of the peaking amplifier and the Doherty amplifier output. This provides a wideband combiner. The combination of this wideband combiner and different drain drive levels provides an improved combination of efficiency and bandwidth.
    Type: Grant
    Filed: May 22, 2014
    Date of Patent: November 15, 2016
    Assignee: Ampleon Netherlands B.V.
    Inventor: Jawad Qureshi
  • Publication number: 20160315073
    Abstract: A transistor arrangement comprising an electrically conductive substrate; a semiconductor body including a transistor structure, the transistor structure including a source terminal connected to said substrate; a bond pad providing a connection to the transistor structure configured to receive a bond wire; wherein the semiconductor body includes an RF-return current path for carrying return current associated with said bond wire, said RF-return current path comprising a strip of metal arranged on said body, said strip configured such that it extends beneath said bond pad and is connected to said source terminal of the transistor structure.
    Type: Application
    Filed: June 30, 2016
    Publication date: October 27, 2016
    Applicant: Ampleon Netherlands B.V.
    Inventors: Petra Christina Anna Hammes, Josephus Henricus van der Zanden, Rob Mathijs Heeres, Albert Gerardus Wilhelmus Philipus van Zuijlen
  • Patent number: 9461005
    Abstract: An RF package including: an RF circuit; a non-gaseous dielectric material coupled to the RF circuit, and having a thickness based on a magnetic field in the RF circuit; and an encapsulant material coupled to cover the RF circuit and non-gaseous dielectric material on at least one side of the RF circuit. A package manufacturing method, including: identifying an RF circuit; dispensing a non-gaseous dielectric material upon the RF circuit, wherein at least a portion of the non-gaseous dielectric material has a thickness based on a magnetic field in the RF circuit; and covering the RF circuit and non-gaseous dielectric material with an encapsulant material on at least one side of the RF circuit.
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: October 4, 2016
    Assignee: Ampleon Netherlands B.V.
    Inventors: Christian Weinschenk, Amar Ashok Mavinkurve
  • Patent number: 9450545
    Abstract: There is described a dual-band semiconductor RF amplifier device. The device comprises (a) a transistor (205) having an output capacitance (CO), (b) a first shunt element (210) arranged in parallel with the output capacitance, the first shunt element comprising a first shunt inductor (L1) connected in series with a first shunt capacitor (C1), and (c) a second shunt element (220) arranged in parallel with the first shunt capacitor, the second shunt element comprising a second shunt inductor (L2) connected in series with a second shunt capacitor (C2), wherein the capacitance of the second shunt capacitor (C2) is at least two times the capacitance of the first shunt capacitor (C1). Furthermore, there is described a method of manufacturing a dual-band semiconductor RF amplifier device and a dual-band RF amplifier comprising a plurality of such amplifier devices.
    Type: Grant
    Filed: May 1, 2014
    Date of Patent: September 20, 2016
    Assignee: Ampleon Netherlands B.V.
    Inventors: Venkata Gutta, Anna Walensieniuk, Rob Volgers
  • Patent number: 9450283
    Abstract: An RF power device that includes a transistor with a compact impedance transformation circuit, where the transformation circuit includes a lumped element CLC analog transmission line and an associated embedded directional bilateral RF power sensor that is inductively coupled to the transmission line to provide detection of direct and reflected power independently with high directivity.
    Type: Grant
    Filed: December 15, 2005
    Date of Patent: September 20, 2016
    Assignee: Ampleon Netherlands B.V.
    Inventor: Igor Blednov
  • Patent number: 9444421
    Abstract: Lumped-element based class-E Chireix combiners are disclosed that are equivalents of a quarter-wave transmission line combiner. The proposed class-E equivalent power amplifier circuits that are used can be derived from a parallel tuned class-E implementation. The proposed low-pass equivalents can behave similarly in terms of class-E performance, but absorb the 90 degree transmission line.
    Type: Grant
    Filed: July 28, 2014
    Date of Patent: September 13, 2016
    Assignee: Ampleon Netherlands B.V.
    Inventor: Mark Pieter van der Heijden
  • Patent number: 9413308
    Abstract: In RF power transistors, the current distribution along edges of the transistor die may be uneven leading to a loss in efficiency and in the output power obtained, resulting in degradation in performance. When multiple parallel dies are placed in a package, distribution effects along the vertical dimension of the dies are more pronounced. A RF power device (600) for amplifying RF signals is disclosed which modifies the impedance of a portion of the respective one of the input lead and the output lead and redistributes the current flow at an edge of the transistor die.
    Type: Grant
    Filed: June 27, 2014
    Date of Patent: August 9, 2016
    Assignee: Ampleon Netherlands B.V.
    Inventors: Josephus van der Zanden, Vittorio Cuoco, Rob Mathijs Heeres
  • Patent number: 9406659
    Abstract: A transistor arrangement comprising an electrically conductive substrate; a semiconductor body including a transistor structure, the transistor structure including a source terminal connected to said substrate; a bond pad providing a connection to the transistor structure configured to receive a bond wire; wherein the semiconductor body includes an RF-return current path for carrying return current associated with said bond wire, said RF-return current path comprising a strip of metal arranged on said body, said strip configured such that it extends beneath said bond pad and is connected to said source terminal of the transistor structure.
    Type: Grant
    Filed: October 27, 2014
    Date of Patent: August 2, 2016
    Assignee: Ampleon Netherlands B.V.
    Inventors: Petra Christina Anna Hammes, Josephus Henricus Bartholomeus van der Zanden, Rob Mathijs Heeres, Albert Gerardus Wilhelmus Philipus van Zuijlen
  • Patent number: 9362871
    Abstract: A Doherty amplifier is disclosed, being adapted to receive an RF input signal and to output an RF output signal and comprising a main amplifier and a peak amplifier, each comprising: a first amplifier (T1, T1?) and a second amplifier (T2, T2?), each amplifier having a respective input terminal and a respective output terminal, the first amplifier and the second amplifier being adapted to amplify a respective input signal derived from the RF input signal and received at the respective input terminal and to deliver a first output signal and a second output signal, respectively; a first phase shifter (14, 14?) and a second phase shifter (15, 15?) coupled to the output terminal of the first amplifier and to the output terminal of the second amplifier, respectively; a third phase shifter (16, 16?); and a fourth phase shifter (17, 17?); wherein the Doherty amplifier further comprises a first combining node (A) and a second combining node (B) and, wherein each third phase shifter is coupled between the respective fi
    Type: Grant
    Filed: July 28, 2014
    Date of Patent: June 7, 2016
    Assignee: AMPLEON NETHERLANDS B.V.
    Inventor: Jawad Hussain Qureshi
  • Patent number: 9324674
    Abstract: A die comprising a body of semiconductor material, said body configured to receive a solder layer of gold containing alloy for use in die bonding said die to a substrate, wherein the die includes an interface layer on a surface of the body for receiving the solder layer, the interface layer having a plurality of sub-layers of different metals.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: April 26, 2016
    Assignee: Ampleon Netherlands B.V.
    Inventors: Johannes Wilhelmus van Rijckevorsel, Emiel de Bruin
  • Patent number: 9325280
    Abstract: An electronic circuit has a multi-way Doherty amplifier. The multi-way Doherty amplifier comprises a two-way Doherty amplifier with a main stage and a first peak stage that are integrated in a semiconductor device; and at least one further peak stage implemented with a discrete power transistor.
    Type: Grant
    Filed: September 2, 2008
    Date of Patent: April 26, 2016
    Assignee: Ampleon Netherlands B.V.
    Inventors: Igor Blednov, Josephus H. B. Van Der Zanden