Abstract: The disclosure relates to a circuit comprising a balun portion, a balanced side impedance transforming element and an unbalanced side impedance transforming element. The balun portion at least partly transforms the signal between a balanced signal input/output terminal and an unbalanced signal input/output terminal. The impedance transforming elements at least partly alter the impedance presented at the balanced and unbalanced side of the balun. In addition at least one matching transmission element is provided. By separating the role of impedance transformation from balun signal conversion, the useful bandwidth of the circuit can be improved in comparison to a balun that provides both signal conversion and impedance transformation functions.

Abstract: An integrated circuit arrangement includes a flange, a transistor die, and a first conducting element defining a lead. The flange includes a conducting material and the transistor die is disposed on a surface of the flange. The first conducting element is electrically connected to the transistor die via connecting elements to allow current flow from the transistor die. The flange defines return current paths allowing the current flow via the connecting elements and the lead to return to the transistor die. The flange includes one or more reduced thickness portions that are configured to limit the return current paths and control current flow passing through the flange to the transistor die.

Abstract: An amplifier structure comprising a transistor element having a plurality of sub-sections arranged adjacent to one another along a transistor element axis, a bias distribution element comprising a first part and a second part, the first part configured to receive a bias signal and the second part configured to supply the bias signal to each of the sub-sections of the transistor stage, wherein the first part is configured and arranged to deliver the bias signal to a distribution point and the second part is configured to diverge from the distribution point to provide the bias signal to each of the sub-sections of the transistor element, the distribution point arranged substantially facing a center point of the transistor element axis.

Abstract: A Doherty amplifier for amplifying an input signal to an output signal, the Doherty amplifier comprising: a main amplifier for receiving a first signal and for amplifying the first signal to generate a first amplified signal; a first peak amplifier for receiving a second signal and for generating a second amplified signal, the first peak amplifier only operating when the second signal has reached a first threshold power, the first and second signal split from the input signal; and output circuitry to combine the first and second amplified signals to generate an output signal having an operating bandwidth, the output circuitry comprising inductors arranged in the format of a branch line coupler, the inductors coupled to the output parasitic capacitances of the main and peak amplifier.

Abstract: For so called film assisted moulding (FAM) device processing techniques there is provided lead frame for a semiconductor device, comprising a base portion and a connection lead, said base portion arranged for mounting a semiconductor die, said connection lead comprising a horizontal portion for external connection and an angled portion for connection to said semiconductor die, wherein the angled portion has a positive angle with respect to the base portion. The connection lead may comprise a recessed portion.

Abstract: An integrated Doherty amplifier structure comprising; a main amplifier stage; at least one peak amplifier stage; an output combination bar configured to receive and combine an output from both the main amplifier stage and the or each peak amplifier stage; a main connection configured to connect an output of the main amplifier stage to the combination bar, the main connection comprising, at least in part, a bond wire forming a first inductance; a peak connection configured to connect an output of the peak amplifier stage to the combination bar; wherein the main connection connects to the combination bar at a first point along the bar and the peak connection connects to the combination bar at a second point along the bar spaced from the first point and the main amplifier stage is located further from the output combination bar than the at least one peak amplifier stage.

Abstract: The invention relates to a Doherty amplifier for amplifying an input signal at an operating frequency, comprising: a main amplifier; a first peak amplifier; a second peak amplifier, each of the amplifiers comprising an input for receiving the input signal and an output for providing an amplified signal, a plurality of peak amplifiers, each of the amplifiers comprising an input for receiving the input signal and an output for providing an amplified signal; a first input phase shifter; a second input phase shifter; a first capacitor coupled between the source and drain of the first peak amplifier; a first output phase shifter and a second output phase shifter.

Abstract: A Doherty amplifier has at least one peaking amplifier which has first and second drain connections, wherein the first drain connection is connected to the output network, and the other second drain connection is connection to the load. By providing two drain connections, separate package leads to the peaking amplifier can be taken into account when designing the impedance inverter and an output impedance. In this way, the circuit operation can be optimized both for the impedance inversion function and for driving the output load.

Abstract: A Doherty amplifier has different drain voltages applied to the power transistors of the main and peaking stages. The impedance inverter comprises at least one first series phase shifting element between the output of the main amplifier and the Doherty amplifier output and at least one second series phase shifting element between the output of the peaking amplifier and the Doherty amplifier output. This provides a wideband combiner. The combination of this wideband combiner and different drain drive levels provides an improved combination of efficiency and bandwidth.

Abstract: A transistor arrangement comprising an electrically conductive substrate; a semiconductor body including a transistor structure, the transistor structure including a source terminal connected to said substrate; a bond pad providing a connection to the transistor structure configured to receive a bond wire; wherein the semiconductor body includes an RF-return current path for carrying return current associated with said bond wire, said RF-return current path comprising a strip of metal arranged on said body, said strip configured such that it extends beneath said bond pad and is connected to said source terminal of the transistor structure.

Abstract: An RF package including: an RF circuit; a non-gaseous dielectric material coupled to the RF circuit, and having a thickness based on a magnetic field in the RF circuit; and an encapsulant material coupled to cover the RF circuit and non-gaseous dielectric material on at least one side of the RF circuit. A package manufacturing method, including: identifying an RF circuit; dispensing a non-gaseous dielectric material upon the RF circuit, wherein at least a portion of the non-gaseous dielectric material has a thickness based on a magnetic field in the RF circuit; and covering the RF circuit and non-gaseous dielectric material with an encapsulant material on at least one side of the RF circuit.

Abstract: There is described a dual-band semiconductor RF amplifier device. The device comprises (a) a transistor (205) having an output capacitance (CO), (b) a first shunt element (210) arranged in parallel with the output capacitance, the first shunt element comprising a first shunt inductor (L1) connected in series with a first shunt capacitor (C1), and (c) a second shunt element (220) arranged in parallel with the first shunt capacitor, the second shunt element comprising a second shunt inductor (L2) connected in series with a second shunt capacitor (C2), wherein the capacitance of the second shunt capacitor (C2) is at least two times the capacitance of the first shunt capacitor (C1). Furthermore, there is described a method of manufacturing a dual-band semiconductor RF amplifier device and a dual-band RF amplifier comprising a plurality of such amplifier devices.

Abstract: An RF power device that includes a transistor with a compact impedance transformation circuit, where the transformation circuit includes a lumped element CLC analog transmission line and an associated embedded directional bilateral RF power sensor that is inductively coupled to the transmission line to provide detection of direct and reflected power independently with high directivity.

Abstract: Lumped-element based class-E Chireix combiners are disclosed that are equivalents of a quarter-wave transmission line combiner. The proposed class-E equivalent power amplifier circuits that are used can be derived from a parallel tuned class-E implementation. The proposed low-pass equivalents can behave similarly in terms of class-E performance, but absorb the 90 degree transmission line.

Abstract: In RF power transistors, the current distribution along edges of the transistor die may be uneven leading to a loss in efficiency and in the output power obtained, resulting in degradation in performance. When multiple parallel dies are placed in a package, distribution effects along the vertical dimension of the dies are more pronounced. A RF power device (600) for amplifying RF signals is disclosed which modifies the impedance of a portion of the respective one of the input lead and the output lead and redistributes the current flow at an edge of the transistor die.

Abstract: A transistor arrangement comprising an electrically conductive substrate; a semiconductor body including a transistor structure, the transistor structure including a source terminal connected to said substrate; a bond pad providing a connection to the transistor structure configured to receive a bond wire; wherein the semiconductor body includes an RF-return current path for carrying return current associated with said bond wire, said RF-return current path comprising a strip of metal arranged on said body, said strip configured such that it extends beneath said bond pad and is connected to said source terminal of the transistor structure.

Abstract: An electronic circuit has a multi-way Doherty amplifier. The multi-way Doherty amplifier comprises a two-way Doherty amplifier with a main stage and a first peak stage that are integrated in a semiconductor device; and at least one further peak stage implemented with a discrete power transistor.

Abstract: A die comprising a body of semiconductor material, said body configured to receive a solder layer of gold containing alloy for use in die bonding said die to a substrate, wherein the die includes an interface layer on a surface of the body for receiving the solder layer, the interface layer having a plurality of sub-layers of different metals.