Patents Assigned to Analog Device, Inc.
  • Publication number: 20190086244
    Abstract: Fiber Bragg grating interrogation and sensing used for strain and temperature measurements. A simple, broadband light source is used to interrogate one or more fiber Bragg grating (FBG). Specifically, a packaged LED is coupled to fiber, the light therefrom is reflected off a uniform FBG. The reflected light is subsequently analyzed using a filter and a plurality of Si photodetectors. In particular, the filter is a chirped FBG or an optically coated filter, in accordance with some embodiments. Measurement analysis is performed by ratio of intensities at the plurality of detectors, at least in part.
    Type: Application
    Filed: September 19, 2018
    Publication date: March 21, 2019
    Applicant: Analog Devices, Inc.
    Inventor: Shrenik DELIWALA
  • Patent number: 10236808
    Abstract: The present disclosure provides a system and method to determine at least one parameter of a motor, such as an inductance. The inductance can be determined, such as based on one or more digitally sampled motor winding currents. A digital filter can be applied to the digital samples such as to determine a slope of the motor winding currents. The digital filter can include a least squares fit that can be applied to the digital samples, such as to determine a slope of the motor winding currents. The least squares fit can be determined based on a computation of central tendencies such as an average value of time, an average value of current, an average value of the square of time, and the average value of the product of time and current. The average values can be determined recursively to provide improved computational speed.
    Type: Grant
    Filed: August 25, 2016
    Date of Patent: March 19, 2019
    Assignee: Analog Devices, Inc.
    Inventors: Brendan Aengus Murray, Jens Engen Sorensen
  • Publication number: 20190078912
    Abstract: Various embodiments mitigate the risk of frequency-lock in systems having multiple resonators by dynamically changing the frequency at which at least one of the resonators is driven. More particularly, the drive frequency of at least one of the resonators is changed often enough that the multiple resonators do not have time to achieve frequency lock. Changes in the oscillation of the resonators may be analyzed to determine, for example, acceleration of such systems. Some embodiments implement self-test by assessing expected performance of a system with toggling drive frequencies. More particularly, some embodiments implement self-test by artificially inducing displacement of a movable member of a system.
    Type: Application
    Filed: November 8, 2018
    Publication date: March 14, 2019
    Applicant: Analog Devices, Inc.
    Inventors: Gaurav Vohra, William A. Clark, Mehrnaz Motiee
  • Publication number: 20190080231
    Abstract: Systems and methods are provided for reducing power in in-memory computing, matrix-vector computations, and neural networks. An apparatus for in-memory computing using charge-domain circuit operation includes transistors configured as memory bit cells, transistors configured to perform in-memory computing using the memory bit cells, capacitors configured to store a result of in-memory computing from the memory bit cells, and switches, wherein, based on a setting of each of the switches, the charges on at least a portion of the plurality of capacitors are shorted together. Shorting together the plurality of capacitors yields a computation result.
    Type: Application
    Filed: September 7, 2018
    Publication date: March 14, 2019
    Applicant: Analog Devices, Inc.
    Inventors: Eric G. NESTLER, Naveen VERMA, Hossein VALAVI
  • Patent number: 10229596
    Abstract: A lidar system can be provided for measuring a clearance of overhead infrastructure, such as a bridge or overpass. The lidar system can alert a vehicle driver or automatically brake the vehicle if the available clearance is smaller than a height of the vehicle. The lidar system can emit rays of light over a range of angles towards a target region where the rays of light can have a vertical span. The lidar system can then receive rays of light reflected or scattered from the target region and can determine a distance traveled by the rays of light by determining a round trip travel time of the rays. A clearance of the overhead infrastructure can then be determined using geometric relationships.
    Type: Grant
    Filed: October 5, 2017
    Date of Patent: March 12, 2019
    Assignee: Analog Devices, Inc.
    Inventor: Harvey Weinberg
  • Patent number: 10228768
    Abstract: In an example, a system for detecting an object in an area over a screen of a mobile device may comprise a light source and a photodetector tilted toward the screen. Since a field of view of the photodetector and a radiation field of the light source may be directed toward the screen, the system may detect that a user performed a non-contacting gesture in the area over the screen. In another example, a system for detecting multiple modes of finger gestures may detect at least one of a signature gesture, a thumb joystick mode, or a thumb mouse mode. The system can execute a calendar application upon detecting that a user gestured in the shape of a letter ā€œCā€. When detecting a thumb gesture, the system may utilize a sensor having a reduced range relative to the range needed for hand gestures and, thereby, reduce power consumption.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: March 12, 2019
    Assignee: ANALOG DEVICES, INC.
    Inventor: Young Han Kim
  • Patent number: 10224887
    Abstract: A transimpedance amplifier (TIA) can include an operational amplifier with a programmable compensation capacitor, such as can be used for compensating first transconductance stage of an operational amplifier circuit that can be used in a TIA configuration. This technique is particularly suitable, for example, for an Optical Time Domain Reflectometer (OTDR) application, which can use variable pulsewidth launch pulses. Based on the pulsewidth of such launch pulses, the bandwidth of an operational amplifier of the TIA can be adjusted, such as to decrease the signal and noise bandwidth when relatively wider pulses are to be used, to improve the noise performance for such wider pulses, and to increase the signal and noise bandwidth when relatively narrower pulses are to be used.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: March 5, 2019
    Assignee: Analog Devices, Inc.
    Inventors: Zoltan Frasch, Mahmoud Belaid
  • Patent number: 10224474
    Abstract: An integrated circuit may include a substrate and a dielectric layer formed over the substrate. A plurality of p-type thermoelectric elements and a plurality of n-type thermoelectric elements may be disposed within the dielectric layer that are connected in series while alternating between the p-type and the n-type thermoelectric elements. The integrated circuit may include first and second substrates each having formed thereon a plurality of thermoelectric legs of a respective type of thermoelectric material. The first and second thermoelectric substrates also may have respective conductors, each coupled to a base of an associated thermoelectric leg and forming a mounting pad for coupling to a thermoelectric leg of the counterpart substrate.
    Type: Grant
    Filed: November 9, 2015
    Date of Patent: March 5, 2019
    Assignee: Analog Devices, Inc.
    Inventors: Jane Cornett, Baoxing Chen, William Allan Lane, Patrick M. McGuinness, Helen Berney
  • Patent number: 10223312
    Abstract: In an example, there is disclosed a computing apparatus, having: a first master having a first ordinal quality of service (QoS) profile; a second master having a second ordinal QoS profile, wherein the second ordinal QoS profile is higher in order than the first ordinal QoS profile; a slave; a multiplexed interconnect to communicatively couple the first master and second master to the slave with a priority according to the ordinal QoS profiles; and one or more logic elements, including at least one hardware logic element, providing a QoS engine to: determine that the first master has initiated a slave operation via the interconnect; determine that completing the slave operation according to a QoS criterion provided by the second master requires elevated QoS; and promote the first master to a third ordinal QoS profile having an order higher than the second ordinal QoS profile.
    Type: Grant
    Filed: October 18, 2016
    Date of Patent: March 5, 2019
    Assignee: ANALOG DEVICES, INC.
    Inventors: Kaushal Sanghai, Robert E. Peloquin, Thomas C. Ajamian
  • Publication number: 20190063923
    Abstract: A method for detecting frequency mismatch in microelectromechanical systems (MEMS) gyroscopes is described. Detection of the frequency mismatch between a drive signal and a sense signal may be performed by generating an output signal whose spectrum reflects the physical characteristics of the gyroscope, and using the output signal to determine the frequency fC of the sense signal. The output signal may be generated by cross-correlating a random or pseudo-random noise signal with a response signal, where the response signal can be obtained by allowing the noise signal to pass through a system designed to have a noise transfer function that mimics the frequency response of the gyroscope. Since the noise signal is random or pseudo-random, cross-correlating the noise signal with the response signal reveals spectral characteristics of the gyroscope. To improve computational efficiency, the cross-correlation can be performed on demodulated versions of the noise signal and the response signal.
    Type: Application
    Filed: August 30, 2017
    Publication date: February 28, 2019
    Applicant: Analog Devices, Inc.
    Inventors: Jiefeng Yan, Ronald A. Kapusta, JR., Jianrong Chen
  • Patent number: 10210946
    Abstract: According to some aspects, a low-leakage switch is provided. In some embodiments, the low-leakage switch includes a plurality of pass transistors in series that selectively couple two ports of the low-leakage switch and a node biasing circuit coupled to a node between the plurality of pass transistors. In these embodiments, the node biasing circuit may adjust a voltage at the node to change the gate-to-source voltage of the pass transistors and, thereby, reduce the leakage current through the pass transistors when the low-leakage switch is turned off. The node biasing circuit may also include circuitry to reduce the leakage current introduced by the node biasing circuit into the node when the low-leakage switch is turned on.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: February 19, 2019
    Assignee: Analog Devices, Inc.
    Inventor: Howard R. Samuels
  • Patent number: 10209307
    Abstract: A multiple-level driver circuit, such as for providing several different signals to a device under test (DUT) in an automated test system, can include multiple diode bridge circuits. In an example, a first diode bridge circuit is configured to receive a multiple-valued input voltage signal, having at least two different DC voltage signal levels, at an input node and, in response, to selectively provide a corresponding multiple-valued output voltage signal at an output node. The first diode bridge circuit can operate in a conducting and non-commutated state when it is used to selectively provide the multiple-valued output voltage signal at the output node.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: February 19, 2019
    Assignee: Analog Devices, Inc.
    Inventor: Christopher C. McQuilkin
  • Patent number: 10211846
    Abstract: Techniques for limiting the output voltage of an amplifier without directly affecting an output current of the amplifier are provided. In an example, an amplifier can include a plurality of amplifier stages configured to receive an input voltage and to provide an output voltage as a function of the input voltage, and a comparator configured to receive a voltage limit and a representation of the output voltage of the amplifier, to adjust current at an input to a first amplifier stage of the plurality of amplifier stages when the output voltage violates the voltage limit, and to clamp the output voltage at an offset from the voltage limit.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: February 19, 2019
    Assignee: Analog Devices, Inc.
    Inventor: Kerry Brent Phillips
  • Publication number: 20190047846
    Abstract: A MEMS product includes a stress-isolated MEMS platform surrounded by a stress-relief gap and suspended from a substrate. The stress-relief gap provides a barrier against the transmission of mechanical stress from the substrate to the platform.
    Type: Application
    Filed: October 15, 2018
    Publication date: February 14, 2019
    Applicant: Analog Devices, Inc.
    Inventors: Xin Zhang, Michael Judy, George M. Molnar, Christopher Needham, Kemiao Jia
  • Publication number: 20190049482
    Abstract: A MEMS resonant accelerometer is described. The MEMS resonant accelerometer may comprise a pair of proof masses configured to resonate when driven with periodic signals. In this respect, the accelerometer's proof masses may serve as masses for detecting accelerations as well as resonators. The MEMS resonant accelerometer may comprise drive electrodes for causing the proof masses to resonate and sense electrodes for sensing motion of the proof masses. The magnitude of a z-axis acceleration, that is, an acceleration perpendicular to the plane of the proof masses, may be detected by sensing the frequency at which the proof masses resonate in the presence of such an acceleration. The proof masses may be arranged to produce differential signals.
    Type: Application
    Filed: August 10, 2017
    Publication date: February 14, 2019
    Applicant: Analog Devices, Inc.
    Inventor: Mehrnaz Motiee
  • Publication number: 20190049481
    Abstract: An electromechanical system (MEMS) accelerometer is described. The MEMS accelerometer may be configured to sense linear acceleration along one, two or three axes, and to sense angular acceleration about one, two or three axes. As such, the MEMS accelerometer may serve as 2-axis, 3-axis, 4-axis, 5-axis or 6-axis inertial accelerometer. In some embodiments, the MEMS accelerometer may comprise a single mass connected to at least one anchor via a plurality of tethers. In other embodiments, the MEMS accelerometer may comprise a proof mass connected to at least one anchor via a plurality of tethers and one or more shuttle masses connected to the proof mass via a second plurality of tethers. Rotational and linear motion of the MEMS accelerometer may be sensed using capacitive sensors.
    Type: Application
    Filed: August 9, 2017
    Publication date: February 14, 2019
    Applicant: Analog Devices, Inc.
    Inventor: Xin Zhang
  • Patent number: 10203351
    Abstract: In some exemplary embodiments, a MEMS accelerometer includes a device wafer having a proof mass and a plurality of tracking anchor points attached to a substrate. Each tracking anchor is configured to deflect in response to asymmetrical deformation in the substrate, and transfer mechanical forces generated in response to the deflection to tilt the proof mass in a direction of the deformation.
    Type: Grant
    Filed: October 3, 2014
    Date of Patent: February 12, 2019
    Assignee: Analog Devices, Inc.
    Inventor: Xin Zhang
  • Patent number: 10203352
    Abstract: A microelectromechanical systems (MEMS) accelerometer is described. The MEMS accelerometer may comprise a proof mass configured to sense accelerations in a direction parallel the plane of the proof mass, and a plurality of compensation structures. The proof mass may be connected to one or more anchors through springs. The compensation structures may be coupled to the substrate of the MEMS accelerometer through a rigid connection to respective anchors. A compensation structure may comprise at least one compensation electrode forming one or more lateral compensation capacitors. The compensation capacitor(s) may be configured to sense displacement of the anchor to which the compensation structures is connected.
    Type: Grant
    Filed: August 4, 2016
    Date of Patent: February 12, 2019
    Assignee: Analog Devices, Inc.
    Inventors: Xin Zhang, William A. Clark, Michael Judy
  • Patent number: 10205462
    Abstract: A successive approximation register analog-to-digital converter (SAR ADC) typically includes circuitry for implementing bit trials that converts an analog input to a digital output bit by bit. The circuitry for bit trials are usually weighted (e.g., binary weighted), and these bit weights are not always ideal. Calibration algorithms can calibrate or correct for non-ideal bit weights and usually prefer these bit weights to be signal independent so that the bit weights can be measured and calibrated/corrected easily. Embodiments disclosed herein relate to a unique circuit design of an SAR ADC, where each bit capacitor or pair of bit capacitors (in a differential design) has a corresponding dedicated on-chip reference capacitor. The speed of the resulting ADC is fast due to the on-chip reference capacitors (offering fast reference settling times), while errors associated with non-ideal bit weights of the SAR ADC are signal independent (can be easily measured and corrected/calibrated).
    Type: Grant
    Filed: November 23, 2015
    Date of Patent: February 12, 2019
    Assignee: ANALOG DEVICES, INC.
    Inventors: Junhua Shen, Mark D. Maddox, Ronald Alan Kapusta
  • Patent number: 10199369
    Abstract: Apparatus and methods for transient overstress protection with false condition shutdown are provided herein. In certain configurations, a high-voltage tolerant actively-controlled protection circuit includes a transient overstress detection circuit, a clamp circuit electrically connected between a first node and a second node, a bias circuit that biases the clamp circuit, and a false condition shutdown circuit. The transient overstress detection circuit generates a detection signal indicating whether or not a transient overstress event is detected between the first and second nodes. Additionally, the false condition shutdown circuit generates a false condition shutdown signal based on low pass filtering a voltage difference between the first and second nodes, thereby determining independently whether or not power is present. The bias circuit controls operation of the clamp circuit in an on state or an off state based on the detection signal and the false condition shutdown signal.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: February 5, 2019
    Assignee: Analog Devices, Inc.
    Inventors: Srivatsan Parthasarathy, Javier Alejandro Salcedo