Abstract: A temperature limit circuit has a pair of comparators for producing an output signal when a sensed temperature either exceeds of falls below a permissible range. A common impedance circuit uses a single output pin to establish both the upper and lower temperature limits and a hysteresis level at each end of the range. A hysteresis circuit includes two branches, one of which directs a hysteresis current in one direction to a hysteresis resistor at a common input to the comparators to set the hysteresis at one end of the temperature range, and the other of which directs the hysteresis current through the hysteresis resistor in the opposite direction to set the hysteresis at the other end of the temperature range; the oppositely directed current flows establish hysteresis differentials of opposite polarities. A voltage reference circuit that includes a feedback circuit is preferably used for both temperature sensing and to establish a reference current upon which the hysteresis current is based.

Abstract: Apparatus and method are provided for saving and (upon demand) restoring a control signal for a signal-controlled system. A control signal generated by or within that system is provided to a multiplexer, which normally produces that control signal. That control signal is digitized and stored by a storage device as follows. The output of the storage device is provided both to the multiplexer and to a comparator. The comparator also receives the output of the multiplexer, and compares the output of the storage device and the multiplexer. The comparator provides a signal to the storage device to increment or decrement the storage device based on whether the signal produced by the storage device is less than, or greater than or equal to, the control signal produced by the multiplexer. The multiplexer output is also provided to the signal-controlled system to provide the control signal thereto.

Abstract: A pulse shaping system for a pulse width modulation system includes: a ramp generator for generating a ramp signal having a ramp portion and a rest portion; a latch signal generator providing a latch signal coincident with the ramp portion; an indicator circuit for indicating desired pulse width; a pulse edge modulator responsive to the ramp portion and to the indicator circuit for providing a pulse width modulated pulse having at least one of its edges modulated; and including one or both of a fill circuit and a blanking circuit. In response to an indication from the indicator circuit of a desired maximum pulse width, the fill circuit causes the latch signal and the pulse generated by the pulse edge modulator to be combined for producing a maximum width pulse at the full width of the latch signal and the ramp portion.

Abstract: A dual edge pulse width modulation system includes a ramp generator for generating a voltage ramp; an n bit digital to analog converter having a normal and an inverted output for establishing a leading edge and a trailing edge reference; a comparator responsive to the ramp and the leading edge and trailing edge references, respectively, for defining the leading edge and the trailing edge of a pulse; and a pulse generator for producing a pulse having the width determined by the defined leading and trailing edges.

Abstract: The temperature at a semiconductor device having a generally non-linear, temperature dependent relationship between a pair of device parameters is determined by applying a plurality of sequential excitations to the device at different excitation levels, sensing the levels of the device parameters that correspond to the sequential excitations, and determining the device temperature from the sequential device parameter levels. The device may include a p-n junction, and is preferably a bipolar transistor whose collector current and base-emitter voltage serve as the parameters from which the temperature is obtained. Using three sequential excitations, an accurate temperature reading can be obtained that substantially cancels the effects of the transistor's parasitic base and emitter resistances. p-n junction diodes and Schottky diodes may also serve as the device, in which case the current through and voltage across the diode are used to determine temperature.

Abstract: In a pixel based color display system, a pixel responsive control is provided for high speed loading of new colors in the random access memory of the system used as a look-up table. In the system, pixel words representing addresses in a random access memory in which colors to be displayed are stored are applied in sequence to the random access memory to cause the colors to be read out in sequence to generate red, green and blue video signals representing the colors read out from the random access memory. The pixel responsive control responds to a predetermined pixel word in the stream of pixel words applied to the address port of the random access memory to cause a new color to be stored in a selected storage location of the random access memory. The new color and the address in which the new color is to be stored is specified in the pixel words immediately following the predetermined pixel word.

Abstract: An anti-false triggering system for a pulse width modulation system includes a ramp generator for generating a ramp signal having a ramp portion and a rest portion; a latch enable signal generator for providing a latch enable signal only during the ramp portion of the ramp signal; and a pulse edge modulator responsive to the ramp portion of the ramp signal for providing a pulse with at least one of its edges modulated, the pulse edge modulator being enabled by the latch enable signal only during the ramp portion of the ramp signal for suppressing false triggering of the pulse edge modulator during the rest portion of the ramp signal.

Abstract: A technique and circuit for switching a bipolar output stage between an active mode in which the stage operates as a voltage source and an inhibit mode in which the stage is deactivated and the output node presents a floating high-impedance. The output stage may be in a digital device such as a digital pin driver circuit, or in an analog amplifier. Considering first the digital application, in the active mode, a digital output is switched between logic high and logic low voltages established by external references. The logic high and logic low reference voltages, and the corresponding output voltages, may be set to zero, a positive voltage or a negative voltage independently of each other; a logic "one" can thus be set to a voltage below a logic "zero". When the output stage is an analog amplifier, in active mode it amplifies its input signal.

Abstract: An integrated-circuit A-to-D converter having repetitive cells which are designed to be matched, but which are subject to uncontrolled mismatches adversely affecting performance. In the disclosed embodiment, the cells all include resistors (of equal ohmic value) carrying currents (designed to be of equal value) producing corresponding output signals. To avoid the effects of cell mismatch on the output signals, a network of equal-valued resistors is added to the circuit, with each network resistor connected between corresponding ends of adjacent pairs of the cell resistors.

Abstract: A precision rectifier system with differential input and differential output includes an input differential V/I converter responsive to a bipolar input signal voltage with respect to an input reference potential for providing a differential current representative of the magnitude of the input signal; a matching output differential V/I converter responsive to an output voltage signal with respect to an output reference potential for providing a differential current representative of the magnitude of the output voltage signal; amplifier means, responsive to a difference between the differential currents of the input and output V/I converters for adjusting the output voltage signal to null the differences between the differential currents; and switching means, responsive to the polarity of the bipolar input signal, for switching the polarity of the differential current representative of the magnitude of the input signal for maintaining a single polarity rectified output voltage signal.

Abstract: A distortion cancellation amplifier system operational amplifier system includes a current mirror circuit having an input, an output and a common terminal; a device for providing a pair of differential current signals to the input and output terminals of the current mirror circuit; a control device, responsive to said output terminal of the current mirror circuit, for controlling the voltage at the common terminal to drive the voltage at the input terminal of said current mirror circuit to track the voltage on the output terminal of the current mirror circuit; an output amplifier stage having a predetermined gain and having an input and an output terminal with its input terminal connected to the output terminal of the current mirror circuit; a gain control device having a predetermined impedance connected with the input terminal of the output amplifier; and a distortion suppression device connected between the output terminal of the output amplifier and the input terminal of the current mirror circuit and hav

Abstract: A delta sigma modulator provides dual phase sampling of analog input and/or a reference voltage. This dual phase sampling may be realized using a switched capacitor circuit having dual legs with a capacitor on each such leg. The dual phase sampling of the reference voltage poses a complication that mandates the necessity of providing a compensation signal. The delta sigma modulator is provided with appropriate circuitry to provide a compensation signal that compensates for the reduced signal level due to the dual sampling. In particular, the delta sigma modulator compensates for the reduced level of the output from an integrating amplifier circuit due to the timing necessary to implement the dual sampling approach.

Abstract: A transconductance generator including a cross-coupled quad circuit having first and second pairs of complementary transistors, wherein one of the first pair is in series with a complementary one of the second pair, and the other two transistors also are in series. Two input terminals are provided, one for each pair of cross-quad transistors. Two current mirrors are provided, one being coupled to a set of two NPN cross-quad transistors, and the other coupled to the two PNP cross-quad transistors. The cross-quad circuit and the current mirrors provide an output signal through a pair of output transistors. By connecting the output signal to the second input terminal, negative feedback is developed to provide a unity-gain buffer. A number of special compensating circuits are provided to assure minimum distortion effects in the output signal.

Abstract: The output stage for a feedback amplifier has a diode circuit to provide quiescent current to the output transistors, and a diode turnoff circuit that renders the diodes non-conductive for an input signal that sends the stage output voltage low. A swing transistor between the stage's output terminal and a low voltage bus is actuated by the same input signal to drive the output voltage to the level of the low voltage bus. Both the diode turnoff circuit and the swing transistor are preferably MOSFETs.

Abstract: In a pixel based color display system, aliasing is minimized by controlling the colors in pixels, bridging boundaries of objects of the image to be blends of the colors on each side of the boundary. Blends are controlled in accordance with pixel words containing mix values. Provision is made for drawing lines one pixel line with aliasing minimized in the boundaries of the lines wherein the same mix value controls the blend in adjacent pixels bridging the leading and trailing edge of a diagonal line.

Abstract: A delta signma modulator is programmable to realize a number of different gain settings. A user of the delta sigma modulator (which may be a human or an electronic system) may select a setting among a plurality of available settings. Programmability of gain is realized by selectively controlling the rate of sampling of an analog input relative to the rate of sampling of a reference voltage and/or by controlling interspersing of samples of fixed voltage with the analog input or reference voltage. To effect a positive gain, the rate of sampling of the analog input is selected to the bar larged than that of the rate of sampling of the known reference voltage. Alternatively, or additionally, fixed voltage charge samples are interspersed with the reference. In contrast, to effect a negative gain, the rate of sampling of the analog input is set to be less than the rate of sampling of the reference voltage and/or samples of fixed voltage are interspersed with the analog input.

Abstract: A sense enable timing circuit for addressing data locations in a static random access memory (RAM) array provides a plurality of memory cells formed into a dummy row and a dummy column that is connected to a memory cell at a far end opposite an X-decoder input of said dummy row. The dummy row and column are constructed in conjunction on the same semiconductor chip with a RAM array comprising a plurality of memory cells formed into rows and columns. The dummy column connects to a dummy word line of the dummy row and includes dummy bit lines. Each of the dummy word and bit lines are separate from the word lines and bit lines of the array. The dummy word line is addressed at a time synchronized with the addressing of the array word lines. The occurrence of a predetermined voltage change on at least one of the dummy bit lines, carrying a signal of at least one memory cell of the dummy column, is determined in response to the addressing of the dummy word line.

Abstract: Voltage-to-Current (V-I) converters of the differential input and differential output type designed to be fabricated as an integrated circuit on a single monolithic chip. The circuit includes a first pair of resistors connected between first and second input terminals with their common node connected to the bases of a pair of NPN output transistors supplying differential output currents from their collectors. The emitters of these transistors are connected through corresponding resistors to the input terminals respectively. A capacitor is connected between the common bases and reference (ground) to establish an appropriate time constant for achieving high complementarily of the output currents. Variations on this basic circuit are disclosed for substantially eliminating input bias current and for reducing both odd and even-order distortion in the output signal.

Abstract: A magnetometer having only a single coil winding for sensing the magnetic field along a single axis. Functionally, the invention comprises an oscillator, an integrator, and a voltage-controlled current source. The oscillator uses a saturating inductor which also serves as the magnetic-field-sensing element. The inductor is driven with a positive voltage and when the current through the inductor exceeds a value which indicates that the core is saturated, the driving voltage switches to an equal-magnitude negative value. This negative drive is maintained until the current again indicates the core to be saturated, at which point the driving voltages switches back to the positive value. With no externally applied field, the inductor current averages to a zero value. An externally applied field helps the core saturate in one direction and hinders it in the other, resulting in a change in average inductor current.

Abstract: In an FET differential input, preferably using a quad set of devices according to the teaching of U.S. Pat. No. 3,729,660, the channel of each transistor is formed in a piecewise manner, of multiple segments. Each channel segment is associated with a corresponding drain segment (i.e., these are multi-drain devices). Each drain segment is connected in series with a thin-film resistor. The channel area associated with each drain segment can be selectively removed from the circuit by cutting the connected resistor with a laser. The device's channel area (and its effective width to length ratio, Z/L) is thereby alterable. The thin film resistors are cut as the offset is measured, until an acceptably low (effectively zero) offset is obtained. This trimming operation can be performed at room temperature, and yields not only a near zero offset voltage, but also near zero drift. CMRR, further, will be maximized. Neither operating current ratio nor drain voltage need be, or is, changed.