Abstract: A sensor assembly for sensing an analyte in a sample matrix comprises an electrode assembly comprising a set of at least one test electrode and may also comprise one or more control electrodes and/or an applicator assembly. The electrode assembly is configured or configurable to define one or more active test electrodes of the set of one or more test electrodes, and at least one of the electrode assembly and the applicator assembly is or are configured or configurable to adjust a quantity of the analyte provided to the active electrode(s), per unit time, for said interaction based at least in part on an analyte characteristic. Alternatively or additionally, the electrode assembly is configured and arranged in a flow path such that the amounts of sample matrix provided to the test electrode(s) and control electrode(s) of the electrode assembly are substantially equal.

Abstract: Micro-isolators exhibiting enhanced isolation breakdown voltage are described. The micro-isolators may include an electrically floating ring surrounding one of the isolator elements of the micro-isolator. The isolator elements may be capacitor plates or coils. The electrically floating ring surrounding one of the isolator elements may reduce the electric field at the outer edge of the isolator element, thereby enhancing the isolation breakdown voltage.

Abstract: The present disclosure relates to a light source system suitable for use in a time of flight camera. The light source system includes a light source, such as a laser, and a driver arranged to supply a drive current to the light source to turn the light source on to emit light. The driver includes a capacitor to store energy and then discharge to generate the drive current, and the driver is integrated into a semiconductor die on which the light source is mounted. Consequently, the driver includes within it the source of energy for the drive current and the light source and driver are very close together, meaning that the light source may be turned on and off very quickly with a relatively large drive current, in order to output a high optical power, short duration light pulse.

Abstract: Techniques for determining a state of health of an energy storage device that utilize a capacitor gain amplifier to provide an AC gain and block the DC voltage. An input capacitor can couple between an input excitation signal generator circuit and the amplifier's inverting input terminal, and a feedback capacitor can couple between the amplifier's inverting input terminal and the amplifier's output. A switch can be used to reset the feedback capacitor periodically to prevent the amplifier's output from becoming saturated from a leakage current at the inverting input terminal of the amplifier.

Abstract: Front-end circuitry is difficult to design for high sample rate, wide bandwidth receivers with high performance requirements on noise and linearity. One exemplary front-end circuitry is integrated on-chip with the RF ADC in a receiver, and the circuitry implements ESD protection, attenuation, and gain. The circuitry includes a multi-tap filter with LC circuits, and the filter implements a highly linear filter. Advantageously, the capacitors in the LC circuits are also used for ESD protection. Additionally, tunable attenuator cells are implemented across the multi-tap filter to provide a wide range of variable attenuation. The circuitry can further include a fixed or variable gain stage at the output. The resulting circuitry offers variable gain and attenuation while meeting bandwidth, noise, and linearity requirements.

Abstract: The present disclosure relates to a light source system suitable for use in a time of flight camera. The light source system includes a light source, such as a laser, and a driver arranged to supply a drive current to the light source to turn the light source on to emit light. The driver includes two transistors coupled to the light source in series, such that when both transistors are turned on, a drive circuit is completed, current flows and the light source turns on. A very short pulse of light emission may be achieved efficiently by switching one of the transistors to the on-state to complete the drive circuit and a short time later turning off the other transistor in order to break the drive circuit. In this way, a pulse of light in the order of less than 1 nanosecond or less than 500 picoseconds may be achieved.

Abstract: Axial magnetic flux sensors are described. The axial magnetic flux sensors comprise multiple substrates with conductive traces on them in some embodiments, and in other embodiments a single substrate or no substrate. When multiple substrates are provided, the substrates couple together such that the conductive traces connect to form a coil. The coil may be a continuous, multi-loop coil. When the substrates are coupled together, they may define an opening to accommodate a shaft or other piece of equipment.

Abstract: A space efficient planar transformer can include a coupled inductor circuit that can include a metallic core, a first planar winding comprising a conductive coil having an electrical path encircling a first post of the metallic core, and a second planar winding configured to magnetically couple with the first winding via the metallic core. The second planar winding can have multiple portions. A portion of the second winding can include a first sub-portion comprising a single U-shaped planar conductive trace wrapped about the first post and a second sub-portion comprising a single U-shaped planar conductive trace wrapped about the first post. A layout of the first sub-portion can be oriented opposite a layout of the second sub-portion.

Abstract: Systems and methods are provided for determining a position of a magnet. The systems and methods utilize a first sensor located at a first sensor position and arranged to measure at least two components of a magnetic field produced by the magnet, a second sensor located at a second sensor position and arranged to measure at least two components of the magnetic field produced by the magnet, and processing circuitry operatively connected to the first and second sensors to receive signals derived from signals outputted by the first and second sensors. A field angle is calculated from a first differential field of a first field dimension and a second differential field of a second field dimension orthogonal to the first field dimension. The first and second differential fields are calculated based on signals outputted by the first and second sensors.

Abstract: A multi-stage transimpedance amplifier (TIA) with an adjustable input linear range is disclosed. The TIA includes a first stage, configured to convert a single-ended current signal from an optical sensor of a receiver signal chain to a single-ended voltage signal, and a second stage, configured to convert the single-ended voltage signal provided by the first stage to a differential signal. In such a TIA, the input linear range may be adjusted using a clamp that is programmable with an output offset current to keep the second stage of the TIA from overloading and to maintain a linear transfer function without compression.

Abstract: Automatic ambient light cancellation for an optical front end. The present disclosure includes a coarse loop and fine loop in a feedback circuit configured to cancel out currents generated by detection of ambient light. An optical front end comprises a single-ended photo-diode connected to a transimpedance amplifier (TIA) followed by a buffer stage to generate differential output. A feedback loop controls a current digital to analog converter (iDAC) which is used to cancel out undesired current (e.g., from ambient light). This results in the TIA from saturating and maintain good signal quality with greater sensitivity.

Abstract: A current source and/or current sink digital-to-analog converter (DAC) includes a DAC circuit that converts a digital code to an analog current or voltage signal, an optional transconductance circuit that converts a voltage output of the DAC circuit into a current signal, and an output circuit that amplifies a current output of the DAC circuit or optionally amplifies a current output of the transconductance circuit to set a desired high current output for application to an output of the current source and/or current sink DAC. A power supply control current may be coupled to a power supply circuit that supplies power to the output circuit of the current source and/or current sink DAC. The power supply control current adjusts the output of the power supply circuit to cause the current source and/or current sink DAC to operate at a higher power efficiency.

Abstract: A bipolar junction transistor is provided with an emitter structure that is positioned above the upper surface of the base region. The thickness of the emitter and the interfacial oxide thickness between the emitter and the base is configured to optimize a gain for a given type of transistor. A method of fabricating PNP and NPN transistors on the same substrate using a complementary bipolar fabrication process is provided. The method enables the emitter structure for the NPN transistor to be defined separately to that of the PNP transistor. This is achieved by epitaxially growing the emitter layer for the PNP transistor and growing the emitter layer for the NPN transistor in a thermal furnace.

Abstract: Digital to analog converter generates an analog output corresponding to a digital input by controlling DAC cells using bits of the digital input. The DAC cells individually make a contribution to the analog output. Due to process, voltage, and temperature variations, the DAC cells may have duty cycle error or mismatches. To compensate for the duty cycle error of a DAC cell, a small amount of charge is injected into a low-impedance node of a DAC cell when the data signal driving the DAC cell transitions, or changes state. The small amount of charge is generated using a capacitive T-network, and the polarity of the charge injected is opposite of the error charge caused by duty cycle error. The opposite amount of charge thus compensates or cancels out the duty cycle error, and duty cycle error present at the output of the DAC cell is reduced.

Abstract: Systems and methods that enable LED drivers to generate drive signals by implementing a modulation technique referred to herein as “stochastic frequency pulse modulation” (SFPM) are disclosed. The SFPM is based on randomly increasing or decreasing, during every cycle of a drive signal, the amount of time the drive signal is high or low, tracking the deviation of the total amount of time (i.e., for multiple cycles) that the drive signal is high or low from what it should be to provide to a LED a target average power dictated by a target dimming level, and using the tracking to set limits of ranges from which the durations of the time periods when the drive signal is high or low may be randomly selected.

Abstract: Calibration of continuous-time (CT) residue generation systems can account and compensate for mismatches in magnitude and phase that may be caused by fabrication processes, temperature, and voltage variations. In particular, calibration may be performed by providing one or more known test signals as an input to a CT residue generation system, analyzing the output of the system corresponding to the known input, and then adjusting one or more parameters of a forward and/or a feedforward path of the system so that the difference in transfer functions of these paths may be reduced/minimized. Calibrating CT residue generation systems using test signals may help decrease the magnitude of the residue signals generated by such systems, and, consequently, advantageously increase an error correction range of such systems or of further stages that may use the residue signals as input.

Abstract: Some embodiments herein describe a radio frequency communication system that can include a transmitter to output an radio frequency (RF) transmit signal, the transmitter including a digital pre-distortion system (DPD) that pre-distorts the RF transmit signal. The DPD system can include a configurable non-linear filter, such as a Laguerre filter, having multiple rows where at least one row operates with a configurable decimation ratio. The DPD system can further include decimators and a crossbar switch coupled between the decimators.

Abstract: Systems, devices, and methods related to interpolation are provided. An example apparatus includes a slope calculator to calculate a slope value based on a first value and a second value associated with a function. The apparatus further includes a compander to compand the slope value to provide a companded slope value having a smaller bit-width than the calculated slope value. The apparatus further includes a multiplier to multiply the companded slope value by a third value to provide a correction value. The apparatus further includes an adder to add the correction value to the first value or the second value to provide an interpolated value associated with the function. Companding the slope value can reduce a bit-width of the multiplier, and thus may reduce power consumption and/or area.

Abstract: Mechanisms for evaluating amplitude for current pulses provided to a transimpedance amplifier (TIA) for current levels beyond the linear range of the TIA where clipping circuit(s) may limit the input voltage of the TIA are disclosed. In one aspect, an example TIA arrangement includes a clipping arrangement that includes multiple clipping circuits. Each clipping circuit can be biased by different bias voltages such that the different clipping circuits are activated at different input current amplitudes. Different clipping circuits can have different impedances, which can result in different recovery time characteristics. With the multiple clipping circuits in clipping arrangements discussed herein, a saturated dynamic range of a TIA can be divided into sub-regions and different pulse widening characteristics for each region may be defined, which may enable determination of amplitude for current pulses provided to the TIA even for current levels beyond the linear range of the TIA.

Abstract: Disclosed are embodiments that provide digital data communication between a single-pair Ethernet and a multi-pair Ethernet. Some embodiments include a single-pair Ethernet interface that is configured to operate in at least two modes. In a first mode, the single-pair Ethernet interface operates in a conventional manner. In a second mode, alternate pin configurations are employed to provide a low-cost interoperability between a single-pair Ethernet interface and a multi-pair Ethernet interface. For example, in the second mode, the single-pair Ethernet receives, via a first receive data pin, from a first transmit data pin of the multi-pair Ethernet interface, a data signal, and receives, via a second receive data pin, from a second transmit data pin of the multi-pair Ethernet interface, a second data signal.