Patents Assigned to Analog Devices
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Publication number: 20230207710Abstract: Techniques, methods, and systems are provided for packaging high-voltage packages. On example system package includes circuitries comprising circuit elements; and a plurality of connection pins including low-voltage pins; input/output (IO) pins arranged in regions proximate edges of the system package; and high-voltage pins arranged in an inner region of the system package away from all edges of the system package.Type: ApplicationFiled: December 13, 2022Publication date: June 29, 2023Applicant: Analog Devices, Inc.Inventors: Noe QUINTERO, Brian Hamilton
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Patent number: 11686763Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.Type: GrantFiled: February 28, 2022Date of Patent: June 27, 2023Assignee: Analog Devices International Unlimited CompanyInventors: Edward John Coyne, Alan J. O'Donnell, Shaun Bradley, David Aherne, David Boland, Thomas G. O'Dwyer, Colm Patrick Heffernan, Kevin B. Manning, Mark Forde, David J. Clarke, Michael A. Looby
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Patent number: 11686699Abstract: The battery monitoring techniques described herein may be used for detection of battery anomalies or faults. Also, the battery monitoring techniques described herein may be used to generate estimates of total battery capacity. The battery monitoring techniques may employ an alternating current frequency response (ACFR) of the battery. The ACFR response of the battery may be used to detect anomalies and/or estimate a total capacity of the battery.Type: GrantFiled: July 29, 2021Date of Patent: June 27, 2023Assignee: Analog Devices, Inc.Inventors: Hemtej Gullapalli, Omer Tanovic, Johannes Traa, Erfan Soltanmohammadi
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Patent number: 11688709Abstract: An integrated device package is disclosed. The package can include a package substrate and an integrated device die having active electronic circuitry. The integrated device die can have a first side and a second side opposite the first side. The first side can have bond pads electrically connected to the package substrate by way of bonding wires. A redistribution layer (RDL) stack can be disposed on a the first side of the integrated device die. The RDL stack can comprise an insulating layer and a conductive redistribution layer. The package can include a passive electronic device assembly mounted and electrically connected to the RDL stack.Type: GrantFiled: December 5, 2019Date of Patent: June 27, 2023Assignee: Analog Devices, Inc.Inventors: Vikram Venkatadri, Santosh Anil Kudtarkar
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Patent number: 11689166Abstract: A combination amplifier can include a “main amplifier circuit” for signal amplification, and a matching “compensation amplifier circuit” to monitor distortion in the main amplifier output signal. The compensation amplifier circuit provides a compensation signal to the main amplifier circuit to compensate for and servo out distortion therein. The compensation amplifier circuit includes a passive input network and an amplifier. The passive input network can connect to both the input and output nodes of the main amplifier circuit such that the input and output signals cancel within the passive input network, leaving only the low level distortion component introduced in the main amplifier. Thus, the compensation amplifier is then only operating on the low-level distortion introduced in the main amplifier to generate the compensation signal. Because the compensation amplifier is then only operating on the very low distortion signal, any distortion it introduces into the compensation signal is negligible.Type: GrantFiled: February 4, 2021Date of Patent: June 27, 2023Assignee: Analog Devices International Unlimited CompanyInventor: Christopher Peter Hurrell
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Patent number: 11686581Abstract: A MEMS device is provided comprising a substrate; a proof mass coupled to the substrate and configured to move along a resonator axis; a drive structure comprising at least one electrode and configured to drive the proof mass to move along the resonator axis; and a pivoting linkage coupled to the proof mass at first and second ends of the pivoting linkage, the first end comprising a first fixed pivot and the second end comprising a second fixed pivot, the pivoting linkage comprising: a first bar configured to pivot about the first fixed pivot and a first dynamic pivot; a second bar configured to pivot about the second fixed pivot and a second dynamic pivot; and a third bar configured to pivot about the first dynamic pivot and the second dynamic pivot, wherein the proof mass moves along the resonator axis when the pivoting linkage pivots.Type: GrantFiled: June 7, 2021Date of Patent: June 27, 2023Assignee: Analog Devices, Inc.Inventors: Igor P. Prikhodko, Gaurav Vohra
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Patent number: 11687111Abstract: A reference signal generator circuit can be configured to provide a temperature-compensated voltage reference signal at an output node. The reference signal generator can include a diode-connected first FET device coupled between a supply node and the output node, and a flipped-gate transistor coupled between the output node and a reference node. The reference signal generator can include a bias current source configured to provide a bias current to the output node to adjust a current density in the flipped-gate transistor relative to a current density in the first transistor.Type: GrantFiled: August 18, 2020Date of Patent: June 27, 2023Assignee: Analog Devices International Unlimited CompanyInventors: Chiong Yew Lai, Lei Liu
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Patent number: 11689097Abstract: A UHV-LV interface circuit that is capable of the following, among other things: 1) starting up a primary controller of a power converter circuit with a precisely controlled startup charging profile; 2) performing pulse-based line-voltage sensing with reduced power and improved sensing accuracy; and 3) discharging a capacitor, e.g., class-X2 capacitor, with a stable supply voltage for the controller. The UHV-LV interface circuit can use a single UHV device, such as a single depletion-mode transistor, e.g., field-effect transistor (FET).Type: GrantFiled: May 5, 2021Date of Patent: June 27, 2023Assignee: Analog Devices, Inc.Inventors: Wen Chuen Liu, Xugang Ke, Min Chen, Wei Gu
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Patent number: 11686747Abstract: The disclosure relates to accurately determining a DC energy signal, such as a DC current or DC voltage, which may be particularly useful when controlling a formation/testing current of a battery cell during formation and/or testing. In the battery formation/testing context, a current sensor is used to measure the current of the battery cell, which is used as a feedback signal for controlling the current to achieve a target current. The transfer function of the current sensor is used to improve the accuracy of the current measurement. Because the transfer function can be regularly determined during formation/testing, a lower-cost current sensor with relatively poor temperature coefficient may be used. Any change in the gain of the current sensor may be detected by the transfer function determination and corrected for. Therefore, high current control accuracy may be achieved at lower cost.Type: GrantFiled: September 23, 2021Date of Patent: June 27, 2023Assignee: Analog Devices International Unlimited CompanyInventors: Shaoli Ye, Gina M Kelso, David J. Lath, William Michael James Holland, John Jude O'Donnell
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Patent number: 11689344Abstract: Radio Frequency (RF) systems configured to implement full-duplex wireless data transfer for rotary joints are disclosed. An example RF system includes a 60 GHz short distance communication link implemented using elliptically (e.g., circularly) polarized antennas. Such a system may provide a mm-wave, high-speed, wideband wireless communication link in a manner that is associated with simpler design and operation, mechanical integrity, and reduced power consumption, compared to alternative solutions.Type: GrantFiled: April 9, 2021Date of Patent: June 27, 2023Assignee: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANYInventors: Mohamed Alaaeldin Moharram Hassan, Po-Hao David A. Yeh, Mark A. D'Amato, Anton Patyuchenko, John N. Poelker, Christopher P. O'Neill, Omar El Sayed Wadah
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Patent number: 11686773Abstract: A test system can receive a test signal from a device under test (DUI) via a first signal path. A comparator circuit can receive the test signal and, in response, generate an intermediate output signal based on a magnitude relationship between the test signal a comparator reference signal. A compensation circuit can generate a correction signal that is complementary to a portion of the received test signal, such as to correct for loading effects of the first signal path. The test system can include an output circuit configured to provide a corrected differential output signal that is based on a combination of the intermediate output signal and the correction signal.Type: GrantFiled: January 25, 2022Date of Patent: June 27, 2023Assignee: Analog Devices, Inc.Inventors: Christopher C. McQuilkin, Andrew Nathan Mort
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Publication number: 20230198506Abstract: Systems, devices, and methods related to a sample rate converter (SRC) for implementing a rate conversion R are provided. The SRC receives input samples at an input rate Fin and outputs samples at an output rate Fout=Fin×R, where R is a fractional value greater than 1. The SRC includes a plurality of filters to process the received input samples and a multiplier-adder block to generate the output samples based on respective delta values and outputs of the plurality of filters. The SRC further includes a plurality of buffers to buffer samples between the plurality of filters and the multiplier-adder block based at least in part on N buffer read pointers, where N is an integer greater than 1. The SRC further includes resampler control circuitry to generate N delta values of the delta values and the N buffer read pointers in parallel based on R.Type: ApplicationFiled: August 9, 2022Publication date: June 22, 2023Applicant: Analog Devices International Unlimited CompanyInventors: Devendra PONNAPUREDDY, Carroll C. SPEIR
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Publication number: 20230194237Abstract: Example magnetic sensor system includes a magnet mounted on a rotatable shaft, and a magnetic sensing device in a vicinity of the magnet. The magnetic sensing device includes an angle sensor configured to detect an orientation of a magnetic field generated by the magnet as the rotatable shaft is rotated, a magnetic multi-turn sensor configured to detect a number of turns of the magnetic field generated by the magnet as the rotatable shaft is rotated, a magnetic disk mounted on the rotatable shaft, wherein the disk comprises at least a first track for inducing a change in a magnetic field generated by the magnetic disk, wherein the first track is formed from a plurality of curved segments distributed around the circumference of the magnetic disk, and a first incremental sensor configured to detect changes in the magnetic field induced by the first track as the rotatable shaft is rotated.Type: ApplicationFiled: December 19, 2022Publication date: June 22, 2023Applicant: Analog Devices International Unlimited CompanyInventors: Jochen SCHMITT, Enda NICHOLL, Christian NAU
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Publication number: 20230198541Abstract: High speed, high dynamic range SAR ADC method and architecture. The SAR DAC comparison method can make fewer comparisons with less charge/fewer capacitors. The architecture makes use of a modified top plate switching (TPS) DAC technique and therefore achieves very high-speed operation. The present disclosure proffers a unique SAR ADC method of input and reference capacitor DAC switching. This benefits in higher dynamic range, no external decoupling capacitory requirement, wide common mode range and overall faster operation due to the absence of mini-ADC.Type: ApplicationFiled: December 22, 2021Publication date: June 22, 2023Applicant: Analog Devices International Unlimited CompanyInventor: Mahesh Madhavan KUMBARANTHODIYIL
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Patent number: 11681199Abstract: An optical system for receiving light scanned from different light origination locations in space can include a Liquid Crystal (LC) waveguide (LCW), including first and second LCW light ports. A beamsteering LC electrode can be included in or coupled to the LCW and can be configured to vary a receiving direction of light received at the second LCW light port in response to a varying electrical input signal applied to the LC electrode to scan receiving of light at the second LCW light port from different light origination locations in space. A photodetector can be optically coupled to the first LCW light port, such as to detect waveguided light from different light origination locations in space received in response to the varying electrical input signal applied to the first LC electrode. Ranger, bright-spot locking, laser detection, direct detect and coherent lidar, wavelength detection, and other techniques and use cases are possible.Type: GrantFiled: August 16, 2019Date of Patent: June 20, 2023Assignee: Analog Devices, Inc.Inventors: Michael Ziemkiewicz, Scott Robert Davis, Michael Howard Anderson, Bennett Sodergren, Radhika Marathe
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Patent number: 11682972Abstract: Controller circuitry can employ a method to provide control signals to bridge switches operating an inductor for switched-mode inductive buck-boost voltage regulation. The buck mode can operate the bridge switches in a buck current control mode when the input voltage exceeds the output voltage. The boost mode can operate the bridge switches in a boost current control mode when the output voltage exceeds the input voltage. The buck-boost transition mode can operate the bridge switches in a peak buck-boost current control mode that minimizes a minimum duty cycle (having a minimum “on” duty time and a minimum “off” duty time) when the output voltage is approximately equal to the input voltage during a transition from at least one of the current control buck mode to the current control boost mode or from the current control boost mode to the current control buck mode.Type: GrantFiled: February 4, 2021Date of Patent: June 20, 2023Assignee: Analog Devices, Inc.Inventors: Min Kyu Song, Min Chen
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Patent number: 11683018Abstract: An amplifier circuit comprises a first amplifier circuit stage including input devices connected to inputs of the amplifier circuit, a second amplifier circuit stage coupled to the first amplifier stage, a common mode extraction circuit configured to extract a DC common mode voltage of the first amplifier stage, and a bias circuit configured to bias one or more output devices of the second amplifier circuit stage using the DC common mode voltage.Type: GrantFiled: September 17, 2021Date of Patent: June 20, 2023Assignee: Analog Devices International Unlimited CompanyInventors: Mayank Devam, Venkata Aruna Srikanth Nittala, Abhishek Bandyopadhyay
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Patent number: 11674797Abstract: Aspects of the embodiments are directed to non-contact systems, methods and devices for optical detection of objects in space at precise angles. This method involves the design and fabrication of photodiode arrays for measuring angular response using self-aligned Schottky platinum silicide (PtSi) PIN photodiodes (PN-diodes with an intrinsic layer sandwiched in between) that provide linear angular measurements from incident light in multiple dimensions. A self-aligned device is defined as one in which is not sensitive to photomask layer registrations. This design eliminates device offset between “left” and right” channels for normal incident light as compared to more conventional PIN diode constructions.Type: GrantFiled: March 22, 2020Date of Patent: June 13, 2023Assignee: Analog Devices, Inc.Inventors: Shrenik Deliwala, Paul W. Stevens, William Edward O'Mara
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Patent number: 11677392Abstract: Passive gate bias network topologies are implemented for stacked FET switch structures, which improve the settling time and low cut-off frequency for both DC and non-DC operation. DC capable stacked switch bias structures provide gate and bulk bias voltages, using input DC voltages, which are coupled to the gate terminals and the bulk terminals of the stacked switches. The DC coupling can be achieved using resistors, or a combination of resistors and diodes. An exemplary SPST switch includes a series stacked switch in combination with a shunt stacked switch, which can be controlled between alternating states. For low cut-off frequency improvement structures, an input signal is coupled to the gate terminals and bulk terminals of the switches in the stacked switches, using a DC block capacitor and resistors. The low cut-off of the bulk can be improved by connecting the bulk terminal of one switch to the opposite polarity switch.Type: GrantFiled: April 16, 2021Date of Patent: June 13, 2023Assignee: Analog Devices International Unlimited CompanyInventors: Ercan Kaymaksut, Mehmet Arda Akkaya, Murat Davulcu, Turusan Kolcuoglu
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Patent number: 11675011Abstract: This disclosure relates to monitoring the condition of electrical/electronic switches over time by monitoring the impedance of the switch. The condition of switches can degrade as they age, which can reduce their performance and may ultimately lead to failure. In many applications, particularly high-voltage applications, the reliable operation of switches may be very important and failures can present a safety risk and cause costly unscheduled system downtime for repairs. It has been realised that as the condition of switches change, their impedance changes, so monitoring the impedance can give a good indication of the condition of the switch, enabling potential faults/failures to be identified early and acted upon pre-emptively.Type: GrantFiled: August 15, 2019Date of Patent: June 13, 2023Assignee: Analog Devices International Unlimited CompanyInventors: Seyed Amir Ali Danesh, Jonathan Ephraim David Hurwitz, William Michael James Holland, Petre Minciunescu