Patents Assigned to Analog Devices
  • Patent number: 11639931
    Abstract: The present disclosure provides apparatuses and methods for analyzing the presence of a target analyte. The apparatuses and methods of the present disclosure can be operated in a multiplexed format to perform various assays of clinical significance.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: May 2, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Kee-Hyun Paik, Kaveh M. Milaninia, Kilian Dill
  • Patent number: 11640701
    Abstract: This disclosure describes techniques to detect an object. The techniques include operations comprising: receiving an image captured by overhead camera; identifying a region of interest (ROI) of a plurality of regions within the image; selecting an object classifier from a plurality of object classifiers based on a position of the identified ROI relative to the overhead camera; and applying the selected object classifier to the identified ROI; and detecting presence of the object within the ROI in response to applying the selected object classifier to the identified ROI.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: May 2, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: Raka Singh, Anil M Sripadarao
  • Patent number: 11637551
    Abstract: A multiple operating-mode comparator system can be useful for high bandwidth and low power automated testing. The system can include a gain stage configured to drive a high impedance input of a comparator output stage, wherein the gain stage includes a differential switching stage coupled to an adjustable impedance circuit, and an impedance magnitude characteristic of the adjustable impedance circuit corresponds to a bandwidth characteristic of the gain stage. The comparator output stage can include a buffer circuit coupled to a low impedance comparator output node. The buffer circuit can provide a reference voltage for a switched output signal at the output node in a higher speed mode, and the buffer circuit can provide the switched output signal at the output node in a lower power mode.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: April 25, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Christopher C. McQuilkin, Andrew Nathan Mort
  • Patent number: 11637482
    Abstract: The present disclosure provides a magnetic sensor system for monitoring the position of the rotor relative to the stator for use in electronic motor commutation. The system uses two magnetic sensors with a back bias magnet, the magnetic sensors being configured to detect changes in the magnetic field direction caused by the magnetic field interacting with two moveable targets that are being rotated by the motor shaft. The unique phase shift between the signals measured at each sensor can thus be used to determine the relative position between the stator and the rotor. In this respect, the system makes use of the Nonius or Vernier principle to measure rotational displacement, however, the scale of the encoder is defined by the number of motor pole pairs.
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: April 25, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: Jochen Schmitt, Enda Joseph Nicholl
  • Patent number: 11635496
    Abstract: In an optical detection system, features of interest can be identified from ADC circuitry data prior to inter-circuit communication with downstream object or target processing circuitry. In this manner, a volume of data being transferred to such downstream processing circuitry can be reduced as compared to other approaches, simplifying the receive signal processing chain and providing power savings. First-tier signal processing circuitry to identify features of interest can be located on or within a commonly-shared integrated circuit package with ADC circuitry, and downstream processing circuitry for object processing or range estimation can be fed with a data link meeting less stringent requirements than a link between the ADC circuitry and first-tier signal processing circuitry.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: April 25, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: Ronald A. Kapusta, Brian D. Hamilton
  • Patent number: 11637724
    Abstract: Methods and apparatus are disclosed for communicating multiple logic states across a digital isolator. The digital isolator is a universal serial bus (USB) isolator in some embodiments. The digital isolator includes one or more single-bit data channels. Three or more logic states of information are transmitted across the single-bit data channel(s). The logic states are distinguished by a pulse sequence, and in particular a number of edges of the pulse sequence and a final value or final edge of the pulse sequence.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: April 25, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Eric C. Gaalaas, Dongwan Ha, Jason J. Ziomek, Bikiran Goswami, Brian Jadus
  • Patent number: 11637096
    Abstract: A hybrid silicon carbide (SiC) device includes a first device structure having a first substrate comprising SiC of a first conductivity type and a first SiC layer of the first conductivity type, where the first SiC layer is formed on a face of the first substrate. The first device structure also includes a second SiC layer of a second conductivity type that is formed on a face of the first SiC layer and a first contact region of the first conductivity type, where the first contact region traverses the second SiC layer and contacts the first SiC. The device also includes a second device structure that is bonded to the first device structure. The second device structure includes a switching device formed on a second substrate and a second contact region that traverses a first terminal region of the switching device and contacts the first contact region.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: April 25, 2023
    Assignee: Analog Devices, Inc.
    Inventors: James G. Fiorenza, Puneet Srivastava, Daniel Piedra
  • Publication number: 20230121532
    Abstract: An energy-efficient multiplication circuit uses analog multipliers and adders to reduce the distance that data has to move and the number of times that the data has to be moved when performing matrix multiplications in the analog domain. The multiplication circuit is tailored to bitwise multiply the innermost product of a rearranged matrix formula generate a matrix multiplication result in form of a current that is then digitized for further processing.
    Type: Application
    Filed: November 8, 2022
    Publication date: April 20, 2023
    Applicant: Analog Devices, Inc.
    Inventors: Sung Ung Kwak, Robert Michael Muchsel
  • Publication number: 20230117529
    Abstract: Herein disclosed is an example analog-to-digital converter (ADC) and methods that may be performed by the ADC. The ADC may derive a first code that approximates a combination of an analog input value of the ADC and a dither value for the ADC sampled on a capacitor array. The ADC may further derive a second code to represent a residue of the combination with respect to the first code applied to the capacitor array. The ADC may combine the numerical value of the first code and the numerical value of the second code to produce a combined code applied to the capacitor array for deriving a digital output code. Combining the numerical value of the first code and the numerical value of the second code in the digital domain can provide for greater analog-to-digital (A/D) conversion linearity.
    Type: Application
    Filed: December 14, 2022
    Publication date: April 20, 2023
    Applicant: Analog Devices, Inc.
    Inventor: Jesper STEENSGAARD-MADSEN
  • Publication number: 20230120444
    Abstract: Device for improving an optical detecting smoke apparatus and implementing thereof. Apparatus and methods for detecting the presence of smoke in a small, long-lasting smoke detector are (disclosed. Specifically, the present disclosure shows how to build one or more optimized blocking members in a smoke detector to augment signal to noise ratio. This is performed while keeping the reflections from the housing structure to a very low value while satisfying all the other peripheral needs of fast response to smoke and preventing ambient light. This allows very small measurements of light scattering of the smoke particles to be reliable in a device resistant to the negative effects of dust. In particular, geometrical optical elements, e.g., cap and optical defection elements, are disclosed.
    Type: Application
    Filed: December 15, 2022
    Publication date: April 20, 2023
    Applicant: Analog Devices, Inc.
    Inventor: Shrenik DELIWALA
  • Patent number: 11632455
    Abstract: Disclosed herein are proximity detection sensor arrangements, as well as related methods and devices. In some embodiments, a sensor arrangement in an electronic device may include a first circuit layer including a proximity pad and a first reference pad, and a second circuit layer including a second reference pad and a temperature pad. The first circuit layer may be between the second circuit layer and a user-facing surface of the electronic device, the first reference pad may be electrically coupled to the second reference pad, and the first reference pad may be between the temperature pad and the user-facing surface.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: April 18, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: Xiangzhi Wu, Hsien-Chieh Liu
  • Patent number: 11628275
    Abstract: An electronic device is disclosed. The electronic device comprise an elongate electrical connector that is configured to connect to an integrated device package. The elongate electrical connector can comprise an elongate flexible substrate. The elongate flexible substrate has a proximal portion and a distal portion spaced from the proximal portion by a length along a longitudinal axis. The elongate flexible substrate has a width along an axis transverse to the longitudinal axis. The elongate flexible substrate defines an elongation ratio of the length to the width. The elongation ratio is at least 100:1. The elongate electrical connector can be connected to a bobbin. The elongate electrical connector can be configured to unspool from the bobbin.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: April 18, 2023
    Assignee: ANALOG DEVICES, INC.
    Inventors: Vikram Venkatadri, David Frank Bolognia
  • Patent number: 11632105
    Abstract: Improved overcurrent detection and mitigation systems, methods, and techniques for a BMS are described herein. A BMS monitor may detect an overcurrent using two different techniques. The first technique may detect an overcurrent based on average power over different, overlapping time periods. The second technique may detect an overcurrent based on determining a modeled junction temperature of a switching device.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: April 18, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: Gaurav Singh, Wreeju Bhaumik
  • Patent number: 11631523
    Abstract: Disclosed herein is a symmetric split planar transformer in the context of a DC-DC isolated converter. The symmetric split planar transformer reduces or eliminates asymmetry in the distribution of parasitic capacitance across the isolation barrier going from one end to another end of a primary coil, and as a result, undesirable electromagnetic interference (EMI) due to common mode dipole emission across the isolation barrier may be reduced. In some embodiments, the primary winding is split into at least a first coil and a second coil, each occupying a different area side-by-side on a substrate. The transformer is symmetric in the sense that a capacitive coupling of the first coil to a secondary winding is the same as a capacitive coupling of the second coil to the secondary winding, such that common mode EMI may be reduced. Each coil may include stacked spiral coil portions in multiple metal planes to increase inductive density across the isolation barrier.
    Type: Grant
    Filed: November 20, 2020
    Date of Patent: April 18, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: Giovanni Frattini, Maurizio Granato, Pietro Giannelli, Keith W. Bennett
  • Patent number: 11626486
    Abstract: A back-gate carbon nanotube field effect transistor (CNFETs) provides: (1) reduced parasitic capacitance, which decreases the energy-delay product (EDP) thus improving the energy efficiency of digital systems (e.g., very-large-scale integrated circuits) and (2) scaling of transistors to smaller technology nodes (e.g., sub-3 nm nodes). An exemplary back-gate CNFET includes a channel. A source and a drain are disposed on a first side of the channel. A gate is disposed on a second side of the channel opposite to the first side. In this manner, the contacted gate pitch (CGP) of the back-gate CNFET may be scaled down without scaling the physical gate length (LG) or contact length (LC). The gate may also overlap with the source and/or the drain in this architecture. In one example, an exemplary CNFET was demonstrated to have a CGP less than 30 nm and 1.6× improvement to EDP compared to top-gate CNFETs.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: April 11, 2023
    Assignees: Massachusetts Institute of Technology, Analog Devices, Inc.
    Inventors: Max Shulaker, Tathagata Srimani, Samuel Fuller, Yosi Stein, Denis Murphy
  • Patent number: 11626847
    Abstract: Various examples are directed to amplifier circuits and methods for operating amplifier circuits. The amplifier circuit may comprise a first amplifier stage. The first amplifier stage comprises a first amplifier, a first feedback resistance, a second amplifier, a second feedback resistance, and a gain resistance. A first current source may be electrically coupled to provide a first current across the gain resistance in a first direction. A second current source may be electrically coupled to provide a second current across the gain resistance in a second direction opposite to the first direction.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: April 11, 2023
    Assignee: Analog Devices, Inc.
    Inventors: David James Plourde, Greg L. Disanto
  • Patent number: 11626885
    Abstract: An excess loop delay compensation (ELDC) technique for use with a successive approximation register (SAR) based quantizer in a continuous time delta-sigma ADC is described. The techniques can efficiently program and calibrate the ELD gain in ELD compensation SAR quantizers. An ELDC circuit can include a charge pump having a digitally programmable capacitance to adjust a gain, such as the gain of the ELDC digital-to-analog converter (DAC) or the gain of the SAR DAC.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: April 11, 2023
    Assignee: ANALOG DEVICES, INC.
    Inventors: Shaolong Liu, Daniel Peter Canniff, Abhishek Bandyopadhyay, Akira Shikata
  • Publication number: 20230108651
    Abstract: Systems and methods are provided for reducing power in in-memory computing, matrix-vector computations, and neural networks. An apparatus for in-memory computing using charge-domain circuit operation includes transistors configured as memory bit cells, transistors configured to perform in-memory computing using the memory bit cells, capacitors configured to store a result of in-memory computing from the memory bit cells, and switches, wherein, based on a setting of each of the switches, the charges on at least a portion of the plurality of capacitors are shorted together. Shorting together the plurality of capacitors yields a computation result.
    Type: Application
    Filed: February 18, 2022
    Publication date: April 6, 2023
    Applicant: Analog Devices, Inc.
    Inventors: Eric G. NESTLER, Naveen VERMA, Hossein VALAVI
  • Patent number: 11621624
    Abstract: Embodiments of the present disclosure may monitor and adjust a sampling rate of an ADC for converting the power signal to a digital signal, locking onto the phase and frequency of the power signal. This technique may make the sampling process coherent relative to the power signal. Properties of the power signal, such as phase, frequency, and magnitude, may be extracted relative to an idealized power signal.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: April 4, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: Damien J. McCartney, Damien Murphy, Jeric Adrian Butiu Monzon
  • Patent number: 11621539
    Abstract: This disclosure is directed to, among other things, techniques to quickly replenish a capacitance of a laser diode driver circuit after an optical pulse, which can enable a burst of pulses (more than one pulse), such as to enable pulse coding. An energy reservoir circuit can be coupled to a laser diode driver circuit and to a power supply circuit and configured to store enough energy to fire the RD laser diode driver more than once. The energy reservoir circuit can act as an intermediate interface between the RD laser diode driver and the power supply circuit to better optimize the current requirements of each block.
    Type: Grant
    Filed: June 2, 2020
    Date of Patent: April 4, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Shawn S. Kuo, James Lin, Ronald A. Kapusta