Abstract: A power amplifier circuit for broadband data communication over a path in a communication network can reduce or avoid gain compression, provide low distortion amplification performance, and can accommodate a wider input signal amplitude range. A dynamic variable bias current circuit can be coupled to a common emitter bias node of a differential pair of transistors to provide a dynamic variable bias current thereto as a function of an input signal amplitude of an input signal. Bias current is increased when input signal amplitude exceeds a threshold voltage established by an offset or level-shifting circuit. The frequency response of the bias current circuit can track the frequency content of the input signal. A delay in the signal path to the differential pair can phase-align the bias current to the amplification by the differential pair. A dynamic variable supply voltage can be based on an envelope of the input signal.

Abstract: A continuous-time sampler has series-connected delay lines with intermediate output taps between the delay lines. Signal from an output tap can be buffered by an optional voltage buffer for performance. A corresponding controlled switch is provided with each output tap to connect the output tap to an output of the continuous-time sampler. The delay lines store a continuous-time input signal waveform within the propagation delays. Controlling the switches corresponding to the output taps with pulses that match the propagation delays can yield a same input signal value at the output. The continuous-time sampler effectively “holds” or provides the input signal value at the output for further processing without requiring switched-capacitor circuits that sample the input signal value onto some capacitor. In some cases, the continuous-time sampler can be a recursively-connected delay line. The continuous-time sampler can be used as the front end sampler in a variety of analog-to-digital converters.

Abstract: Apparatus and methods are disclosed related to managing characteristics of a mobile device based upon capacitive detection of materials proximate the mobile device, a capacitive gesture system that can allow the same gestures be used in arbitrary locations within range of a mobile device. One such method includes receiving a first capacitive sensor measurement with a first capacitive sensor of the mobile device. The method further includes determining a value indicative of a material adjacent to the mobile device based on a correspondence between the first capacitive sensor measurement and stored values corresponding to different materials. The method further includes sending instructions to adjust a characteristic of the mobile device based on the determined value indicative of the material adjacent to the mobile device. In certain examples, gesture sensing can be performed using capacitive measurements from the capacitive sensors.

Abstract: Disclosed herein are systems for calibrating an analog-to-digital converter (ADC) device, as well as related devices and methods. In some embodiments, a system for calibrating an ADC device may include an ADC device, wherein the ADC device includes an ADC and a dither source, and wherein the ADC device is to apply a set of calibration parameters to generate digital outputs. The system may also include calibration circuitry, coupled to the ADC device, to determine which of multiple sets of values of calibration parameters results in the digital outputs having the lowest amount of noise, and to cause the ADC device to apply the calibration parameters associated with the lowest noise.

Abstract: A network authentication system with dynamic key generation that facilitates the establishment of both endpoint identity, as well as a secure communication channel using a dynamically-generated key between two end devices (potentially on separate local area networks). An interactive or non-interactive authentication protocol is used to establish the identity of the target end device, and dynamic key generation is used to establish a shared symmetric session key for creating an encrypted communication channel between the end devices.

Abstract: A power conversion apparatus or system can be configured to receive a high voltage alternating current (AC) signal at an input and to provide in dependence thereon a low voltage direct current (DC) signal from an output stage. The power conversion apparatus can include a main path comprising a high voltage capacitor in series with the input. In an example, the capacitor comprises a portion of an electric field energy harvesting system.

Abstract: A system and method of reducing data-rate requirements of fronthauls for wireless communication is disclosed. In one aspect, the system includes a baseband processing unit and a remote radio head remotely located from the baseband processing unit. The remote radio head is configured to transmit and receive communication signals with the baseband processing unit. The system can also include a fronthaul configured to provide a communication channel between the baseband processing unit and the remote radio head for the communication signals, and a matched filter configured to filter out redundant information from the communications signals before the communications signals are provided to the fronthaul.

Abstract: Analog circuits are often non-linear, and the non-linearities can hurt performance. Designers would trade off power consumption to achieve better linearity. An efficient and effective calibration technique can address the non-linearities and reduce the overall power consumption. A dither signal injected to the analog circuit can be used to expose the non-linear behavior in the digital domain. To detect the non-linearities, a counting approach is applied to isolate non-linearities independent of the input distribution. The approach is superior to and different from other approaches in many ways.

Abstract: One embodiment is an apparatus including a detector circuit electrically coupled between a signal source and a second circuit, the signal source generating a first signal, the detector circuit detecting a level of the first signal and generating a first control signal when the detected level of the first signal exceeds a first threshold value, and a clamping switch electrically coupled to receive the first control signal from the detector circuit, the clamping switch including a multi-terminal active device. The first control signal controls a state of the clamping switch such that the clamping switch clamps a level of a signal applied to the second circuit when the level of the first signal exceeds the first threshold value.

Abstract: The present disclosure addresses thermal issues in a multi gate finger field-effect transistor (FET) by providing a multi-gate finger FET arrangement where the respective distances between the multiple gate fingers are modulated along the device, such that the distances between the gate fingers in or towards the middle of the device are greater than the distances between the gate fingers at the or towards the edge of the device. By providing the greater distances between gate fingers located in or towards the middle of the device then improved thermal management properties are obtained, and the device as a whole is maintained cooler than would otherwise be the case, with associated improvements in device lifetimes.

Abstract: In a teeter-totter type MEMS accelerometer, the teeter-totter proof mass and the bottom set of electrodes (i.e., underlying the proof mass) are formed on a device wafer, while the top set of electrodes (i.e., overlying the teeter-totter proof mass) are formed on a circuit wafer that is bonded to the device wafer such that the top set of electrodes overlie the teeter-totter proof mass. The electrodes formed on the circuit wafer may be formed from an upper metallization layer on the circuit wafer, which also may be used to form various electrical connections and/or bond pads.

Abstract: Power systems having a DC content, such as photovoltaic (solar) panels present a problem if an arc fault appears because of a small break in a cable. The present disclosure describes an arc fault detection system that captures data in segments, examines the frequency spectrum to remove ‘false arc’ signatures and interference from a power converter of the power system, and then examines the cleaned frequency spectrum for arc events.

Abstract: Many conventional video processing algorithms attempting to detect human presence in a video stream often generate false positives on non-human movements such as plants moving in the wind, rotating fan, etc. To reduce false positives, a technique exploiting temporal correlation of non-human movements can accurately detect human occupancy while reject non-human movements. Specifically, the technique involves performing temporal analysis on a time-series signal generated based on an accumulation of foreground maps and an accumulation of motion map and analyzing the running mean and the running variance of the time-series signal. By determining whether the time-series signal is correlated in time, the technique is able to distinguish human movements and non-human movements. Besides having superior accuracy, the technique lends itself to an efficient algorithm which can be implemented on low cost, low power digital signal processor or other suitable hardware.

Abstract: Techniques for linearizing a field effect transistor (FET) are provided. In an example, a method can include averaging a voltage at a drain node of the FET and a voltage at a source node of the FET to provide an average voltage, and applying the average voltage to a gate node of the FET.

Abstract: A method is described and in one embodiment includes detecting a transition of a data signal comprising a data packet received at a circuit while the circuit is in a first hysteresis mode; placing the circuit in a second hysteresis mode subsequent to the detecting; and returning the receiver to the first hysteresis mode subsequent to completion of receipt of the data packet to await receipt of a next data packet. In certain embodiments, the first hysteresis mode is a high hysteresis mode and the second hysteresis mode is a standard hysteresis mode. In some embodiments, a level of each of the first and second hysteresis modes is dynamically tunable.

Abstract: A method of fabricating a super-capacitor provides a substrate, and then adds an electrode and electrolyte template film, having a well for receiving the electrode, to the substrate. The method also adds a second electrolyte to the electrode and electrolyte template.

Abstract: It is often desirable to transmit data between circuits or components operating at a relatively high voltage and circuits operating at a relatively low voltage. Such a task can be performed by use of an isolator. Some isolator designs use magnetic coupling to transfer the data as this is more robust against inadvertently transmitting high voltage transients than capacitor based isolators. However it is often desirable to encode the data for exchange across the transformer of the isolator and decode after transmission across the transformer. This requires power for the encoding and decoding circuits. To ensure both sides are powered, power may be transferred by another transformer. The transformer primary is driven by an oscillating signal. The system disclosed in some embodiments herein varies the frequency of the oscillating signal to mitigate the risk of it interfering with other circuits or systems associated with the isolator.

Abstract: This disclosure relates to data converters for electronic systems. An example system includes a primary analog to digital converter (ADC) circuit, a slope calculation circuit, a digital phase lock loop (DPLL) circuit, a sampling error circuit, and a summing circuit. The primary ADC circuit samples an input signal and produces a digital output signal representative of the input signal. The slope calculation circuit generates a digital slope signal representative of slope of the input signal, and the DPLL circuit provides a sampling clock signal to the primary ADC circuit. The sampling error circuit generates a sampling error signal representative of sampling error by the primary ADC circuit using the digital slope signal and the sampling clock signal. The summing circuit receives the sampling error signal and the digital output signal of the primary ADC circuit and generates an adjusted digital output signal representative of the input signal.

Abstract: A power factor correction device for providing tolerance to a fault condition in an input supply can include a first boost circuit, a second boost circuit, and a controller circuit. The controller circuit can interleave operation of the first boost circuit and operation of the second boost circuit such as to generate an output voltage when the input supply is received at the power factor correction device. The controller circuit can route, in response to the fault condition, a stored supply of the second boost circuit to an input of the first boost circuit. The controller circuit can control the first boost circuit to maintain the output voltage.

Abstract: In a cascaded integrator comb (CIC) filter, a time-varying gain is added before the last integrating stage transforming its sub optimal boxcar impulse response into an FIR filter of arbitrary length. Make the coefficients sparse and taking them from a set of small integers leads to an efficient hardware implementation that does not compromise any of the essential CIC filter characteristics especially the overflow handling. The proposed sparse CIC structure can improve the worst case stop band attenuation by as much as 10 dB while occupying 77% of the chip area and consuming 30% less power compared to a standard a 5th order CIC filter, and reducing the overall bit growth of the filter and the amount of high rate operations. Design examples are given illustrating the advantages and flexibility of the proposed structure.