Abstract: Disclosed herein are systems and methods for performing DC offset correction of a video signal received over an AC-coupled video link. In one aspect, a transmitter is configured to compute, and provide to a receiver, metadata indicative of a statistical characteristic (e.g., an average or a sum of values) for a group of active pixels of a video signal acquired by a camera. The receiver is configured to compute an analogous statistical characteristic on the video signal received over an AC-coupled video link, and to perform DC offset correction by modifying one or more values of the received video signal based on a comparison of the statistical characteristic computed by the receiver and the one computed by the transmitter and indicated by the received metadata.

Abstract: An optical emitter package is disclosed. The optical emitter package can include a carrier, a switching die, and an optical emitter die mounted to the carrier. The optical emitter die can be directly electrically and mechanically connected to the carrier with a conductive adhesive. An energy storage device can be mounted to the carrier. The energy storage device can be directly electrically and mechanically connected to the carrier with a second conductive adhesive. The carrier can provide electrical communication between the switching die, the optical emitter die, and the energy storage device.

Abstract: An apparatus is provided that can estimate a transfer function, for example of current measurement systems, voltage measurement systems and power measurement systems, and also provide an estimate of certainty about the transfer function. This enables customers to have confidence that they are not being overcharged for electricity.

Abstract: A relaxation oscillator can provide a smaller and cheaper alternative to a crystal oscillator circuit in a wide variety of applications. A sawtooth relaxation oscillator can include overshoot error integration. Separate and distinct oscillator capacitor charging, overshoot error integration, and reset phases can be provided using separate comparators for first and second oscillation capacitors. Potential advantages can include high accuracy high-frequency clock, convenient trimming during initial calibration, clock frequency stability over temperature and time, fast startup with low overshoot, high power supply rejection, low power, or low noise/jitter. The oscillator can charge an oscillation capacitor up to a target voltage, then interrupt charging before beginning an error integration phase that adjusts the target voltage by integrating an overshoot error of a voltage on the oscillation capacitor. After completing the overshoot error integration, the voltage on the oscillation capacitor can be reset.

Abstract: A charge pump circuit comprises a first charge transfer circuit path coupled including a first boost capacitor coupled to a first clock input, a first charge switch coupled to a circuit input, and a first discharge switch coupled to a circuit output; a second charge transfer circuit path including a second boost capacitor coupled to a second clock input, a second charge switch coupled to the circuit input, and a second discharge switch coupled to the circuit output; a first charge control circuit including a first gate switch coupled to a gate input of the first charge switch, and a first gate-drive capacitor coupled to the gate input of the second charge switch; and a second charge control circuit including a second gate switch coupled to a gate input of the second charge switch, and a second gate-drive capacitor coupled to the gate input of the first charge switch.

Abstract: Various examples are directed to a variable speed comparator circuit comprising a first comparator, a second comparator, and a third comparator and a logic circuit. The first comparator may be configured to generate a first comparator output using a first input and a second input. The second comparator may be configured to generate a second comparator output using the first input and the second input. The third comparator may be configured to generate a third comparator output using the first input and the second input. A propagation delay of the second comparator may be less than a propagation delay of the first comparator. Also, a propagation delay of the third comparator may be less than the propagation delay of the second comparator. The second comparator may have an input offset relative to the third comparator.

Abstract: Various embodiments mitigate the risk of frequency-lock in systems having multiple resonators by dynamically changing the frequency at which at least one of the resonators is driven. More particularly, the drive frequency of at least one of the resonators is changed often enough that the multiple resonators do not have time to achieve frequency lock. Changes in the oscillation of the resonators may be analyzed to determine, for example, acceleration of such systems. Some embodiments implement self-test by assessing expected performance of a system with toggling drive frequencies. More particularly, some embodiments implement self-test by artificially inducing displacement of a movable member of a system.

Abstract: Aspects of the embodiments are directed to methods and imaging systems. The imaging systems can be configured to sense, by an light sensor of the imaging system, light received during a time period, process the light received by the light sensor, identify an available measurement period for the imaging system within the time period based on the processed light, and transmit and receive light during a corresponding measurement period in one or more subsequent time periods.

Abstract: A time-to-digital converter (TDC) detects a timing relationship between signals representing two temporal events. Several samples are acquired over a certain time period for each event, and the signals related to the different events are digitized or quantized either by separate TDCs or by a single TDC in a time-sequential manner. The quantized results are then processed, for example added to/subtracted from one another, and used to determine the phase or time difference between the two events. When information being quantized is quasi-static over time periods where the measurement is performed, the instantaneous or “one shot” accuracy of a TDC need not be as good as or better than the desired time resolution. Digitally processing the signals and averaging the results moves an otherwise difficult analog quantizer problem to the digital domain where savings in power and chip area can be easily achieved without sacrificing accuracy.

Abstract: A conversion time and an acquisition time of an ADC can be estimated so that a speed of the ADC can be calibrated. An ADC circuit can perform M bit-trials in its conversion phase and continue performing additional bit-trials in a calibration mode. The ADC can count the number of additional bit-trials performed, e.g., X bit-trials, that occur before the next conversion phase, where additional bit-trials can be considered to be the number of available bit-trials during an acquisition time if the ADC continues performing bit-trials instead of sampling an input signal. The ADC can estimate the conversion time and the acquisition time using M and X. Then, the conversion time of the ADC can be calibrated by adjusting one or more of the comparison time, DAC settling delay, and logic propagation delay.

Abstract: Many electronic circuits rely on the ratio of one component to other components being well defined. Current flow in component can warm the component causing its electrical properties to change, for example the resistance of a resistor may increase due to self-heating as a result of current flow. The present disclosure provides a way to reduce temperature variation between components so as to reduce electrical mismatch between them or the consequences of such mismatch. This is important as even a change of resistance of, for example, 20-50 ppm in a resistor can result in non-linearity exceeding the least significant bit value of a 16 bit digital to analog converter.

Abstract: Embodiments of the present disclosure describe mechanisms for radio frequency (RF) ranging between pairs of radio units based on radio signals exchanged between units. An exemplary radio system may include a first radio unit, configured to transmit a first radio signal, and a second radio unit configured to receive the first radio signal, adjust a reference clock signal of the second radio unit based on the first radio signal, and transmit a second radio signal generated based on the adjusted reference clock signal. Such a radio system may further include a processing unit for determining a distance between the first and second radio units based on a phase difference between the first radio signal as transmitted by the first radio unit and the second radio signal as received at the first radio unit. Disclosed mechanisms may enable accurate RF ranging using low-cost, low-power radio units.

Abstract: Digital signal processors often operate on two operands per instruction, and it is desirable to retrieve both operands in one cycle. Some data caches connect to the processor over two busses and internally uses two or more memory banks to store cache lines. The allocation of cache lines to specific banks is based on the address that the cache line is associated. When two memory accesses map to the same memory bank, fetching the operands incurs extra latency because the accesses are serialized. An improved bank organization for providing conflict-free dual-data cache access—a bus-based data cache system having two data buses and two memory banks—is disclosed. Each memory bank works as a default memory bank for the corresponding data bus. As long as the two values of data being accessed belong to two separate data sets assigned to the two respective data buses, memory bank conflicts are avoided.

Abstract: Embodiments of the present invention may provide a wafer-capped rechargeable power source. The wafer-capped rechargeable power source may comprise a device wafer, a rechargeable power source disposed on a surface of the device wafer, and a capping wafer to encapsulate the rechargeable power source. The rechargeable power source may include an anode component, a cathode component, and an electrolyte component.

Abstract: Improvements in analog-to-digital converter (ADC) circuit accuracy are described that can utilize a digital-to-analog converter (DAC) circuit with one or more redundant unit elements, or one or more bits redundancy or non-binary weighted capacitors, and can reuse the existing DAC circuit for noise reduction to save power and die area. An ADC circuit can use redundancy bit(s), e.g., one or more DAC unit elements of a main DAC, and the remaining lower bits of the main DAC for repeated bit trials, and can average the data from the repeated bit trials to suppress noise from conversions.

Abstract: A timer circuit is provided comprising: a resistor; a programmable gain circuit coupled to amplify the reference level based upon a resistor and a selected gain; a detection circuit coupled to identify the amplified reference level based upon a resistor; a selection circuit configured to select the gain based at least in part upon the identified amplified reference level based upon a resistor; a comparator circuit configured to transition between providing a signal having a first value and providing a signal having a second value based at least in part upon comparisons of a reactive circuit element excitation level with the amplified reference level based upon a resistor and with a second reference level; and reactive circuit element excitation circuit configured to reverse excitation of the reactive circuit element in response to the comparator circuit transitioning between providing the signal having the first value and providing the signal having the second value.

Abstract: Microelectromechanical systems (MEMS) devices (such as gyroscopes) configured to reject quadrature motion are described. Quadrature motion arises for example when the drive motion of a gyroscope couples to the sense motion of a gyroscope even in the absence of an angular motion. In some circumstances, quadrature motion may result from the fact that the springs used in a gyroscope have slanted sidewall, which can impart torque in the mechanics of the gyroscope. MEMS gyroscope of the type described herein may be configured to reject quadrature motion by using only springs oriented substantially parallel to the drive direction. One such spring includes only beams parallel the drive directions, and optionally. These MEMS gyroscopes may be used to sense, among others, roll and pitch angular rates.

Abstract: An “all-digital” operational amplifier architecture, that does not have the constraint of maintaining devices in their saturation region, can leverage the high speed achievable by deeply scaled technology to replace traditional linear current referenced continuous-time operational amplifier circuits with CMOS-like dynamic circuits that require no referencing structure, have no static power consumption, and are compatible with ultra-low supply voltages. Techniques are described to replace analog continuous-time linear operational amplifier input and output stages by a discrete-time comparator circuit, e.g., CMOS-style, and a switched capacitor charge pump circuit, respectively.

Abstract: The present disclosure provides a feedback control system and method for a bidirectional VCM. The system employs an analog core that is common to both the PWM and linear modes of operation. The analog core includes a feedback mechanism that determines the error in the current flowing through the motor. The feedback mechanism produces an error voltage that corresponds to the current error, and applies the voltage to a control driver. The control driver then controls the motor, based on the error voltage, in either a PWM or linear mode. By sharing a common core, the switching time between modes is improved. Furthermore, the output current error between modes is reduced.

Abstract: A hardware-locked encrypted backup (HWLE-BU) that is locked to a single hardware device using the device's unique hardware identity, based on a Physically-Unclonable Function (PUF) or other suitable means providing a unique hardware identity. The HWLE-BU is bound to a specific hardware identity such that only the physical device that created the HWLE-BU can decrypt it, i.e., restoring HWLE-BU data requires utilizing the same physical hardware device in the decryption process.