Abstract: A multiple-level driver circuit, such as for providing several different signals to a device under test (DUT) in an automated test system, can include multiple diode bridge circuits. In an example, a first diode bridge circuit is configured to receive a multiple-valued input voltage signal, having at least two different DC voltage signal levels, at an input node and, in response, to selectively provide a corresponding multiple-valued output voltage signal at an output node. The first diode bridge circuit can operate in a conducting and non-commutated state when it is used to selectively provide the multiple-valued output voltage signal at the output node.

Abstract: A converter circuit is provided that includes an amplifier circuit and further includes: a summing current resistor that exhibits nonlinear resistance coupled between a voltage node and a summing current node of the amplifier; a compensation resistor circuit includes resistors that exhibit nonlinear resistance; the compensation resistor circuit produces a compensation current at the summing current node that compensates for nonlinear current flow in the summing current resistor.

Abstract: A wireless charging network system is disclosed that includes wirelessly charged sensor nodes. The wireless network system can include a gateway node configured to aggregate data from sensor nodes within a coverage area of the gateway node. The gateway node is further configured to wirelessly transmit power to the sensor nodes using a beamformed signal, wherein the gateway node adjusts the beamformed signal to maximize wireless power transfer to sensor nodes within each sector of the coverage area. Location information can be used to adjust the beamformed signal. For example, in various embodiments, the gateway node includes a beamformer sector profile table that defines channel adaptive beam profiles for the beamformed signal for each sector of the coverage area. The gateway node can use location information to define the beam profiles.

Abstract: Techniques for limiting the output voltage of an amplifier without directly affecting an output current of the amplifier are provided. In an example, an amplifier can include a plurality of amplifier stages configured to receive an input voltage and to provide an output voltage as a function of the input voltage, and a comparator configured to receive a voltage limit and a representation of the output voltage of the amplifier, to adjust current at an input to a first amplifier stage of the plurality of amplifier stages when the output voltage violates the voltage limit, and to clamp the output voltage at an offset from the voltage limit.

Abstract: A MEMS product includes a stress-isolated MEMS platform surrounded by a stress-relief gap and suspended from a substrate. The stress-relief gap provides a barrier against the transmission of mechanical stress from the substrate to the platform.

Abstract: An electromechanical system (MEMS) accelerometer is described. The MEMS accelerometer may be configured to sense linear acceleration along one, two or three axes, and to sense angular acceleration about one, two or three axes. As such, the MEMS accelerometer may serve as 2-axis, 3-axis, 4-axis, 5-axis or 6-axis inertial accelerometer. In some embodiments, the MEMS accelerometer may comprise a single mass connected to at least one anchor via a plurality of tethers. In other embodiments, the MEMS accelerometer may comprise a proof mass connected to at least one anchor via a plurality of tethers and one or more shuttle masses connected to the proof mass via a second plurality of tethers. Rotational and linear motion of the MEMS accelerometer may be sensed using capacitive sensors.

Abstract: A MEMS resonant accelerometer is described. The MEMS resonant accelerometer may comprise a pair of proof masses configured to resonate when driven with periodic signals. In this respect, the accelerometer's proof masses may serve as masses for detecting accelerations as well as resonators. The MEMS resonant accelerometer may comprise drive electrodes for causing the proof masses to resonate and sense electrodes for sensing motion of the proof masses. The magnitude of a z-axis acceleration, that is, an acceleration perpendicular to the plane of the proof masses, may be detected by sensing the frequency at which the proof masses resonate in the presence of such an acceleration. The proof masses may be arranged to produce differential signals.

Abstract: A microelectromechanical systems (MEMS) accelerometer is described. The MEMS accelerometer may comprise a proof mass configured to sense accelerations in a direction parallel the plane of the proof mass, and a plurality of compensation structures. The proof mass may be connected to one or more anchors through springs. The compensation structures may be coupled to the substrate of the MEMS accelerometer through a rigid connection to respective anchors. A compensation structure may comprise at least one compensation electrode forming one or more lateral compensation capacitors. The compensation capacitor(s) may be configured to sense displacement of the anchor to which the compensation structures is connected.

Abstract: A successive approximation register analog-to-digital converter (SAR ADC) typically includes circuitry for implementing bit trials that converts an analog input to a digital output bit by bit. The circuitry for bit trials are usually weighted (e.g., binary weighted), and these bit weights are not always ideal. Calibration algorithms can calibrate or correct for non-ideal bit weights and usually prefer these bit weights to be signal independent so that the bit weights can be measured and calibrated/corrected easily. Embodiments disclosed herein relate to a unique circuit design of an SAR ADC, where each bit capacitor or pair of bit capacitors (in a differential design) has a corresponding dedicated on-chip reference capacitor. The speed of the resulting ADC is fast due to the on-chip reference capacitors (offering fast reference settling times), while errors associated with non-ideal bit weights of the SAR ADC are signal independent (can be easily measured and corrected/calibrated).

Abstract: In some exemplary embodiments, a MEMS accelerometer includes a device wafer having a proof mass and a plurality of tracking anchor points attached to a substrate. Each tracking anchor is configured to deflect in response to asymmetrical deformation in the substrate, and transfer mechanical forces generated in response to the deflection to tilt the proof mass in a direction of the deformation.

Abstract: An isolator device is provided comprising a body of first dielectric material between the first and second conductors, such as primary and secondary coils of a micro-transformer. A region of second dielectric material is provided between the body of first dielectric material and at least one of the first and second electrodes, wherein the second dielectric material has a higher relative permittivity than the first dielectric material. This provides enhances ability to withstand the Electric fields generated at the edge of a conductor. The body of the first dielectric can be tapered to provide stress relief to prevent the second dielectric material developing stress cracks.

Abstract: A transformer based digital isolator is provided that has improved immunity to common mode interference. The improved immunity is provided by placing the transformer in association with an H-bridge drive circuit, and taking additional effort to tailor the on state resistance of the transistors to control a common mode voltage at the transformer.

Abstract: A monolithic vapor chamber heat dissipating device uses a phase change liquid and one or more wicks to dissipate heat from a heat-generating system. The phase change liquid and one or more wicks may be directly coupled to the heat-generating system, or may be coupled to an intermediate evaporator substrate. The phase change liquid vaporizes as it absorbs heat from the heat-generating system. When the vapor rises and encounters a condenser substrate, the vapor condenses and transfers the heat to the condenser substrate. The condensed vapor is drawn by gravity and the one or more wicks to the phase change liquid coupled to the heat-generating system.

Abstract: Apparatus and methods for transient overstress protection with false condition shutdown are provided herein. In certain configurations, a high-voltage tolerant actively-controlled protection circuit includes a transient overstress detection circuit, a clamp circuit electrically connected between a first node and a second node, a bias circuit that biases the clamp circuit, and a false condition shutdown circuit. The transient overstress detection circuit generates a detection signal indicating whether or not a transient overstress event is detected between the first and second nodes. Additionally, the false condition shutdown circuit generates a false condition shutdown signal based on low pass filtering a voltage difference between the first and second nodes, thereby determining independently whether or not power is present. The bias circuit controls operation of the clamp circuit in an on state or an off state based on the detection signal and the false condition shutdown signal.

Abstract: An apparatus includes an electrostatic discharge (ESD) protection device configured to protect a circuit from ESD conditions. The protection device includes an emitter region having a first diffusion polarity; a collector region laterally spaced apart from the emitter region, and having the first diffusion polarity; and a barrier region interposed laterally between the emitter region and the collector region while contacting the emitter region. The barrier region has a second diffusion polarity opposite from the first diffusion polarity. The device can further include a base region having the second diffusion polarity, and laterally surrounding and underlying the emitter region and the barrier region. The barrier region can have a higher dopant concentration than the base region, and block a lateral current flow between the collector and emitter regions, thus forming a vertical ESD device having enhanced ESD performance.

Abstract: An analog multiplexer may be used for sampling an input voltage that is capable of having a higher voltage level than an upper supply voltage. The analog multiplexer includes a plurality of input switch circuits and a shorting switch circuit. The plurality of input switch circuits include n-type or p-type laterally diffused field effect transistors (NLDFETs or PLDFETs). At least one of the input switch circuits includes a level shifting switch circuit that is able to sample an input voltage that is greater than the upper supply voltage for the multiplexer. A shorting switch circuit, at an output of the multiplexer, includes a capacitively coupled gate drive circuit and is configured to short a first differential output to a second differential output after the input voltage is sampled.

Abstract: A transformer-based balun circuit is disclosed herein. The balun can be implemented using a spiral transformer, where primary and secondary transformer windings can be inductively coupled and can be implemented on the same metal layer (or different metal layers, e.g. vertically adjacent metal layers). The balun can further include a compensation capacitor and a digital frequency tuning circuit. The compensation capacitor can be introduced at one of the differential terminals to reduce or suppress the amplitude and phase imbalance. The digital frequency tuning circuit can be a switchable bank of capacitors, which allows for tuning the frequency of operation of the transformer-based balun.

Abstract: Techniques and related circuits are disclosed and can be used to characterize glitch performance of a digital-to-analog (DAC) converter circuit in a rapid and repeatable manner, such as for use in providing an alternating current (AC) glitch value specification. A relationship can exist between a glitch-induced DAC output offset value and a DAC circuit input event rate. A relationship between the event rate (e.g., update rate) and the DAC output offset can be used to predict an offset value based at least in part on update rate or to estimate a corresponding glitch impulse area. In particular, a value representing glitch impulse area can be obtained by use of a hardware integration circuit without requiring use of a digitized time-series of glitch event waveforms.

Abstract: A low capacitance n-channel analog switch circuit, a p-channel analog switch circuit, and a full CMOS transmission gate (T-gate) circuit are described. Resistive decoupling can be used to isolate the switch or T-gate from AC grounds, such as one or more switch control signal inputs or supply voltages. A semiconductor region that is separated from a body region of a pass field-effect transistor (FET) can be coupled to or driven to a voltage similar to the input voltage or other desired voltage to help reduce parasitic capacitance of the switch or T-gate. The switch or T-gate can have improved frequency bandwidth or frequency response. The switch can be useful in a programmable gain amplifier (PGA) or programmable gain instrumentation amplifier (PGIA) or other circuit in which excessive switch capacitance could degrade circuit performance.

Abstract: A communication unit comprises a plurality of antenna element feeds (203, 205) for coupling to a plurality of antenna elements of an antenna array, where each antenna element feed comprises at least one coupler; and a plurality of transmitters operably coupled to the plurality of antenna element feeds. At least one transmitter of the plurality of transmitters comprises: an input for receiving a first signal and at least one second signal; beamformer logic arranged to apply independent beamform weights (RefBF1, RefBF2) on the first signal and the at least one second signal of the transmitter respectively, wherein each of the independent beamform weights is allocated on a per sector basis; and a signal combiner arranged to combine the first signal and the second signal to produce a combined signal, such as that the combined signal supports a plurality of sectored beams.