Patents Assigned to Anobit Technologies
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Publication number: 20100157641Abstract: A method for data storage in a memory (28) that includes a plurality of analog memory cells (32) includes estimating respective achievable storage capacities of the analog memory cells. The memory cells are assigned respective storage configurations defining quantities of data to be stored in the memory cells based on the estimated achievable capacities. The data is stored in the memory cells in accordance with the respective assigned storage configurations. The achievable storage capacities of the analog memory cells are re-estimated after the memory has been installed in a host system and used for storing the data in the host system. The storage configurations are modified responsively to the re-estimated achievable capacities.Type: ApplicationFiled: May 10, 2007Publication date: June 24, 2010Applicant: ANOBIT TECHNOLOGIES LTD.Inventors: Ofir Shalvi, Dotan Sokolov, Ariel Maislos, Zeev Cohen, Eyal Gurgi, Gil Semo
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Publication number: 20100157675Abstract: A method for data storage includes predefining an order of programming a plurality of analog memory cells that are arranged in rows. The order specifies that for a given row having neighboring rows on first and second sides, the memory cells in the given row are programmed only while the memory cells in the neighboring rows on at least one of the sides are in an erased state, and that the memory cells in the given row are programmed to assume a highest programming level, which corresponds to a largest analog value among the programming levels of the cells, only after programming all the memory cells in the given row to assume the programming levels other than the highest level. Data is stored in the memory cells by programming the memory cells in accordance with the predefined order.Type: ApplicationFiled: March 11, 2010Publication date: June 24, 2010Applicant: ANOBIT TECHNOLOGIES LTDInventors: Ofir Shalvi, Eyal Gurgi, Uri Perlmutter, Oren Golov
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Publication number: 20100131826Abstract: A method for operating a memory (24) includes storing data in analog memory cells (32) of the memory by writing respective analog values to the analog memory cells. A set of the analog memory cells is identified, including an interfered cell having a distortion that is statistically correlated with the respective analog values of the analog memory cells in the set. A mapping is determined between combinations of possible analog values of the analog memory cells in the set and statistical characteristics of composite distortion levels present in the interfered memory cell. The mapping is applied so as to compensate for the distortion in the interfered memory cell.Type: ApplicationFiled: August 27, 2007Publication date: May 27, 2010Applicant: Anobit Technologies Ltd.Inventors: Ofir Shalvi, Naftali Sommer, Eyal Gurgi, Oren Golov, Dotan Sokolov
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Publication number: 20100131827Abstract: A method for operating a memory (36) includes storing data in a plurality of analog memory cells (40) that are fabricated on a first semiconductor die by writing input storage values to a group of the analog memory cells. After storing the data, multiple output storage values are read from each of the analog memory cells in the group using respective, different threshold sets of read thresholds, thus providing multiple output sets of the output storage values corresponding respectively to the threshold sets. The multiple output sets of the output storage values are preprocessed by circuitry (48) that is fabricated on the first semiconductor die, to produce preprocessed data. The preprocessed data is provided to a memory controller (28), which is fabricated on a second semiconductor die that is different from the first semiconductor die, so as to enable the memory controller to reconstruct the data responsively to the preprocessed data.Type: ApplicationFiled: April 16, 2008Publication date: May 27, 2010Applicant: ANOBIT TECHNOLOGIES LTDInventors: Dotan Sokolov, Naftali Sommer, Ofir Shalvi, Uri Perlmutter
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Publication number: 20100124088Abstract: A method for data storage includes accepting data for storage in a memory that includes multiple analog memory cells and supports a set of built-in programming commands. Each of the programming commands programs a respective page, selected from a group of N pages, in a subset of the memory cells. The subset of the memory cells is programmed to store M pages of the data, M>N, by performing a sequence of the programming commands drawn only from the set.Type: ApplicationFiled: November 15, 2009Publication date: May 20, 2010Applicant: ANOBIT TECHNOLOGIES LTDInventors: Ofir Shalvi, Naftali Sommer, Uri Perlmutter, Dotan Sokolov
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Publication number: 20100115376Abstract: A method for storing data in a memory (28) that includes analog memory cells (32) includes identifying one or more defective memory cells in a group of the analog memory cells. An Error Correction Code (ECC) is selected responsively to a characteristic of the identified defective memory cells. The data is encoded using the selected ECC and the encoded data is stored in the group of the analog memory cells. In an alternative method, an identification of one or more defective memory cells among the analog memory cells is generated. Analog values are read from the analog memory cells in which the encoded data were stored, including at least one of the defective memory cells. The analog values are processed using an ECC decoding process responsively to the identification of the at least one of the defective memory cells, so as to reconstruct the data.Type: ApplicationFiled: December 3, 2007Publication date: May 6, 2010Applicant: Anobit Technologies Ltd.Inventors: Ofir Shalvi, Dotan Sokolov
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Publication number: 20100110787Abstract: A method for operating a memory (20) includes storing analog values in an array of analog memory cells (22), so that each of the analog memory cells holds an analog value corresponding to at least first and second respective bits. A first indication of the analog value stored in a given analog memory cell is obtained using a first set of sampling parameters. A second indication of the analog value stored in the given analog memory cell is obtained using a second set of sampling parameters, which is dependent upon the first indication. The first and second respective bits are read out from the given analog memory cell responsively to the first and second indications.Type: ApplicationFiled: October 30, 2007Publication date: May 6, 2010Applicant: Anobit Technologies Ltd.Inventors: Ofir Shalvi, Naftali Sommer
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Patent number: 7706182Abstract: A method for storing data in a memory that includes a plurality of analog memory cells includes mapping the data to programming values, which are selected from a set of nominal programming values. The set of nominal programming values includes at least a first nominal programming value and a second nominal programming value, which is higher than the first nominal programming value. A part of the data is stored in the analog memory cells by programming at least a first group of the cells using the first nominal programming value. A statistical characteristic of the first group of the cells is measured after programming the first group of the cells using the first nominal programming value. The second nominal programming value is modified responsively to the statistical characteristic, and at least a second group of the cells is programmed using the modified second nominal programming value.Type: GrantFiled: December 3, 2007Date of Patent: April 27, 2010Assignee: Anobit Technologies Ltd.Inventors: Ofir Shalvi, Zeev Cohen, Dotan Sokolov
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Publication number: 20100091535Abstract: A method for operating a memory (28) that includes a plurality of analog memory cells (32) includes storing data in the memory by writing first storage values to the cells. Second storage values are read from the cells, and a Cumulative Distribution Function (CDF) of the second storage values is estimated. The estimated CDF is processed so as to compute one or more thresholds. A memory access operation is performed on the cells using the one or more thresholds.Type: ApplicationFiled: March 11, 2008Publication date: April 15, 2010Applicant: ANOBIT TECHNOLOGIES LTDInventors: Naftali Sommer, Ofir Shalvi, Uri Perlmutter, Oren Golov, Eyal Gurgi, Micha Anholt, Dotan Sokolov
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Patent number: 7697326Abstract: A method for storing data in an array (28) of analog memory cells (32) includes defining a constellation of voltage levels (90A, 90B, 90C, 90D) to be used in storing the data. A part of the data is written to a first analog memory cell in the array by applying to the analog memory cell a first voltage level selected from the constellation. After writing the part of the data to the first analog memory cell, a second voltage level that does not belong to the constellation is read from the first analog memory cell. A modification to be made in writing to one or more of the analog memory cells in the array is determined responsively to the second voltage level, and data are written to the one or more of the analog memory cells subject to the modification.Type: GrantFiled: May 10, 2007Date of Patent: April 13, 2010Assignee: Anobit Technologies Ltd.Inventors: Naftali Sommer, Ofir Shalvi
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Publication number: 20090240872Abstract: A method for data storage includes defining at least first and second read commands for reading storage values from analog memory cells. The first read command reads the storage values at a first accuracy, and the second read command reads the storage values at a second accuracy, which is finer than the first accuracy. A condition is evaluated with respect to a read operation that is to be performed over a given group of the memory cells. One of the first and second read commands is selected responsively to the evaluated condition. The storage values are read from the given group of the memory cells using the selected read command.Type: ApplicationFiled: March 17, 2009Publication date: September 24, 2009Applicant: ANOBIT TECHNOLOGIES LTDInventors: Uri Perlmutter, Ofir Shalvi, Yoav Kasorla, Naftali Sommer, Dotan Sokolov
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Patent number: 7593263Abstract: A method for data storage includes providing a memory, which includes first memory cells having a first reading latency and second memory cells having a second reading latency that is higher than the first reading latency. An item of data intended for storage in the memory is divided into first and second parts. The first part is stored in the first memory cells and the second part is stored in the second memory cells. In response to a request to retrieve the item of data from the memory, the first part is read from the first memory cells and provided as output. The second part is read from the second memory cells, and provided as output subsequently to outputting the first part.Type: GrantFiled: December 17, 2007Date of Patent: September 22, 2009Assignee: Anobit Technologies Ltd.Inventors: Dotan Sokolov, Gil Semo, Ofir Shalvi
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Publication number: 20090228761Abstract: A method for data storage includes storing data in a group of analog memory cells by writing respective input storage values to the memory cells in the group. After storing the data, respective output storage values are read from the analog memory cells in the group. Respective confidence levels of the output storage values are estimated, and the confidence levels are compressed. The output storage values and the compressed confidence levels are transferred from the memory cells over an interface to a memory controller.Type: ApplicationFiled: March 4, 2009Publication date: September 10, 2009Applicant: ANOBIT TECHNOLOGIES LTDInventors: Uri Perlmutter, Dotan Sokolov, Ofir Shalvi, Oren Golov
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Publication number: 20090213654Abstract: A method includes defining a nominal level of a physical quantity to be stored in analog memory cells for representing a given data value. The given data value is written to the cells in first and second groups of the cells, which have respective first and second programming responsiveness such that the second responsiveness is different from the first responsiveness, by applying to the cells in the first and second groups respective, different first and second patterns of programming pulses that are selected so as to cause the cells in the first and second groups to store respective levels of the physical quantity that fall respectively in first and second ranges, such that the first range is higher than and the second range is lower than the nominal level. The given data value is read from the cells at a later time.Type: ApplicationFiled: February 23, 2009Publication date: August 27, 2009Applicant: ANOBIT TECHNOLOGIES LTDInventors: URI PERLMUTTER, OFIR SHALVI
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Publication number: 20090213653Abstract: A method for data storage in analog memory cells includes defining multiple programming states for storing data in the analog memory cells. The programming states represent respective combinations of more than one bit and correspond to respective, different levels of a physical quantity stored in the memory cells. The data is stored in the memory cells by applying to the memory cells programming pulses that cause the levels of the physical quantity stored in the memory cells to transition between the programming states, such that a given transition is caused by only a single programming pulse.Type: ApplicationFiled: February 19, 2009Publication date: August 27, 2009Applicant: ANOBIT TECHNOLOGIES LTDInventors: URI PERLMUTTER, SHAI WINTER, OFIR SHALVI, EYAL GURGI, NAFTALI SOMMER, OREN GOLOV
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Publication number: 20090199074Abstract: A method for operating a memory, which includes analog memory cells, includes encoding data with an Error Correction Code (ECC) that is representable by a plurality of equations. The encoded data is stored in a group of the analog memory cells by writing respective input storage values to the memory cells in the group. Multiple sets of output storage values are read from the memory cells in the group using one or more different, respective read parameters for each set. Numbers of the equations, which are satisfied by the respective sets of the output storage values, are determined. A preferred setting of the read parameters is identified responsively to the respective numbers of the satisfied equations. The memory is operated on using the preferred setting of the read parameters.Type: ApplicationFiled: February 3, 2009Publication date: August 6, 2009Applicant: ANOBIT TECHNOLOGIES LTD.Inventor: Naftali Sommer
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Publication number: 20090187803Abstract: A method includes receiving an Error Correction Code (ECC) code word, which includes multiple encoded bits that represent data and have a bit order. Multiple subsets of the encoded bits are selected using a selection criterion that does not sequentially follow the bit order. For each subset in at least some of the multiple subsets, the bits in the subset are inverted and the code word having the inverted bits is decoded, so as to reconstruct the data.Type: ApplicationFiled: January 19, 2009Publication date: July 23, 2009Applicant: ANOBIT TECHNOLOGIES LTD.Inventors: Micha Anholt, Ofir Shalvi
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Publication number: 20090168524Abstract: A method for operating a memory includes applying at least one pulse to a group of analog memory cells, so as to cause the memory cells in the group to assume respective storage values. After applying the pulse, the respective storage values are read from the memory cells in the group. One or more statistical properties of the read storage values are computed. A wear level of the group of the memory cells is estimated responsively to the statistical properties.Type: ApplicationFiled: December 25, 2008Publication date: July 2, 2009Applicant: Anobit Technologies Ltd.Inventors: Oren Golov, Eyal Gurgi, Dotan Sokolov, Yoav Kasorla, Shai Winter
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Publication number: 20090158126Abstract: A method includes storing data in a group of analog memory cells by writing first storage values to the cells. After storing the data, second storage values are read from the cells using one or more first read thresholds. Third storage values that potentially cause cross-coupling interference in the second storage values are identified, and the third storage values are processed, to identify a subset of the second storage values as severely-interfered values. Fourth storage values are selectively re-read from the cells holding the severely-interfered values using one or more second read thresholds, different from the first read thresholds. The cross-coupling interference in the severely-interfered storage values is canceled using the re-read fourth storage values. The second storage values, including the severely-interfered values in which the cross-coupling interference has been canceled, are processed so as to reconstruct the data stored in the cell group.Type: ApplicationFiled: December 11, 2008Publication date: June 18, 2009Applicant: ANOBIT TECHNOLOGIES LTDInventors: Uri Perlmutter, Yoav Kasorla, Oren Golov
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Publication number: 20090144600Abstract: A method for data storage includes storing data, which is encoded with an Error Correction Code (ECC), in a group of analog memory cells by writing respective first storage values to the memory cells in the group. After storing the data, respective second storage values are read from the memory cells in the group, and the read second storage values are processed so as to decode the ECC. Responsively to a failure in decoding the ECC, one or more of the second storage values that potentially caused the failure are identified as suspect storage values. Respective third storage values are re-read from a subset of the memory cells that includes the memory cells holding the suspect storage values. The ECC is re-decoded using the third storage values so as to reconstruct the stored data.Type: ApplicationFiled: November 26, 2008Publication date: June 4, 2009Applicant: ANOBIT TECHNOLOGIES LTDInventors: Uri Perlmutter, Naftali Sommer, Ofir Shalvi