Abstract: A method and apparatus for processing natural language and deducing meaning from a natural language input characterized by the steps of (a) receiving an ordered string of word objects having a natural language meaning, (b) selecting a word window length, and (c) successively moving the word window along the ordered string and analyzing the meaning of a substring of word objects that fall within the word window. The substring is removed from the ordered string if the substring has a recognized meaning, until all substrings of the ordered string that fit within the window have been analyzed. In a step (d), the word window length is reduced and step (c) is repeated until only an unrecognized residual of the ordered string remains. The meaning of the substring is analyzed by mapping the substring against a database using one or more mapping routines.

Abstract: The present invention, generally speaking, provides for transmission and flow control of real-time data streams over computer networks. A real-time data stream is transmitted in data packets from a data source in accordance with a predetermined protocol over a shared network, for example. Data packets of said real-time data stream are received at a data destination connected to the local area network. The data destination determines a suggested data rate for the data source based in part on a number of data packets lost during a preceding interval of time and transmits the suggested data rate to the data source. The suggested data rate is received at the data source, which adjusts its data rate of the in accordance with the suggested data rate. The rate adjustment mechanism is designed such that a network segment will not be overloaded with a single isochronous data stream connection and that a disproportionate shared of the network bandwidth is not consumed by the isochronous data stream connection.

Abstract: A bi-directional data path apparatus coupled between a first bus and a second bus for allowing a plurality of data transfering devices contained on either one of the buses to transfer data to the devices contained on the other bus. The data path apparatus includes latching stations designed to receive data from the first and second buses. The data path apparatus includes a plurality of byte lanes interconnecting the byte latching stations. A control mechanism directs the transfer of data along specific byte lanes and in a specific temporal order depending on the databus size of the devices sending and receiving data.

Abstract: An engine for the interactive delivery and presentation of multimedia data. The delivery mechanism is premised on a topic and panel metaphor. A topic is comprised of a series of panels. Each panel further defines the multimedia data which will be used when the panel is displayed. Each panel may also contain control and qualifier elements which are used to determine the next panel to be displayed. Control elements are used to solicit information from the user. The information is then used by the qualifier elements in determining the next panel to be displayed. Each element is stored in a database as a discrete object. This allows sharing of objects amongst different panels or topics. Prior to delivery and presentation of the data, the topic must be set-up. Set-up occurs by retrieving all the necessary panel, control qualifier and data descriptor objects. The actual data associated with multimedia data objects is only retrieved when the data is to be displayed.

Abstract: In a computer system which includes devices capable of writing data and generating addresses to which such data is to be written, a device to which data is directed, and address, data, and control lines connecting the devices capable of writing data and generating addresses to the device to which data is directed, apparatus for placing control signals in unused bit positions of data words, apparatus for sensing the control signals placed in the data words, and apparatus responsive to the control signals placed in the data words for modifying the use made of the data.

Abstract: An iterative method for calculating and positioning a rectangular balloon containing information in an interactive environment with sensitive areas. A balloon is positioned near, but not overlapping, the sensitive areas of a display screen and is sized based on the amount information to be displayed in the balloon. Each balloon has a body and a tip extending towards the sensitive area. The balloon's position and size is calculated by first initializing the balloon to a preferred variant. If the body does not fit entirely on the screen, a new tip orientation and body is selected while maintaining a golden ratio of height and width. In addition, a new body and tip orientation is selected that displays the largest amount of information if the body does not entirely fit on the display screen.

Abstract: Apparatus for switching data to a bus including apparatus for driving a bus to a first data receiving condition during a first clock period, apparatus for driving the bus to a second data awaiting condition during a second clock period, apparatus for releasing the bus from the second data awaiting condition during the second clock period, and apparatus for maintaining the bus in the second data awaiting condition.

Abstract: A method and apparatus for aligning an optical lens to the imaging array of an imaging system is disclosed. An integrated circuit die implements an imaging circuit and at least one z-height bump. An optical lens formed by injection molding has a lens portion for focusing an image onto the imaging circuit and an alignment portion for engaging the z-height bumps. A tape automated bonding tape carries the integrated circuit die and is aligned to the optical lens.

Abstract: The level shifter provides a selective voltage level shift to a common mode signal level on a twisted pair signal line. The level shift is selectively performed based upon the input level of the common mode voltage. The level shifter is advantageously employed in a low voltage circuit wherein lacking sufficient voltage head room to accommodate a constant common mode level shift. An exemplary embodiment is described wherein the level shifter is employed within a bus transceiver of a bus system employing IEEE P1394 bus protocol. In the exemplary embodiment, the selective level shift is applied only to bus signals occurring during an idle phase and an arbitration phase, with no level shift performed during a data phase.

Abstract: A technique is provided for substantially reducing clicks and pops caused by power cycling, in particular, the power cycling conservation strategy used in a portable computer. More specifically, an audio amplifier arrangement for a computer, in accordance with one embodiment of the present invention, includes a differential amplifier having a first input terminal, a second input terminal and an output terminal. A sound output connector may be connected to the output terminal through a signal path. First switching circuitry is responsive to a first mute signal for connecting together the first input terminal and the second input terminal through a low-impedance path. As a result, an output signal produced by the differential amplifier is essentially forced to zero. When power is removed from or applied to the differential amplifier, however, its behavior is not entirely predictable, and the output signal produced cannot be guaranteed to remain zero throughout the power-down transition.

Abstract: The use of a single metal mounting frame within an LCD assembly having an outer plastic housing provides for a thin, light, rigid, and less expensive LCD assembly. The metal mounting frame is coupled to a bezel and aligns an LCD panel between the bezel and the mounting frame. A backlighting assembly which provides illumination for the LCD panel is aligned by the mounting frame and the bezel and is aligned between the mounting frame and a plastic cover panel. The plastic cover panel couples to the bezel to form the outer housing of the LCD assembly.

Abstract: An integrated AC adapter and battery charger is disclosed. The apparatus comprises an AC adapter unit for converting AC power to a DC power and a battery charging apparatus coupled to the AC adapter unit for charging a battery pack. The battery charging apparatus further comprises a microcontroller for sensing the condition of the battery pack or tacks being charged, a memory for storing the proper charging profile for a number of different types of battery packs, and a charging current generator capable of generating a varying charging current based on the microcontroller's determination of the battery's condition and the charging profile stored in the memory.

Abstract: A CMOS differential twisted-pair driver which utilizes CMOS switches and current sources advantageously. No alternative power supply is required, the switches do not have to be low impedance and the device is low power. The preferred embodiment driver further limits signal overshoot and common mode energy. The signal transmission facility is bi-directional so an off state is provided. It is doubly terminated to provide for symmetry, improved bandwidth and reduces reflective signal noise. The double termination also provides for faster rise and fall times which reduces the systems sensitivity to receiver offset.

Abstract: A computer system for rendering text is provided. A keyboard is used to enter characters into the computer system. A character code corresponding to each entered character is generated. A particular font is chosen from a font table stored in memory. The font table contains a number of different fonts, with each font having a number of glyph indexes corresponding to a number of different glyphs. A character can have a plurality of different glyph indexes for a particular font. A processor maps the character code to a glyph index according to the selected font and later processes the glyph index. The glyph corresponding to the processed glyph index is then displayed.

Abstract: An adaptive data separator for detecting systematic differences between the arrivals of the rising and falling edges of a digital signal and for compensating for the difference. Data packets from a transmission source are prefixed with two data bits of known values. The data separator is also supplied with four clock signals per bit, one corresponding to an ideal rising edge and three following every 5 nanoseconds. The two prefix bits preceding a data packet are then sampled at each of the clock signals. Since all information in a given data packet undergoes the same systematic distortion, the logic of the adaptive data separator can determine the optimum clock signal to use in sampling each bit of data for the packet. Through several multiplexers the incoming data is then clocked to the optimal clock signal for sampling.

Abstract: The delay line separator extracts a clock signal from a combined data/clock encoded signal received over a serial data bus, despite the presence of significant duty cycle distortion. Such distortion affects the width of symbols within received data packets but does not affect the timing between successive rising edges within the received pulse string. To extract the clock signal from the distorted signal, the separator exploits a pre-filter circuit which generates 20-nanosecond pulses synchronized with each rising edge in the received signal. A 20-nanosecond pulse train is transmitted down a delay line having twelve delay elements. Circuits are connected to every other delay element within the delay line for generating 10-nanosecond pulses, synchronized with each rising edge of the pulse train. Outputs from the circuits are combined using an OR gate to yield a 10-nanosecond clock signal.

Abstract: A circuit for translating data in one of a plurality of data formats into data in any of the other of the plurality of the data formats including apparatus for storing data from a first number of input bytes of data, apparatus for selecting unused bytes from the first number of data bytes stored by the apparatus for storing data and from a second number of input bytes of data, apparatus for placing the unused bytes selected in numerical byte order, and apparatus for placing the data in the numerical byte order in byte position for transfer to the format of a destination device.