Abstract: A method of speech recognition which determines acoustic features in a sound sample; recognizes words comprising the acoustic features based on a language model, which determines the possible sequences of words that may be recognized; and the selection of an appropriate response based on the words recognized. Information about what words may be recognized, under which conditions those words may be recognized, and what response is appropriate when the words are recognized, is stored, in a preferred embodiment, in a data structure called a speech rule. These speech rules are partitioned according to the context in which they are active. When speech is detected, concurrent with acoustic feature extraction, the current state of the computer system is used to determine which rules are active and how they are to be combined in order to generate a language model for word recognition. A language model is dynamically generated and used to find the best interpretation of the acoustic features as a word sequence.

Abstract: The present invention provides a bus transceiver incorporating a high speed, binary transfer mode for the half-duplex transfer of data signals with a ternary control transfer mode having a full duplex dominant logic transmission scheme for the full duplex transfer of control signals. In one embodiment of the present invention, the above-noted transfer modes are implemented in a bus architecture which includes at least a first communications node coupled to a second communications node via a twisted pair, serial bus. Each node comprises first transceiver and second transceivers having a differential driver for driving on the bus signal states comprising first and second signal states having equal current amplitudes opposite in sign and a third signal state having approximately a zero current amplitude, a high speed binary receiver for receiving high speed data signals during data transfer phases and a ternary receiver for receiving control signals during control transfer phases.

Abstract: A special purpose modular connector comprising a generally rectangular housing having a central body portion and two extending side arm portions. A plurality of electrical contacts are disposed within the body and arm portions. Slots at a front end of each portion of the housing expose a terminal end of each electrical contact. Openings in the rear portions of the housing allow connection of cables or other types of component wiring to the contacts. A locking tab is formed at the underside of the housing and functions to align and securely connect the special purpose modular connector with a correspondingly modified receptacle.

Abstract: This invention provides a method for compositing a source image and a destination image using a mask image to produce a result image in a digital image processing system. The method is, on a pixel-by-pixel basis, using the mask image to select between the source and destination images: where a black color value for a mask pixel selects the color value of the corresponding pixel of the source image; and a white color value for a mask pixel selects the color value of the corresponding pixel of the destination image; and where an intermediate color value for a mask pixel selects a weighted average between source and destination pixel color values. The calculations of the weighted average color value are done in color space, such as on a color component by color component basis. The result image can be displayed or stored for further use. This method can be described in boolean expression according to the formula:result=((1-mask)*source)+(mask*destination).

Abstract: This invention relates to an apparatus and method for reducing the transmission of data on a data communications network by obtaining data from a cache rather than by transmitting the data. This method maintains an indexed cache of data from previous transmissions. Then, when duplicate information is to be transmitted, it can be replaced by a flag and an index to the cached data. This reduces the amount of data to be transmitted and increases the apparent rate of transfer.

Abstract: A data compression process and system that identifies the data type of an input data stream and then selects in response to the identified data type at least one data compression method from a set of data compression methods that provides an optimal compression ratio for that particular data type, thus maximizing the compression ratio for that input data stream. Moreover, the data compression process also provides means to alter the rate of compression during data compression for added flexibility and data compression efficiency. Furthermore, a system memory allocation process is also provided to allow system or user control over the amount of system memory to be allocated for the memory intensive data compression process. System memory allocation process estimates the memory requirement to compress the input data stream, and allocates only that amount of system memory as needed by the data compression for memory allocation efficiency.

Abstract: A method for bonding together liquid crystal cells using a transparent grease. The grease maintains a level of viscosity appropriate for physically bonding the cells while matching the indices of refraction of the cells or cell layers for proper optical coupling.

Abstract: A circuit for generating programmable interrupt signals including apparatus for counting the individual rows of signals being displayed by an output display, apparatus for selectively storing a signal indicating a particular row, apparatus for determining when the signal counted by the apparatus for counting the individual rows of signals and the signal stored by the apparatus for selectively storing a signal indicating a particular row are equal, and apparatus for producing an interrupt signal when the signal counted by the apparatus for counting the individual rows of signals and the signal stored by the apparatus for selectively storing a signal indicating a particular row are equal.

Abstract: A circuit for providing the function of a dual port FIFO circuit including a first bank of single port random access memory, a second bank of single port random access memory, apparatus for sequentially writing every other piece of sequential data to an alternate one of the first and second [memory] banks of single port memory, and apparatus for simultaneously reading the earliest written piece of sequential data from the one [each] of the first and second [memory] banks of single port memory not being written during the period data is being written to the other of the [memory] banks of single port memory. By using two banks of single port memory, the cost of dual port memory typically used for a FIFO circuit is substantially reduced.

Abstract: A digital still image camera having a memory means functioning as a ring buffer. Image and sound acquisition and storage begins upon a first command signal from the camera's operator and continues at a defined rate until the operator generates a second command signal. During the time period between the first and second command signal, images are taken and stored at the defined rate, the newest image overwriting the oldest image within the ring buffer after the ring buffer is initially filled. After generating the second command signal, the operator can review the contents of the ring buffer on a display and speaker incorporated into the camera, selecting those images and sounds the operator wishes to store permanently, and then directing that the selected images and sounds be placed in the camera's long term storage memory.

Abstract: A method and apparatus for instantaneously and discontinuously moving the cursor in a computer system to any one of a plurality of user-selected screen positions is disclosed. In many known computer systems, a cursor control device known as a mouse is used to move and manipulate the position of the display's cursor. In a first preferred embodiment of the present invention, X- and Y-axis position sensing means are incorporated into the mouse's known electronics. A program correlates a plurality of X- and Y-axis mouse positions with a plurality of cursor positions on the display. When the computer user moves the cursor control device into any one of these programmed positions, the cursor on the display automatically moves to the predetermined position.

Abstract: A method for correcting recognized words in a computer system including the steps or: (a) entering an ink object into a computer system with a pointing device; (b) recognizing the ink object as a word object; (c) displaying the word object on a display of the computer system; (d) detecting a correction request made by a user pertaining to the displayed word object; and (e) displaying a list of alternative words for the word object on the display. Preferably, the list of alternative words includes a shifted-case version of the word object, a number of alternative words provided by a word recognizer, and the original ink object that was entered into the computer system. A user can select one of these alternative words to replace the misrecognized word object. Alternatively, a user may enter a word into the computer system by means of a keyboard image to replace the original word object with the newly entered word.

Abstract: Graphics tablet scanning and error reduction. Errors are detected and reduced by reading a plurality of points, sorting the points, and selecting the median point. Errors are detected and reduced by comparing the range of lowest to highest points with a preset limit and signaling an error if the limit is exceeded. Errors are detected and reduced in a resistive tablet by placing a load resistance on the output of the tablet and comparing the output voltage with predetermined limits, characterizing the contact area into valid and invalid contacts.

Abstract: A method for 5-bit chunk encoding of bit serial data by a data processor handling data in 8-bit byte segments, the method comprising the steps of:setting a bit shift counter (bsc) to zero;receiving data from the bit serial data to be stored into 8-bit bytes, such that at least two 8-bit bytes are available, the bit serial data stored in the 8-bit bytes from the most-significant bit to least significant bit;shifting left the data in the first byte, by the value of the bsc;encoding the data contained in the first two bytes in two 5-bit chunks;incrementing the bsc by an increment of 2, and if the bsc is then equal to 8, resetting it to zero;offsetting the data to the next whole byte boundary of the 8-bit byte data, dropping already processed bytes; andso long as there is data, repeating the steps of receiving, shifting, incrementing, and offsetting.

Abstract: An electrical connector system which includes a socket shell member and a plug shell member that mate to establish electrical connection between them. Each shell member has a detent device and these detent devices can engage with each other when the plug shell member is inserted into the socket shell member so as to releasably keep the plug and socket shell members in the electrically connected position. The detent devices have front-ends with sharp points or edges which are capable of attracting electrostatic discharge.

Abstract: An apparatus for emulation routine instruction issue comprises a bus signal router, a state machine, a virtual program counter (VPC) circuit, an emulated program counter (EPC), a summing circuit, an opcode storage register, and a pointer storage register. The VPC circuit maintains the VPC value under the direction of the state machine. In response to a next instruction request issued by the central processing unit (CPU), the state machine outputs the VPC to an instruction address bus, transferring the host instruction stored at the address indicated by the VPC to the instruction bus for issue to the CPU. After a next host instruction request, the state machine updates the VPC value. Concurrent with the execution of the current emulation routine, the state machine prefetches the nest emulation routine pointer (NERP) by issuing DMA commands and commands to the EPC, the opcode storage means, and the pointer storage means.

Abstract: A method and apparatus for generating and observing a transition between a first and second sequence of information. The invention is practiced on a computer controlled display system and a computer controlled sound generation system. The method includes providing the first stream and the second stream of information to the computer system; creating a template for modifying an audio signal during a transition from the first stream of information to the second stream of information; specifying the duration of the transition and specifying at least a portion of the first stream and a portion of the second stream for the transition; creating an audio transition using the audio template for modifying an audio signal and using the portion of the first stream and the portion of second stream.

Abstract: A method and apparatus for aligning an optical lens to the imaging array of an imaging system is disclosed. An integrated circuit die implements an imaging circuit and at least one z-height bump. An optical lens formed by injection molding has a lens portion for focusing an image onto the imaging circuit and an alignment portion for engaging the z-height bumps. A tape automated bonding tape carries the integrated circuit die and is aligned to the optical lens.

Abstract: Preamplifying circuitry amplifies sound signals for input into a computer system. A first stage common-emitter amplifier provides high-gain amplification of the input signal, while a second stage amplifier comprising an operational amplifier is suitable for driving a cable with the amplified sound signal. A low-cost constant voltage source comprising a diode and an operational amplifier supplies a voltage reference to both amplifier stages with a very high rejection of system noise. The circuitry and methods of the present invention provide a low-cost, easily manufactured preamplifier suitable for sound input in desktop computing devices.

Abstract: A frame buffer operating in fast page access mode with improved performance for operations such as scrolling and moving which typically access different display memory rows. The present invention utilizes a row/bank interleaved scheme of multiple display memory banks in the frame buffer such that each display memory bank supports a different set of non-contiguous display rows thus increasing the odds of display memory access in-page hits and decreasing the odds of display memory access in-page misses.