Abstract: A polarizing fiber-optic layer for use within a liquid crystal multilayer structure, particularly for use in a computer system having a liquid crystal display screen. The invention relates to a specially designed thin polarizing fiber-optic layer which functions both as a polarizer of light in a specific direction and as a fiber-optic material for optically resolving an image to its surface from a position optically below the fiber-optic material layer. Using this double functioning material the problems of off axis viewing, contrast (and color) distortion and parallax can be solved in flat panel displays. This inventive layer replaces several complex layers of a conventional liquid crystal display thereby greatly simplifying display manufacture and improving performance.

Abstract: A circuit for reducing extremely low frequency (ELF) electric fields on cathode ray robe (CRT) devices comprises a power supply means, a CRT, a voltage sensing means, an amplification means, and a capacitive coupling within a feedback path to the CRT. A CRT anode voltage variation sensed by the voltage sensing means is amplified and inverted by the amplification means, producing a signal which is applied to the capacitive coupling within the feedback path. This signal modifies the impedance at the CRT anode, decreasing the voltage variation and thereby reducing ELF electric field magnitudes.

Abstract: A method and apparatus for generating perspective views of a scene. With a viewing position at the center of to be cylindrical environment map, different views can be obtained by rotating the viewing direction either horizontally or vertically. The horizontal construction method of the present invention generally involves the steps of: determining the portion of the cylindrical map to be viewed; vertically interpolating pixel values in the portion of the cylindrical map to be viewed and mapping to a viewing plane; and displaying the viewing plane. The vertical construction method of the present invention generally involves the steps of: determining the portion of the cylindrical map to be viewed; vertically interpolating pixel values in the portion of the cylindrical map robe viewed and mapping to a vertical plane; horizontally interpolating pixel values in the vertical plane and mapping to the viewing plane; and displaying the viewing plane.

Abstract: A node identification system is described for use in a computer system in which the various components of the system are interconnected via nodes on a communications bus. Once the topology of the nodes has been resolved into an acyclic directed graph, each node may be assigned a non-predetermined unique address. Each node having a plurality of ports has an apriori assigned priority for port selection. Each child node connected to a parent is allowed to respond in the predetermined sequence depending upon the port through which it is connected to its parent. Each node in the graph will announce its presence according to its location in the graph. Each receives an address incremented from the previous addresses assigned, thereby insuring uniqueness. The same mechanism may be implemented to allow each node in turn to broadcast information on the bus concerning the parameters of its local host.

Abstract: A modular enclosure for personal computer systems substantially comprises a 5-sided steel chassis, a plastic subassembly tray, a plastic detachable back panel, and a 4-sided plastic top cover including an integrally formed front panel. The internal subassembly tray comprises appropriately formed bays designed to receive various system subassemblies, each bay having an integrally formed subassembly retaining means to bear against and retain a subassembly placed in the bay. Top side and rear electromagnetic interference (EMI) shields are fitted and secured to the interior portions of the plastic topcover and rear panel so as to peripherally contact the chassis when the topcover and rear panel are installed. The internal subassembly tray is lowered into the interior region of the chassis and snapped into place at the front portion thereof. The rear panel is then positioned and secured to the chassis.

Abstract: An instruction mapping system comprises an instruction mapping circuit, a central processing unit (CPU), a data cache, and a memory. The address outputs of the CPU are coupled to a first address bus, while the address inputs of the data cache and memory are coupled to a second address bus. The instruction mapping circuit's address inputs are coupled to the first address bus, and the instruction mapping circuit's outputs are coupled to the second address bus. The CPU sends a pointer address via the first address bus to the instruction mapping circuit. The instruction mapping circuit determines whether the pointer address indicates that the next source instruction is within the subset of most frequently executed source instructions. If so, the instruction mapping circuit maps the pointer address to an address within the data cache. If not, the pointer address is routed through the instruction mapping circuit unchanged.

Abstract: An apparatus and method for imaging using context sensitive pixel modulation wherein a modulator dynamically examines the neighboring pixels to the current pixel being imaged and uses the neighboring pixel information in determining the specific modulation pattern for the current pixel.

Abstract: A memory management unit (MMU) having cross-domain control for controlling a CPU's right to access a memory in order to initiate performance of an operation. The MMU includes a translator for translating a virtual address issued by the CPU into a physical address, a data domain number (DDN) and an address domain number (ADN) both corresponding to a domain (a portion of the virtual address space), and a permission. The MMU further includes an environment controller for determining if the ADN corresponding to the operation is allowed access by the CPU. The translator includes an address translation unit (ATU), a data translation unit (DTU), translation table lookup logic, and permission control logic. The ATU generates the physical address, the ADN, and the permission from the virtual address. The DTU generates the DDN of tagged data specified by the CPU if the tagged data is a pointer. The TTLL supplies entry information to the ATU and DTU.

Abstract: Partitioning speech recognition rules for generation of a current language model and interpretation in a speech recognition system. Contexts for each of speech recognition rules are determined when each of the speech rules will be active. At one interval (e.g. initialization of the system), common contexts for the speech rules are determined and grouped or partitioned into speech rule sets according to these common contexts. Rapid and efficient generation of a language model upon the detection of a current context at a second interval (e.g. upon the detection of speech in one embodiment) then may be performed. Subsequent to the generation of the language model, interpretation may be performed using the speech recognition rules grouped into these common contexts.

Abstract: A method for deducing user intent and providing computer implemented services characterized by the steps of: a) noticing a significant new event occurring within the computer system; b) deducing an intent from the significant new event and from the context in which the new event occurred; and c) providing a service based upon the new event and its context. Significant events are those which the computer might be able to assist a user, and can be determined by matching the event into a database of recognizable events to make a significant observation. The deduction step takes a delimited set of significant observations and attempts to match the set against a number of intent templates. If there are multiple matches to the intent templates, the matches are ranked and a best guess is made to determine a deduced intent. Service is provided fulfilling all preconditions of a plan associated with the deduced intent, and by sequentially executing the steps of the plan.

Abstract: In a computer system having a digital signal processor for processing a number of tasks within a frame, a method for handling a frame overrun wherein the tasks cannot be processed within the frame. First, the frame overrun is detected. Next, each of the tasks are compared with a processing time which had been allocated to it. A determination is made as to which of these tasks had exceeded its allotted processing time by the greatest amount. The worst case client is notified that its task has caused an overrun. All other non-system task clients are notified that a overrun has occurred. All but system support tasks are inactivated, and processing continues. Each client must determine the correct action to take, including restarting the tasks where they left off, restarting from the beginning, or quitting. Methods for handling more serious overruns are also described.

Abstract: A special purpose modular receptacle comprises a generally rectangular housing having an opening which exposes a cavity within the housing. A plurality of electrical contacts are disposed within the cavity of the housing. Terminal ends of the contacts electrically connect to corresponding contacts on a standard modular connector or a modified modular connector inserted into the cavity. The contacts are exposed at a lower rear portion of the housing allowing connection between the contacts and a printed circuit board. Attachment means allow physical and electrical connection of the housing to a printed circuit board. A guiding means may be present as a modular connector insertion aid.

Abstract: A method and apparatus for determining whether an alias (or entity name) is available for use in a communication system. A transmitting node or entity transmits a first signal including the alias over the communication system. The alias includes a zone name. If the transmitting node receives a reply signal to the first signal, then the alias is not available for use. Otherwise the alias is available for use. The transmitting node transmits the first signal to a first router connected to a first local network of the communication system. The first router forwards a second signal including the entity name from the first signal to other routers in the network until a second router connected to nodes having the zone name in the entity name is located. Each second router translates the second signal into a third signal which includes the alias, and using a first zone multicast address, multicasts the third signal to a first set of nodes.

Abstract: A computer system having speech recognition functionality, a display screen, a microphone, and a mouse having pointer and voice buttons. The voice button located on the mouse is used to turn the microphone "on" and "off". The voice button in conjunction with the mouse are used to signal the computer to display the recognized spoken command. The pointer button located on the mouse is used to provide a standard "point and click" function so that a user can select text or object(s) on the display screen. The computer will apply recognized spoken commands only to the restricted selection. Voice icons are used to aid in the correction of any erroneous interpretation by the speech recognizer circuitry within the computer. A list of alternative commands are displayed in menu format associated with each icon so that the user can use the voice button and mouse to select the desired correct command. The computer then automatically corrects the erroneous interpretation.

Abstract: A computer implemented apparatus and method for modifying the playback rate of a previously stored audio or voice data file stored within a computer system without altering the pitch of the audio data file as originally stored. The present invention also maintains a high level of sound quality during playback. The present invention includes a double buffering system in order to perform all of the desired calculations in real time. A time stretching technique is employed upon the audio data file to decrease or increase playback rate which creates audio segments requiring joining processing. Junctions are smoothed by employing a cross-fade amplitude envelope filter and a compressor/limiter is used to maintain filter range. The system may operate on a desktop computer allowing for advantageous playback and audio data management options of stored voice and or sound data.

Abstract: A method and apparatus for providing multiple clients simultaneous access to a sound input/output (I/O) data stream. The present invention provides a method and apparatus for providing multiple programming data structures and multiple patch points in a list, in which each of the patch points are positioned relative to at least one of the programming data structures and is capable of receiving at least one programming data structure for insertion into the list to perform a function. The present invention also includes a method and apparatus for providing at least one buffer for inputting the data stream into and/or receiving the data stream output from each of inserted programming structures, such that each inserted structure can access and operate on the data stream. In this way, multiple clients can access and process the data stream transparently, without interfering with the operation of other clients, yet affecting the sound stream in the desired way.

Abstract: The present invention provides a method and apparatus for transmitting NRZ data signals across an interface comprising an isolation barrier disposed between two devices interconnected via a bus. The apparatus comprises a signal differentiator for receiving an NRZ data signal and outputting a differentiated signal. A driver comprising a tri-state gate has as a first input the data signal and as a second input the differentiated signal for enabling the tri-state gate when the differentiated signal is high. A bias voltage is applied to an output of the tri-state gate to derive as output a transmission signal for transmission via the bus across the interface between the two devices.