Abstract: A circuit for generating programmable interrupt signals including apparatus for counting the individual rows of signals being displayed by an output display, apparatus for selectively storing a signal indicating a particular row, apparatus for determining when the signal counted by the apparatus for counting the individual rows of signals and the signal stored by the apparatus for selectively storing a signal indicating a particular row are equal, and apparatus for producing an interrupt signal when the signal counted by the apparatus for counting the individual rows of signals and the signal stored by the apparatus for selectively storing a signal indicating a particular row are equal.

Abstract: A circuit for providing the function of a dual port FIFO circuit including a first bank of single port random access memory, a second bank of single port random access memory, apparatus for sequentially writing every other piece of sequential data to an alternate one of the first and second [memory] banks of single port memory, and apparatus for simultaneously reading the earliest written piece of sequential data from the one [each] of the first and second [memory] banks of single port memory not being written during the period data is being written to the other of the [memory] banks of single port memory. By using two banks of single port memory, the cost of dual port memory typically used for a FIFO circuit is substantially reduced.

Abstract: A method and apparatus for instantaneously and discontinuously moving the cursor in a computer system to any one of a plurality of user-selected screen positions is disclosed. In many known computer systems, a cursor control device known as a mouse is used to move and manipulate the position of the display's cursor. In a first preferred embodiment of the present invention, X- and Y-axis position sensing means are incorporated into the mouse's known electronics. A program correlates a plurality of X- and Y-axis mouse positions with a plurality of cursor positions on the display. When the computer user moves the cursor control device into any one of these programmed positions, the cursor on the display automatically moves to the predetermined position.

Abstract: Graphics tablet scanning and error reduction. Errors are detected and reduced by reading a plurality of points, sorting the points, and selecting the median point. Errors are detected and reduced by comparing the range of lowest to highest points with a preset limit and signaling an error if the limit is exceeded. Errors are detected and reduced in a resistive tablet by placing a load resistance on the output of the tablet and comparing the output voltage with predetermined limits, characterizing the contact area into valid and invalid contacts.

Abstract: A digital still image camera having a memory means functioning as a ring buffer. Image and sound acquisition and storage begins upon a first command signal from the camera's operator and continues at a defined rate until the operator generates a second command signal. During the time period between the first and second command signal, images are taken and stored at the defined rate, the newest image overwriting the oldest image within the ring buffer after the ring buffer is initially filled. After generating the second command signal, the operator can review the contents of the ring buffer on a display and speaker incorporated into the camera, selecting those images and sounds the operator wishes to store permanently, and then directing that the selected images and sounds be placed in the camera's long term storage memory.

Abstract: A method for correcting recognized words in a computer system including the steps or: (a) entering an ink object into a computer system with a pointing device; (b) recognizing the ink object as a word object; (c) displaying the word object on a display of the computer system; (d) detecting a correction request made by a user pertaining to the displayed word object; and (e) displaying a list of alternative words for the word object on the display. Preferably, the list of alternative words includes a shifted-case version of the word object, a number of alternative words provided by a word recognizer, and the original ink object that was entered into the computer system. A user can select one of these alternative words to replace the misrecognized word object. Alternatively, a user may enter a word into the computer system by means of a keyboard image to replace the original word object with the newly entered word.

Abstract: A method for 5-bit chunk encoding of bit serial data by a data processor handling data in 8-bit byte segments, the method comprising the steps of:setting a bit shift counter (bsc) to zero;receiving data from the bit serial data to be stored into 8-bit bytes, such that at least two 8-bit bytes are available, the bit serial data stored in the 8-bit bytes from the most-significant bit to least significant bit;shifting left the data in the first byte, by the value of the bsc;encoding the data contained in the first two bytes in two 5-bit chunks;incrementing the bsc by an increment of 2, and if the bsc is then equal to 8, resetting it to zero;offsetting the data to the next whole byte boundary of the 8-bit byte data, dropping already processed bytes; andso long as there is data, repeating the steps of receiving, shifting, incrementing, and offsetting.

Abstract: An electrical connector system which includes a socket shell member and a plug shell member that mate to establish electrical connection between them. Each shell member has a detent device and these detent devices can engage with each other when the plug shell member is inserted into the socket shell member so as to releasably keep the plug and socket shell members in the electrically connected position. The detent devices have front-ends with sharp points or edges which are capable of attracting electrostatic discharge.

Abstract: An apparatus for emulation routine instruction issue comprises a bus signal router, a state machine, a virtual program counter (VPC) circuit, an emulated program counter (EPC), a summing circuit, an opcode storage register, and a pointer storage register. The VPC circuit maintains the VPC value under the direction of the state machine. In response to a next instruction request issued by the central processing unit (CPU), the state machine outputs the VPC to an instruction address bus, transferring the host instruction stored at the address indicated by the VPC to the instruction bus for issue to the CPU. After a next host instruction request, the state machine updates the VPC value. Concurrent with the execution of the current emulation routine, the state machine prefetches the nest emulation routine pointer (NERP) by issuing DMA commands and commands to the EPC, the opcode storage means, and the pointer storage means.

Abstract: A method and apparatus for generating and observing a transition between a first and second sequence of information. The invention is practiced on a computer controlled display system and a computer controlled sound generation system. The method includes providing the first stream and the second stream of information to the computer system; creating a template for modifying an audio signal during a transition from the first stream of information to the second stream of information; specifying the duration of the transition and specifying at least a portion of the first stream and a portion of the second stream for the transition; creating an audio transition using the audio template for modifying an audio signal and using the portion of the first stream and the portion of second stream.

Abstract: A method and apparatus for aligning an optical lens to the imaging array of an imaging system is disclosed. An integrated circuit die implements an imaging circuit and at least one z-height bump. An optical lens formed by injection molding has a lens portion for focusing an image onto the imaging circuit and an alignment portion for engaging the z-height bumps. A tape automated bonding tape carries the integrated circuit die and is aligned to the optical lens.

Abstract: Preamplifying circuitry amplifies sound signals for input into a computer system. A first stage common-emitter amplifier provides high-gain amplification of the input signal, while a second stage amplifier comprising an operational amplifier is suitable for driving a cable with the amplified sound signal. A low-cost constant voltage source comprising a diode and an operational amplifier supplies a voltage reference to both amplifier stages with a very high rejection of system noise. The circuitry and methods of the present invention provide a low-cost, easily manufactured preamplifier suitable for sound input in desktop computing devices.

Abstract: A frame buffer operating in fast page access mode with improved performance for operations such as scrolling and moving which typically access different display memory rows. The present invention utilizes a row/bank interleaved scheme of multiple display memory banks in the frame buffer such that each display memory bank supports a different set of non-contiguous display rows thus increasing the odds of display memory access in-page hits and decreasing the odds of display memory access in-page misses.

Abstract: A diagnostic apparatus for testing devices such as computer systems, and computer system components such as disk drives or printers. The device comprises a main unit, the main unit having a central processing unit for executing instructions, issuing commands, and receiving data from a first device. The apparatus also has a first peripheral unit coupled to the main unit, the first peripheral unit having ports for interfacing with the first device, the first peripheral unit being interchangeable with a second peripheral unit for interfacing with a second device. The apparatus also comprises a first non-volatile memory unit coupled to the main unit, the first non-volatile memory unit comprising a first set of tests for the first device, the first non-volatile memory unit being interchangeable with a second non-volatile memory unit comprising a second set of tests for a second device. These interchangeable parts are provided so that the user may test various types of hardware.

Abstract: A filter capable of having its damping and frequency parameters independently varied. The filter can be represented in either a digital or an analog computation network. The network comprises four multipliers for multiplying by a frequency term twice and a damping factor twice. In addition, the network comprises two unit delay blocks for temporarily storing previous signal input values for zeros or output values for poles. These stored values are used in computing subsequent outputs. The multipliers are configured with adders and subtractors to compute a next output value as a combination of a current input, a weight -2+2df+f.sup.2 --wd.sup.2 f.sup.2 times the most recent saved value and a weight 1-2df+wd.sup.2 f.sup.2 times the previous saved value. Moreover, unity gain at DC can be achieved.

Abstract: A method and apparatus for generating and viewing a transition between a first and second sequence of images on a computer controlled display system.

Abstract: Electronic paper which has two sides, reverse of one another, which can be flipped over in response to user generated flip commands is described. When a piece of electronic paper is flipped over, a number of transition views of the paper are generated to give the user the impression that the paper is actually being turned over to reveal a reverse side. Different information can be stored on either side, and the composition of either side can be linked so that changes made to the graphic information on one side affects the graphic information on the other side. In addition, when the amount of graphic information on the reverse side of the paper exceeds the amount of available space normally available on the reverse side when the paper is flipped over, approximately the same amount of space available on the top side, the reverse side is expanded to fit the quantity of information to be displayed on the reverse side.

Abstract: Method and apparatus for accurately determining the charge state of a battery is disclosed. The charge state is derived from the battery voltage, which is corrected for errors introduced by temperature and series resistance. Error from series resistance is minimized by either making an open circuit voltage measurement, or by making a plurality of voltage measurements under known load conditions, calculating the series resistance from these measurements, and calculating an equivalent open circuit voltage, compensating for the voltage drop caused by the series resistance of the battery. Errors introduced by temperature induced shifts in battery voltage are corrected by reading the battery temperature and correcting the battery voltage to a reference temperature. The battery voltage corrected for temperature and series resistance effects is used to compute charge state by table look up or algebraically.

Abstract: A memory system where a cache miss is fielded with a retry access to main memory, but instead of waiting for the microprocessor to resynchronize and re-initiate the memory cycle, the memory cycle is started immediately. The speed of the tag array is specified so that the status of the cache, hit or miss, is known at the same time that the microprocessor's memory cycle start signal is known to be valid. The addresses are then latched and the memory cycle is started in anticipation of the retried cycle. The access time of memory is then overlapped with microprocessor resynchronization and memory cycle reinitialization. By using this technique, clock cycles are needed for the initial cycle, additional clock cycles are needed to perform the resynchronization, and additional clock cycles are needed for the retried cycle since the data is already waiting from memory. The above-described improvement is implemented by decoupling the direct connection of the memory array from the address bus.