Abstract: A method for forming a nanosheet device. The method may include providing a heterostructure device stack above a semiconductor substrate. The method may include patterning the heterostructure device stack to define a dummy gate region, and before forming a source drain recess adjacent the dummy gate region, selectively removing a first set of sacrificial layers of the heterostructure device stack within the dummy gate region.

Abstract: A method and apparatus for measuring a temperature of a substrate located in a semiconductor processing environment is disclosed. The substrate has a top surface and an edge surface, and is positioned in a prescribed location within the semiconductor processing environment. An infrared camera oriented to view one side of the edge surface of the substrate is triggered to obtain an infrared image of the one side of the edge surface of the substrate. The infrared image is processed to obtain a temperature profile of the substrate.

Abstract: A method of post-treating a silicon nitride (SiN)-based dielectric film formed on a surface of a substrate includes positioning a substrate having a silicon nitride (SiN)-based dielectric film formed thereon in a processing chamber, and exposing the silicon nitride (SiN)-based dielectric film to helium-containing high-energy low-dose plasma in the processing chamber. Energy of helium ions in the helium-containing high-energy low-dose plasma is between 1 eV and 3.01 eV, and flux density of the helium ions in the helium-containing high-energy low-dose plasma is between 5×1015 ions/cm2·sec and 1.37×1016 ions/cm2·sec.

Abstract: A metal gate stack on a substrate comprises: an interfacial layer on the substrate; a high-? metal oxide layer on the interfacial layer, the high-? metal oxide layer comprising a dipole region adjacent to the interfacial layer, the dipole region comprising niobium (Nb); a high-? metal oxide capping layer on the high-? metal oxide layer; a positive metal-oxide-semiconductor (PMOS) work function material above the high-? metal oxide capping layer; and a gate electrode above the PMOS work function material. The dipole region is formed by driving Nb species of a Nb-based film into the high-? metal oxide layer to form a dipole region.

Abstract: Described are apparatus and methods for processing a semiconductor wafer so that the wafer remains in place during processing. The wafer is subjected to a pressure differential between the top surface and bottom surface so that sufficient force prevents the wafer from moving during processing, the pressure differential generated by applying a decreased pressure to the back side of the wafer.

Abstract: A robot apparatus is configured to extend a first end effector into a first process chamber and extend a second end effector into a second process chamber. The first process chamber and the second process chamber are separated by a first pitch. The robot apparatus is further configured to retract the first end effector and the second end effector into a rectangular mainframe while maintaining a distance between the substrates bounded by the first pitch throughout a retraction process, and fold the first end effector and the second end effector inward within a sweep diameter defined by a width of the rectangular mainframe.

Abstract: Embodiments of the present disclosure generally relate to an apparatus and method of processing a substrate. In at least one embodiment, an apparatus includes a chamber body, a substrate support assembly and a bracket assembly disposed outside the chamber body and coupled to the substrate support assembly. The bracket assembly has a plurality of leveling screws for adjusting a level of the substrate support assembly. The apparatus includes an actuator coupled to one of the plurality of leveling screws and an accelerometer coupled to the substrate support assembly. The accelerometer is configured to indicate an orientation of the substrate support assembly. The apparatus includes a control module in communication with the actuator and the accelerometer. The control module is configured to determine the level of the substrate support assembly based on the orientation indicated by the accelerometer and adjust the level of the substrate support assembly using the actuator.

Abstract: A pre-heat ring and a process chamber having the same are described herein. In one example, a process chamber for film deposition comprises a chamber volume, a substrate support disposed in the chamber volume, the substrate support having a radially outward surface, and a pre-heat ring surrounding the substrate support. The pre-heat ring comprises a tapered wall facing the radially outward surface. The tapered wall narrows towards a top surface of the pre-heat ring and towards the substrate support.

Abstract: Embodiments of this disclosure relate to methods for removing a dummy material from under a superlattice structure. In some embodiments, after removing the dummy material, it is replaced with a bottom dielectric isolation layer beneath the superlattice structure.

Abstract: Exemplary semiconductor processing methods may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include forming a plasma of the silicon-containing precursor in the processing region. The plasma may be at least partially formed by a pulsing RF power operating at less than or about 2,000 W. The methods may include forming a layer of silicon-containing material on the substrate. The layer of silicon-containing material may be characterized by a dielectric constant less than or about 3.0.

Abstract: Exemplary semiconductor processing methods may include providing an oxygen-containing precursor and a sulfur-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be housed in the processing region. A layer of carbon-containing material may be disposed on the substrate. The methods may include forming plasma effluents of the oxygen-containing precursor and the sulfur-containing precursor. The methods may include contacting the substrate with the plasma effluents of the oxygen-containing precursor and the sulfur-containing precursor. The contacting may etch a feature in the layer of carbon-containing material. A chamber operating temperature may be maintained at less than or about 0° C.

Abstract: Exemplary methods of semiconductor processing may include providing a treatment precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region. The methods may include contacting a surface of the substrate with the treatment precursor. The methods may include providing deposition precursors to the processing region. The deposition precursors may include a metal-containing precursor. The methods may include forming plasma effluents of the deposition precursors. The methods may include contacting the substrate with the plasma effluents of the deposition precursors. The contacting may deposit a metal-containing hardmask on the substrate.

Abstract: Exemplary flexible coverlenses and the methods of making them are described. The methods may include exposing a surface of a substrate layer to a surface treatment plasma to form a treated surface of the substrate layer. A silicon-containing adhesion layer may be deposited on the treated surface of the substrate layer. A silane-containing adhesion promoter may be incorporated on the silicon-containing adhesion layer. The method may also include forming a hardcoat layer on the silicon-containing adhesion layer, where the silane-containing adhesion promoter is bonded to both the hardcoat layer and the silicon-containing adhesion layer. The exemplary flexible coverlenses made by the present methods are less susceptable to folding fatigue along a bending or folding axis of the coverlens.

Abstract: Apparatus and methods for loading and unloading substrates from a spatial processing chamber are described. A support assembly has a rotatable center base and support arms extending therefrom. A support shaft is at the outer end of the support arms and a substrate support is on the support shaft. Primary lift pins are positioned within openings in the substrate support. Secondary lift pins are positioned within openings in the support arms and are aligned with the primary lift pins. An actuation plate within the processing volume causes, upon movement of the support assembly, the primary lift pins to elevate through contact with the secondary lift pins.

Abstract: Exemplary semiconductor processing systems may include a chamber body including sidewalls and a base. The chamber body may define an interior volume. The systems may include a substrate support extending through the base of the chamber body. The substrate support may be configured to support a substrate within the interior volume. The systems may include a faceplate positioned within the interior volume of the chamber body. The faceplate may define a plurality of apertures through the faceplate. The systems may include a leveling apparatus seated on the substrate support. The leveling apparatus may include a plurality of piezoelectric pressure sensors.

Abstract: Exemplary semiconductor processing methods may include providing a fluorine-containing precursor and a carbon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be housed in the processing region. A layer of oxygen-containing material may be disposed on the substrate. The methods may include forming plasma effluents of the fluorine-containing precursor and the carbon-containing precursor. The methods may include contacting the substrate with the plasma effluents of the fluorine-containing precursor and the carbon-containing precursor. The contacting may etch a feature in the layer of oxygen-containing material. A semiconductor processing chamber operating temperature may be maintained at less than or about 0° C. during the semiconductor processing method.

Abstract: A method of plating substrates may include placing a substrate in a plating chamber comprising a liquid, and applying a current to the liquid in the plating chamber to deposit a metal on exposed portions of the substrate, where the current may include alternating cycles of a forward plating current and a reverse deplating current. To determine the current characteristics, a model of a substrate may be simulated during the plating process to generate data points that relate characteristics of the plating process and a pattern on the substrate to a range nonuniformity of material formed on the substrate during the plating process. Using information from the data points, values for the forward and reverse currents may be derived and provided to the plating chamber to execute the plating process.

Abstract: Transition metal dichalcogenide (TMDC) films and methods for conformally depositing TMDC films on a substrate surface are described. The substrate surface may have one or more features formed therein, one or more layers formed thereon, and combinations thereof. The substrate surface is exposed to a transition metal precursor and an oxidant to form a transition metal oxide film in a first phase. The transition metal oxide film is exposed to a chalcogenide precursor to convert the transition metal oxide film to the TMDC film in a second phase.

Abstract: Processing chambers, substrate supports, centering wafers and methods of center calibrating wafer hand-off are described. A centering wafer comprises a disc-shaped body having a top surface and a bottom surface defining a thickness, a center, an outer edge having an outer peripheral face, a first arc-shaped slit and a second arc-shaped slit. Embodiments of the disclosure advantageously provide the ability to use the centering wafer to monitor and control backside pressure and thereby determine the center of a substrate support prior to processing the centering wafer. The centering wafer may be centered at a plurality of different angles by rotating the centering wafer.

Abstract: An organic light-emitting diode (OLED) deposition system includes two deposition chambers, a transfer chamber between the two deposition chambers, a metrology system having one or more sensors to perform measurements of the workpiece within the transfer chamber, and a control system to cause the system to form an organic light-emitting diode layer stack on the workpiece. Vacuum is maintained around the workpiece while the workpiece is transferred between the two deposition chambers and while retaining the workpiece within the transfer chamber. The control system is configured to cause the two deposition chambers to deposit two layers of organic material onto the workpiece, and to receive a first plurality of measurements of the workpiece in the transfer chamber from the metrology system.