Abstract: Pedestal assemblies with a thermal barrier plate, a torque plate and at least one kinematic mount to change a plane formed by the thermal barrier plate are described. Susceptor assemblies and processing chambers incorporating the pedestal assemblies are also described. Methods of leveling a susceptor to form parallel planes between the susceptor surface and a gas distribution assembly surface are also described.

Abstract: Embodiments described herein include a modular high-frequency emission source comprising a plurality of high-frequency emission modules and a phase controller. In an embodiment, each high-frequency emission module comprises an oscillator module, an amplification module, and an applicator. In an embodiment, each oscillator module comprises a voltage control circuit and a voltage controlled oscillator. In an embodiment, each amplification module is coupled to an oscillator module, in an embodiment, each applicator is coupled to an amplification module. In an embodiment, the phase controller is communicatively coupled to each oscillator module.

Abstract: Embodiments described herein generally related to a substrate processing apparatus. In one embodiment, a process kit for a substrate processing chamber disclosed herein. The process kit includes an edge ring having a top surface and a bottom surface. An adjustable tuning ring is positioned beneath the bottom surface of the edge ring. The adjustable tuning ring has an upper surface and a lower surface. The lower surface is configured to interface with an actuating mechanism configured to move the adjustable tuning ring relative to the edge ring.

Abstract: Semiconductor systems and methods may include a semiconductor processing chamber having a gas box defining an access to the semiconductor processing chamber. The chamber may include a spacer characterized by a first surface with which the gas box is coupled, and the spacer may define a recessed ledge on an interior portion of the first surface. The chamber may include a support bracket seated on the recessed ledge that extends along a second surface of the spacer. The chamber may also include a gas distribution plate seated on the support bracket.

Abstract: Robots including spaced upper arms are described. The robot includes first and second upper arms rotatable about a shoulder axis wherein the second upper arm is spaced from the first upper arm. The other robot components (first and second forearms, first and second wrist members, and first and second end effectors) are interleaved in the space between the first and second upper arms. Each of the first and second upper arms and first and second forearms may be individually and independently controlled. Methods of operating the robot and electronic device processing systems including the robot are provided, as are numerous other aspects.

Abstract: Embodiments described herein relate to display devices, e.g., virtual and augmented reality displays and applications. In one embodiment, a planar substrate has stepwise features formed thereon and emitter structures formed on each of the features. An encapsulating layer is disposed on the substrate and a plurality of uniform dielectric nanostructures are formed on the encapsulating layer. Virtual images generated by the apparatus disclosed herein provide for improved image clarity by reducing chromatic aberrations at an image plane.

Abstract: Embodiments of the present disclosure generally relate to an apparatus and method for reducing particle generation in a processing chamber. In one embodiment, an apparatus for processing a substrate is disclosed. The apparatus includes a chamber body, a lid assembly disposed above the chamber body, the lid assembly comprising a top electrode and a bottom electrode positioned substantially parallel to the top electrode, a gas distribution plate disposed between a substrate processing region and the lid assembly, and a substrate support disposed within the chamber body, the substrate support supporting having a substrate supporting surface, wherein the top electrode is in electrical communication with a radio frequency (RF) power supply and a DC bias modulation configuration, and the DC bias modulation configuration is configured to operate the top electrode at a constant zero DC bias voltage during a process.

Abstract: Embodiments include an electrostatic chuck assembly having an electrostatic chuck mounted on an insulator. The electrostatic chuck and insulator may be within a chamber volume of a process chamber. In an embodiment, a ground shield surrounds the electrostatic chuck and the insulator, and a gap between the ground shield and the electrostatic chuck provides an environment at risk for electric field emission. A dielectric filler can be placed within the gap to reduce a likelihood of electric field emission. The dielectric filler can have a flexible outer surface that covers or attaches to the electrostatic chuck, or an interface between the electrostatic chuck and the insulator Other embodiments are also described and claimed.

Abstract: A depth measuring apparatus includes (1) a camera and lens assembly that captures image data for a sequence of images of a target including a plurality of depth levels; (2) a motion stage on which the camera and lens assembly or the target is positioned; (3) a motor connected to the motion stage that causes relative movement between the camera and lens assembly and the target at defined incremental values; (4) a position sensor that captures position data on the camera and lens assembly or the target at each of the defined incremental values; and (5) a controller that processes the captured image data and captured position data using an image gradient method and optimal focal distance to determine depths of the plurality of depth levels. Numerous other aspects are provided.

Abstract: Embodiments presented herein provide techniques for generating and optimizing a plan in a manufacturing environment. The techniques begins by receiving a plurality of demands for a plan, wherein each demand of the plurality of demands has parameters specifying a set of operations, a due date, user specified business logic and priority. The demands are ranked based on the parameters and the user specified business logic. The plurality of demands is broken into sets of demands based on the a predefined number and the demand rank. The demands in a first set of demands are optimized to generate a strategy for fulfilling the demands in the first set of demands. One or more constraints are applied to the first set of demands to ensure the first set of demands is fulfilled in preference to the remaining sets of demands.

Abstract: Methods for etching a bottom anti-reflective coating (BARC) and/or an anti-reflective coating (ARC) and/or a dielectric anti-reflective coating (DARC) to form high aspect ratio features using an etch process are provided. The methods described herein advantageously facilitate profile and dimension control of features with high aspect ratios through a proper sidewall and bottom management scheme during the bottom anti-reflective coating (BARC) and/or an anti-reflective coating (ARC) and/or a dielectric anti-reflective coating (DARC) open process.

Abstract: Exemplary cleaning or etching methods may include flowing a fluorine-containing precursor into a remote plasma region of a semiconductor processing chamber. Methods may include forming a plasma within the remote plasma region to generate plasma effluents of the fluorine-containing precursor. The methods may also include flowing the plasma effluents into a processing region of the semiconductor processing chamber. A substrate may be positioned within the processing region, and the substrate may include a region of exposed oxide and a region of exposed metal. Methods may also include providing a hydrogen-containing precursor to the processing region. The methods may further include removing at least a portion of the exposed oxide.

Abstract: Precursors, such as interhalogens and/or compounds formed of noble gases and halogens, may be supplied in a gaseous form to a semiconductor processing chamber at a predetermined amount, flow rate, pressure, and/or temperature in a cyclic manner such that atomic layer etching of select semiconductor materials may be achieved in each cycle. In the etching process, the element of the precursor that has a relatively higher electronegativity may react with select semiconductor materials to form volatile etching byproducts. The element of the precursor that has a relatively lower electronegativity may form a gas that may be recycled to re-form an precursor with one or more halogen-containing materials using a plasma process.

Abstract: Susceptor assemblies comprising a susceptor with a top surface with a plurality of recesses and a bottom surface are described. A heater is positioned below the susceptor to heat the susceptor. A shield is positioned between the bottom surface of the susceptor and the heater. The shield increases deposition uniformity across the susceptor.

Abstract: In one embodiment of the invention, a method for correcting a pattern placement on a substrate is disclosed. The method begins by detecting three reference points for a substrate. A plurality of sets of three die location points are detected, each set indicative of an orientation of a die structure, the plurality of sets include a first set associated with a first dies and a second set associated with a second die. A local transformation is calculated for the orientation of the first die and the second on the substrate. Three orientation points are selected from the plurality of sets of three die location points wherein the orientation points are not set members of the same die. A first global orientation of the substrate is calculated from the selected three points from the set of points and the first global transformation and the local transformation for the substrate are stored.

Abstract: Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate for MRAM applications, particularly for spin-orbit-torque magnetic random access memory (SOT MRAM) applications. In one embodiment, a magnetic tunnel junction (MTJ) device structure includes a magnetic tunnel junction (MTJ) pillar structure disposed on a substrate, and a gap surrounding the MTJ pillar structure. In yet another embodiment, a magnetic tunnel junction (MTJ) device structure includes a spacer layer surrounding a patterned reference layer and a tunneling barrier layer disposed on a patterned free layer, and a gap surrounding the patterned free layer.

Abstract: Values are selected for a plurality of controllable parameters of a chemical mechanical polishing system that includes a carrier head with a plurality of zones to apply independently controllable pressures on a substrate. Data is stored relating variation in removal profile on a front surface of the substrate to variation in the controllable parameters, the data including removal at a plurality of positions on the front surface of the substrate, there being a greater number of positions than chambers. A value is determined for each parameter of the plurality of controllable parameters to minimize a difference between a target removal profile and an expected removal profile calculated from the data relating variation in removal profile on a front surface of the substrate to variation in the parameters. The value for each parameter of the plurality of controllable parameters is stored.

Abstract: Embodiments of the present technology may include an electroplating system. The electroplating system may include a vessel. The system may also include a wafer holder configured for holding a wafer in the vessel. The system may further include an anode in the vessel. In addition, the method may include a plurality of thief electrodes. For each thief electrode of the plurality of thief electrodes, a thief current channel may be defined by a channel wall. The channel wall for each thief electrode may define an aperture adjacent to the wafer holder. The thief current channel may extend from each thief electrode to the aperture. The system may include a current control system in electrical communication with the plurality of thief electrodes. The current control system may be configured such that an amount of current delivered to each thief electrode can be adjusted independently.

Abstract: A system includes a process chamber, a housing that defines a waveguide cavity, and a first conductive plate within the housing. The first conductive plate faces the process chamber. The system also includes one or more adjustment devices that can adjust at least a position of the first conductive plate, and a second conductive plate, coupled with the housing, between the waveguide cavity and the process chamber. Electromagnetic radiation can propagate from the waveguide cavity into the process chamber through apertures in the second conductive plate. The system also includes a dielectric plate that seals off the process chamber from the waveguide cavity, and one or more electronics sets that transmit the electromagnetic radiation into the waveguide cavity. A plasma forms when at least one process gas is within the chamber, and the electromagnetic radiation propagates into the process chamber from the waveguide cavity.

Abstract: A substrate carrier is described that uses a proportional thermal fluid delivery system. In one example the apparatus includes a heat exchanger to provide a thermal fluid to a fluid channel of a substrate carrier and to receive the thermal fluid from the fluid channel, the thermal fluid in the fluid channel to control the temperature of the carrier during substrate processing. A proportional valve controls the rate of flow of thermal fluid from the heat exchanger to the fluid channel. A temperature controller receives a measured temperature from a thermal sensor of the carrier and controls the proportional valve in response to the measured temperature to adjust the rate of flow.