Abstract: A barrier to prevent reactant gases from reaching the surfaces of a susceptor support for a substrate upon which polysilicon films are to be deposited provides improved uniformity of the depositing film across the substrate, and prevents substrate-to-substrate variations during sequential depositions. A suitable barrier includes a preheat ring extension that mates with an extension of the susceptor support.

Abstract: A hot trap converts unreacted organic metal-film precursor from the exhaust stream of a CVD process. The converted precursor forms a metal film on the surface of the hot trap, thereby protecting hot vacuum pump surfaces from metal build up. A cold trap downstream from the hot trap freezes effluents from the exhaust stream. The metal captured by the hot trap and the effluents captured by the cold trap may then be recycled, rather than being released as environmental emissions.

Abstract: A method for etching a dielectric in a thermally controlled plasma etch chamber with an expanded processing window. The method is adapted to incorporate benefits of a the thermal control and high evacuation capability of the chamber. Etchent gases include hydrocarbons, oxygen and inert gas. Explanation is provided for enablling the use of hexafluoro-1,3-butadiene in a capacitively coupled etch plasma. The method is very useful for creating via, self aligned contacts, dual damascene, and other dielectric etch.

Abstract: A ring or collar surrounding a semiconductor workpiece in a plasma chamber. According to one aspect, the ring has an elevated collar portion having an inner surface oriented at an obtuse angle to the plane of the workpiece, this angle preferably being 135°. This angular orientation causes ions bombarding the inner surface of the elevated collar to scatter in a direction more parallel to the plane of the workpiece, thereby reducing erosion of any dielectric shield at the perimeter of the workpiece, and ameliorating spatial non-uniformity in the plasma process due to any excess ion density near such perimeter. In a second aspect, the workpiece is surrounded by a dielectric shield, and the shield is covered by a non-dielectric ring which protects the dielectric shield from reaction with, or erosion by, the process gases.

Abstract: A method, composition, and computer readable medium for planarizing a substrate. In one aspect, the composition includes one or more chelating agents and ions of at least one transition metal, one or more surfactants, one or more oxidizers, one or more corrosion inhibitors, and deionized water. The composition may further comprise one or more agents to adjust the pH and/or abrasive particles. The method comprises planarizing a substrate using a composition including one or more chelating agents and ions of at least one transition metal.

Abstract: A pressurized delivery module having two chambers enables refill of the module while liquid material continues to be supplied to a semiconductor processing tool. Initially, the chambers are in fluid communication with each other through a valve assembly, with positive pressure applied to the module from an inert gas supply. When material in the module becomes depleted, the chambers are isolated from one another to permit refilling. In the refill module state, one chamber remains pressurized, with material remaining therein continued to be dispensed to the semiconductor fabrication tool. The second chamber is vented and placed into fluid communication with the bulk material supply. Once the level of material in the second chamber has been replenished and processing of the remaining wafer has been completed, during transfer of the next incoming wafer to the tool, the second chamber is sealed off from the material supply, repressurized, and placed back into fluid communication with the first chamber.

Abstract: The present invention provides a method and apparatus for achieving conformal step coverage of one or more materials on a substrate using sputtered ionized material. A target provides a source of material to be sputtered by a plasma and then ionized by an inductive coil, thereby producing electrons and ions. In one embodiment, one or both of the signals to the substrate and the target are modulated. Preferably, the modulated signal to the substrate includes a negative voltage portion and a zero voltage portion.

Abstract: A method and apparatus for reducing speckle during inspection of articles used in the manufacture of semiconductor devices, including wafers, masks, photomasks, and reticles. The coherence of a light beam output by a coherent light source, such as a pulsed laser, is reduced by disposing elements in a light path. Examples of such elements include optical fiber bundles; optical light guides; optical gratings; an integrating sphere; and an acousto-optic modulator. These various elements may be combined as desired, such that light beams output by the element combinations have optical path length differences that are greater than a coherence length of the light beam output by the coherent light source.

Abstract: A polishing pad and/or platen for use in a chemical mechanical polishing system is provided. The polishing pad and/or platen have slurry distribution/retaining grooves formed on a surface thereof. In one embodiment, the grooves are formed on the upper polishing surface of a pad for use in a rotary or linear polishing system. In another embodiment, an upper mounting surface of a platen is patterned with grooves. The grooves are adapted to direct the flow of slurry inwardly from a perimeter portion of the pad/platen. In operation, the grooves provide uniform distribution of slurry to areas on a polishing pad/platen.

Abstract: The present invention relates to a device that supplies electricity to a substrate. In one embodiment, the device includes multiple contacts, a current sensor, and a current regulator. The current sensor is attached to each of the plurality of contacts to sense their electric current. A current regulator controls current applied to each of the multiple contacts in response to the current sensor. In another embodiment, a compliant ridge is formed about the periphery of each contact to seal the contact from undesired chemicals.

Abstract: The present disclosure provides a method for etching metal-comprising layers within a semiconductor structure using an inorganic dielectric hard masking layer. A typical stacked metal layer structure for practicing the method of the invention includes, from top to bottom, an inorganic dielectric hard masking layer, an anti-reflection (ARC) layer, a conductive layer, a diffusion barrier layer, and a dielectric layer, all deposited on a surface of a silicon substrate. When the inorganic dielectric hard masking layer is pattern etched, using an overlying photoresist mask, residual photoresist is removed prior to subsequent steps in which underlying metal-comprising layers are etched. The metal-comprising layers are then etched using a chlorine-based plasma, using the inorganic dielectric layer as a hard mask. The method of the invention provides good etch profile control without undesirable polymeric contamination.

Abstract: A dielectric etch process applicable etching a dielectric layer with an underlying stop layer. It is particularly though not necessarily applicable to forming a dual-damascene interconnect structure by a counterbore process, in which a deep via is etched prior to the formation of a trench connecting two of more vias. A single metallization fills the dual-damascene structure. The substrate is formed with a lower stop layer, a lower dielectric layer, an upper stop layer, and an upper dielectric layer. For example, the dielectric layers may be silicon dioxide, and the stop layers, silicon nitride. The initial deep via etch includes at least two substeps. A first substep includes a non-selective etch through the upper stop layer followed by a second substep of selectively etching through the lower dielectric layer and stopping on the lower stop layer. The first substep may be preceded by yet another substep including a selective etch part ways through the upper dielectric layer.

Abstract: A plasma process for etching oxide and having a high selectivity to silicon including flowing into a plasma reaction chamber a fluorine-containing etching gas and maintaining a temperature of an exposed silicon surface within said chamber at a temperature of between 200° C. and 300° C. An example of the etching gas includes SiF4 and a fluorocarbon gas. The plasma may be generated by a capacitive discharge type plasma generator or by an electromagnetically coupled plasma generator, such as an inductively coupled plasma generator. The high selectivity exhibited by the etch process permits use of an electromagnetically coupled plasma generator, which in turn permits the etch process to be performed at low pressures of between 1 and 30 milliTorr, resulting the etching of vertical sidewalls in the oxide layer.

Abstract: In accordance with the present invention, process parameters are controlled to provide a stable etch plasma. We have discovered that it is possible to operate a stable plasma with a portion of the power deposited to the plasma being a capacitive contribution and a portion of the power deposited being an inductive contribution. In particular, a stable plasma may be obtained within two process regions. In the first region, the gradient of the capacitive power to the power applied to the inductively coupled source for plasma generation [∂Pcap/∂PRF] is greater than 0. In the second region, plasma stability is controlled so that [∂Pcap/∂PRF] is less than 0 and so that Pcap<<PRF. Typically, the magnitude of Pcap is less than about 10% of the magnitude of PRF.

Abstract: A carrier head for a chemical mechanical polishing system includes a flexible membrane with a substrate receiving surface, a sensor mechanism to determine if a substrate is properly attached to the carrier head, and means for preventing fluid that may be located between the substrate and the flexible membrane from interfering with the substrate detection mechanism.

Abstract: A DC magnetron sputter reactor for sputtering copper, its method of use, and shields and other parts promoting self-ionized plasma (SIP) sputtering, preferably at pressures below 5 milliTorr, preferably below 1 milliTorr. Also, a method of coating copper into a narrow and deep via or trench using SIP for a first copper layer. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. The target power for a 200 mm wafer is preferably at least 10 kW; more preferably, at least 18 kW; and most preferably, at least 24 kW. Hole filling with SIP is improved by long-throw sputtering in which the target-to-substrate spacing is at least 50% of substrate diameter, more preferably at least 80%, most preferably at least 140%. The SIP copper layer can act as a seed and nucleation layer for hole filling with conventional sputtering (PVD) or with electrochemical plating (ECP).

Abstract: A semiconductor substrate processing chamber provides a bi-directional process gas flow for deposition or etching processes. The bi-directional gas flow provides uniformity of deposition layer thickness or uniformity of etching without the need to rotate the substrate. Junctions are provided at opposite ends of a processing chamber. Inlet and outlet ports are provided on each junction. Inlet and outlet ports on opposite junctions cooperate to provide a gas flow in a first direction for half of the process cycle, and in a second direction for the other half of the process cycle.

Abstract: A method of depositing a film, such as a barrier layer, on a substrate using a gaseous mixture including a hydrocarbon-containing gas and a silicon-containing gas. Suitable hydrocarbon-containing gases include alkanes such as methane (CH4), ethane (C2H6), butane (C3H8), propane (C4H10), etc. Suitable silicon-containing gases include silanes such as monosilane (SiH4). The method generally comprises providing a suitable gaseous mixture to the chamber, generating a plasma from the gaseous mixture, and depositing a film onto the substrate using the plasma. In a preferred embodiment, the film is deposited in a high-density plasma chemical vapor deposition (HDP-CVD) system. The gaseous mixture typically includes a silicon containing gas, such as an alkane, and a hydrocarbon containing gas, such as a silane. Embodiments of the method of the present invention can integrated stack structures having overall dielectric constant of about 4.0 or less.

Abstract: A chemical mechanical polishing apparatus includes a rotating plate on which a substrate is received, and a polishing pad which moves across the substrate as it rotates on the plate to polish the substrate. The load of the pad against the substrate, and the rotary speed of the plate, may be varied to control the rate of material removed by the pad.

Abstract: An apparatus, as well as a method, brings a surface of a substrate into contact with a polishing pad that has a window, causes relative motion between the substrate and the polishing pad, and directs a light beam through the window so that the motion of the polishing pad relative to the substrate causes the light beam to move in a path across the substrate. An extreme intensity measurement is derived from a plurality of intensity measurements made as the light beam moves across the substrate. The beam sweeps across the substrate a plurality of times to generate a plurality of extreme intensity measurements, and a polishing endpoint is detected based on the plurality of extreme intensity measurements.