Patents Assigned to Applied Material
  • Patent number: 7648914
    Abstract: Embodiments of the invention generally provide methods for etching a substrate. In one embodiment, the method includes determining a substrate temperature target profile that corresponds to a uniform deposition rate of etch by-products on a substrate, preferentially regulating a temperature of a first portion of a substrate support relative to a second portion of the substrate support to obtain the substrate temperature target profile on the substrate, and etching the substrate on the preferentially regulated substrate support. In another embodiment, the method includes providing a substrate in a processing chamber having a selectable distribution of species within the processing chamber and a substrate support with lateral temperature control, wherein a temperature profile induced by the substrate support and a selection of species distribution comprise a control parameter set, etching a first layer of material and etching a second layer of material respectively using different control parameter sets.
    Type: Grant
    Filed: March 2, 2006
    Date of Patent: January 19, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Thomas J. Kropewnicki, Theodoros Panagopoulos, Nicolas Gani, Wilfred Pau, Meihua Shen, John P. Holland
  • Patent number: 7649729
    Abstract: The present invention generally comprises an electrostatic chuck base, an electrostatic chuck assembly, and a puck for the electrostatic chuck assembly. Precisely etching a substrate within a plasma chamber may be a challenge because the plasma within the chamber may cause the temperature across the substrate to be non-uniform. A temperature gradient may exist across the substrate such that the edge of the substrate is at a different temperature compared to the center of the substrate. When the temperature of the substrate is not uniform, features may not be uniformly etched into the various layers of the structure disposed above the substrate. A dual zone electrostatic chuck assembly may compensate for temperature gradients across a substrate surface.
    Type: Grant
    Filed: October 12, 2007
    Date of Patent: January 19, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Douglas A. Buchberger, Jr., Paul Brillhart
  • Patent number: 7648927
    Abstract: Embodiments of the invention generally provide a method for depositing films or layers using a UV source during a photoexcitation process. The films are deposited on a substrate and usually contain a material, such as silicon (e.g., epitaxy, crystalline, microcrystalline, polysilicon, or amorphous), silicon oxide, silicon nitride, silicon oxynitride, or other silicon-containing materials. The photoexcitation process may expose the substrate and/or gases to an energy beam or flux prior to, during, or subsequent a deposition process. Therefore, the photoexcitation process may be used to pre-treat or post-treat the substrate or material, to deposit the silicon-containing material, and to enhance chamber cleaning processes.
    Type: Grant
    Filed: June 20, 2006
    Date of Patent: January 19, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Kaushal K. Singh, Joseph M. Ranish
  • Patent number: 7648892
    Abstract: Methods for depositing a microcrystalline silicon film layer with improved deposition rate and film quality are provided in the present invention. Also, a photovoltaic (PV) cell having a microcrystalline silicon film is provided. In one embodiment, the method produces a microcrystalline silicon film on a substrate at a deposition rate greater than about 20 nm per minute, wherein the microcrystalline silicon film has a crystallized volume between about 20 percent to about 80 percent.
    Type: Grant
    Filed: October 24, 2008
    Date of Patent: January 19, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Soo Young Choi, Takako Takehara, John M. White, Yong Kee Chae
  • Patent number: 7648916
    Abstract: Methods for monitoring and detecting optical emissions while performing photoresist stripping and removal of residues from a substrate or a film stack on a substrate are provided herein. In one embodiment, a method is provided that includes positioning a substrate comprising a photoresist layer into a processing chamber; processing the photoresist layer using a multiple step plasma process; and monitoring the plasma for a hydrogen optical emission during the multiple step plasma process; wherein the multiple step plasma process includes removing a bulk of the photoresist layer using a bulk removal step; and switching to an overetch step in response to the monitored hydrogen optical emission.
    Type: Grant
    Filed: August 28, 2006
    Date of Patent: January 19, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Elizabeth G. Pavel, Mark N. Kawaguchi, James S. Papanu
  • Patent number: 7644745
    Abstract: A target assembly including a plurality of target tiles bonded to a backing plate by adhesive, for example of indium or conductive polymer, filled into recesses in the backing plate formed beneath each of the target tiles. A sole peripheral recess formed as a rectangular close band may be formed inside the tile periphery. Additional recesses may be formed inside the peripheral recess, preferably symmetrically arranged about perpendicular bisectors of rectangular tiles. The depth and width of the recesses may be varied to control the amount of stress and the stress direction.
    Type: Grant
    Filed: June 6, 2005
    Date of Patent: January 12, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Hien-Minh Huu Le, Akihiro Hosokawa
  • Patent number: 7645710
    Abstract: The present invention generally provides methods and apparatuses that are adapted to form a high quality dielectric gate layer on a substrate. Embodiments contemplate a method wherein a metal plasma treatment process is used in lieu of a standard nitridization process to form a high dielectric constant layer on a substrate. Embodiments further contemplate an apparatus adapted to “implant” metal ions of relatively low energy in order to reduce ion bombardment damage to the gate dielectric layer, such as a silicon dioxide layer and to avoid incorporation of the metal atoms into the underlying silicon. In general, the process includes the steps of forming a high-k dielectric and then terminating the surface of the deposited high-k material to form a good interface between the gate electrode and the high-k dielectric material.
    Type: Grant
    Filed: March 8, 2007
    Date of Patent: January 12, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Christopher Sean Olsen, Thai Cheng Chua, Steven Hung, Patricia M. Liu, Tatsuya Sato, Alex M. Paterson, Valentin Todorow, John P. Holland
  • Patent number: 7645357
    Abstract: A plasma reactor for processing a workpiece includes a reactor chamber and a workpiece support within the chamber, the chamber having a ceiling facing the workpiece support, a capacitively coupled plasma source power applicator comprising a source power electrode at one of: (a) the ceiling (b) the workpiece support, and plural VHF power generators of different fixed frequencies coupled to the capacitively coupled source power applicator, and a controller for independently controlling the power output levels of the plural VHF generators so as to control an effective VHF frequency applied to the source power electrode. In a preferred embodiment, the reactor further includes a plasma bias power applicator that includes a bias power electrode in the workpiece support and one or more RF bias power generators of different frequencies coupled to the plasma bias power applicator.
    Type: Grant
    Filed: April 24, 2006
    Date of Patent: January 12, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Alexander Paterson, Valentin N. Todorow, Theodoros Panagopoulos, Brian K. Hatcher, Dan Katz, Edward P. Hammond, IV, John P. Holland, Alexander Matyushkin
  • Patent number: 7645709
    Abstract: Methods of fabricating an oxide layer on a semiconductor substrate are provided herein. In some embodiments, a method of forming an oxide layer on a semiconductor substrate includes placing a substrate to be oxidized on a substrate support in a vacuum chamber of a plasma reactor, the chamber having an ion generation region remote from the substrate support; introducing a process gas into the chamber, the process gas comprising at least one of hydrogen (H2) and oxygen (O2)—provided at a flow rate ratio of hydrogen (H2) to oxygen (O2) of up to about 3:1—or water vapor (H2O vapor); and generating an inductively coupled plasma in the ion generation region of the chamber to form a silicon oxide layer on the substrate.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: January 12, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Thai Cheng Chua, James P. Cruse, Cory Czarnik
  • Patent number: 7645339
    Abstract: Embodiments of the invention relate to methods for depositing silicon-containing materials on a substrate. In one example, a method for selectively and epitaxially depositing a silicon-containing material is provided which includes positioning and heating a substrate containing a crystalline surface and a non-crystalline surface within a process chamber, exposing the substrate to a process gas containing neopentasilane, and depositing an epitaxial layer on the crystalline surface. In another example, a method for blanket depositing a silicon-containing material is provide which includes positioning and heating a substrate containing a crystalline surface and feature surfaces within a process chamber and exposing the substrate to a process gas containing neopentasilane and a carbon source to deposit a silicon carbide blanket layer across the crystalline surface and the feature surfaces.
    Type: Grant
    Filed: October 12, 2006
    Date of Patent: January 12, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Kaushal K. Singh, Paul B. Comita, Lance A. Scudder, David K. Carlson
  • Publication number: 20100002210
    Abstract: A lithography scanner and track system is provided that includes an interference lithography system according to one embodiment. The scanner provides a first optical exposure of a wafer. The track system provides pre and post-processing functions on a wafer. The interference lithography system may be included within the scanner and may expose a wafer either before or after the first optical exposure. The interference lithography system may also be included within the track system as part of the pre or post processing. The first optical exposure may include optical photolithography.
    Type: Application
    Filed: August 28, 2008
    Publication date: January 7, 2010
    Applicant: Applied Materials, Inc.
    Inventors: RUDOLF HENDEL, Kuo-Shih Liu
  • Patent number: 7642171
    Abstract: A method of annealing a substrate comprising a trench containing a dielectric material, the method including annealing the substrate at a first temperature of about 200° C. to about 800° C. in a first atmosphere comprising an oxygen containing gas, and annealing the substrate at a second temperature of about 800° C. to about 1400° C. in a second atmosphere lacking oxygen. In addition, a method of annealing a substrate comprising a trench containing a dielectric material, the method including annealing the substrate at a first temperature of about 400° C. to about 800° C. in the presence of an oxygen containing gas, purging the oxygen containing gas away from the substrate, and raising the substrate to a second temperature from about 900° C. to about 1100° C. to further anneal the substrate in an atmosphere that lacks oxygen.
    Type: Grant
    Filed: November 16, 2004
    Date of Patent: January 5, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Nitin K. Ingle, Zheng Yuan, Vikash Banthia, Xinyun Xia, Hali J. L. Forstner, Rong Pan
  • Patent number: 7642195
    Abstract: A process for selectively removing photoresist, organic overlayers, and/or polymers/residues from a substrate without altering the surface chemistry and adhesion properties of the underlying substrate layers is provided. Generally, the process includes pretreating the substrate with hydrogen (e.g., by way of a hydrogen-based plasma) prior to deposition of a photoresist layer, and then ashing the substrate with a hydrogen-based plasma to selectively remove the photoresist, organic overlayers, and/or polymers/residues from the substrate during etching, post-etch, rework, etc. The hydrogen-based ashing process of the invention may be used post-etch to remove the residue photoresist, or may be used in a rework stripping process to remove misaligned patterns. The hydrogen-based ashing process following the initial hydrogen surface pretreatment substantially reduces surface chemistry poisoning, while retaining adequate adhesion properties following ashing.
    Type: Grant
    Filed: September 26, 2005
    Date of Patent: January 5, 2010
    Assignee: Applied Materials, Inc.
    Inventor: Wendy H. Yeh
  • Patent number: 7641247
    Abstract: Generally, an end effector assembly for a substrate transfer robot is provided. In one embodiment, an end effector assembly for supporting a quadrilateral substrate during substrate transfer includes an end effector having an inner edge support disposed on a first end and a first outer edge support disposed on a distal end. The first end of the end effector is adapted for coupling to a robot linkage. The first inner edge support has a face that is oriented parallel to and facing the face of the first outer edge support. This configuration of edge supports captures the substrate to the end effector thereby minimizing substrate slippage during transfer. In another embodiment, lateral guides may be utilized to further enhance capturing the substrate along the edges of the substrate open between the inner and outer edge supports.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: January 5, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Wendell T. Blonigan, Takayuki Matsumoto, William N. Sterling, Billy C. Leung
  • Patent number: 7642180
    Abstract: A process for conformally doping through the vertical and horizontal surfaces of a 3-dimensional vertical transistor in a semiconductor-on-insulator structure employs an RF oscillating torroidal plasma current to perform either conformal ion implantation, or conformal deposition of a dopant-containing film which can then be heated to drive the dopants into the transistor. Some embodiments employ both conformal ion implantation and conformal deposition of dopant containing films, and in those embodiments in which the dopant containing film is a pure dopant, the ion implantation and film deposition can be performed simultaneously.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: January 5, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Amir Al-Bayati, Kenneth S. Collins, Hiroji Hanawa, Kartik Ramaswamy, Biagio Gallo, Andrew Nguyen
  • Patent number: 7641434
    Abstract: One embodiment relates to a loadlock having a first support structure therein to support one unprocessed substrate and a second support structure therein to support one processed substrate. The first support structure is located above the second support structure. The loadlock includes an elevator to control the vertical position of the support structures. The loadlock also includes a first aperture to permit insertion of an unprocessed substrate into the loadlock and removal of a processed substrate from the loadlock, as well as a second aperture to permit removal of an unprocessed substrate from the loadlock and insertion of a processed substrate into the loadlock. A cooling plate is also located in the loadlock. The cooling plate includes a surface adapted to support a processed substrate thereon. A heating device may be located in the loadlock above the first support structure.
    Type: Grant
    Filed: May 10, 2004
    Date of Patent: January 5, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Shinichi Kurita, Wendell T. Blonigan, Akihiro Hosokawa
  • Patent number: 7641762
    Abstract: Stress within a suspension wall for suspending a showerhead in a process chamber is ameliorated by one or more of: (1) A gas sealing skirt that helps protect the suspension wall from direct contact with process gas. The gas sealing skirt is connected to either the chamber wall or the showerhead but is not connected to both. (2) Openings in the suspension wall that reduce exposure of the suspension wall to process gas or ambient atmosphere when the chamber lid is opened. (3) A substantially vertical arrangement of one or more rifts in the suspension wall which facilitate horizontal buckling or flexing of the suspension wall. (4) A plurality of suspension walls whose respective central portions are coplanar.
    Type: Grant
    Filed: October 25, 2006
    Date of Patent: January 5, 2010
    Assignee: Applied Materials, Inc.
    Inventor: Ernst Keller
  • Publication number: 20090321397
    Abstract: Laser-scribing systems and translation stages operable to support a workpiece during laser scribing are provided. A laser-scribing system includes a base section, a bed supported by the base section, a laser, a first driving mechanism operable to move a workpiece longitudinally along the bed, and a second driving mechanism. The bed comprises a movable section configured to translate with respect to the base section. The movable section comprises a gap to allow a laser beam to pass through. The laser is positioned to direct the laser beam through the gap. The second driving mechanism is operable to laterally translate the laser and the movable section in order to scribe a pattern on the workpiece.
    Type: Application
    Filed: April 10, 2009
    Publication date: December 31, 2009
    Applicant: Applied Materials, Inc.
    Inventors: Sriram Krishnaswami, Shinichi Kurita, Bassam Shamoun, Bejamin M. Johnston, John M. White, Jiafa Fan, Inchen Huang
  • Publication number: 20090324972
    Abstract: The present invention refers to a coating device for depositing of barrier layers on a plastic substrate comprising a first coating station for depositing a first layer comprising a metal and a second coating station for depositing a second layer comprising a resin, wherein a treatment station for treating the deposited first layer is arranged between the first and the second coating stations which comprises sputter means for depositing one or several atomic layers or isles of deposition material. The invention further refers to an appropriate method which can be carried out by the coating device and to a layer system produced thereby.
    Type: Application
    Filed: April 3, 2009
    Publication date: December 31, 2009
    Applicants: Applied Materials, Inc., Biofilm S.A.
    Inventors: Gerd Hoffman, Alexandra L. Quiceno
  • Publication number: 20090321399
    Abstract: Methods and systems for improving the alignment between a previously formed feature and a subsequently formed feature are provided. An exemplary method can include laser scribing a workpiece (104, 550) having a previously formed first feature. The exemplary method includes imaging the workpiece (104, 550) with an imaging device (320, 420, 554, 640) so as to capture a plurality of positions of the first feature on the workpiece (104, 550) relative to the laser-scribing device (100). The exemplary method further includes using the captured positions to align output from the laser-scribing device (100) in order to form a second feature on the workpiece (104, 550) at a controlled distance from the first feature.
    Type: Application
    Filed: April 10, 2009
    Publication date: December 31, 2009
    Applicant: Applied Materials, Inc.
    Inventors: Makoto Inagawa, Shinichi Kurita, Bassam Shamoun, Sriram Krishnaswami, Michael D. Shirk, Kevin L. Cunningham