Patents Assigned to Applied Material
  • Patent number: 7659206
    Abstract: A method of treating a substrate comprises depositing silicon oxycarbide on the substrate and removing the silicon oxycarbide from the substrate. The silicon oxycarbide on the substrate is decarbonized by exposure to an energized oxygen-containing gas that heats the substrate and converts the layer of silicon oxycarbide into a layer of silicon oxide. The silicon oxide is removed by exposure to a plasma of fluorine-containing process gas. Alternatively, the remaining silicon oxide can be removed by a fluorine-containing acidic bath. In yet another version, a plasma of a fluorine-containing gas and an oxygen-containing gas is energized to remove the silicon oxycarbide from the substrate.
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: February 9, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Krishna Vepa, Yashraj Bhatnagar, Ronald Rayandayan, Venkata Balagani
  • Patent number: 7660644
    Abstract: A method and apparatus for atomic layer deposition (ALD) is described. The apparatus comprises a deposition chamber and a wafer support. The deposition chamber is divided into two or more deposition regions that are integrally connected one to another. The wafer support is movable between the two or more interconnected deposition regions within the deposition chamber.
    Type: Grant
    Filed: June 12, 2006
    Date of Patent: February 9, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Barry L. Chin, Alfred W. Mak, Lawrence Chung-Lai Lei, Ming Xi, Hua Chung, Ken Kaung Lai, Jeong Soo Byun
  • Patent number: 7658802
    Abstract: An apparatus and a method of cleaning a dielectric film are provided in the present invention. In one embodiment, an apparatus of cleaning a dielectric film the apparatus includes a chamber body adapted to support a substrate therein, a remote plasma source adapted to provide a plurality of reactive radicals to the chamber body, a passage coupling the remote plasma source to the chamber body, and at least one magnet disposed adjacent the passage. In another embodiment, a method of cleaning a dielectric film that includes providing a substrate having an at least partially exposed dielectric layer disposed in a process chamber, generating a plurality of reactive radicals in a remote plasma source, flowing the reactive radicals from the remote plasma source into the process chamber through a passage having at least one magnet disposed adjacent the passage, and magnetically filtering the reactive radicals passing through the passage.
    Type: Grant
    Filed: November 22, 2005
    Date of Patent: February 9, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Xinyu Fu, John Forster, Wei W. Wang
  • Patent number: 7658973
    Abstract: A method of forming a dielectric film that includes nitrogen. The method includes incorporating nitrogen into a dielectric film using a nitridation gas and a rapid thermal annealing process, wherein an ultra-low pressure of equal to or less than about 10 Torr is used for the rapid thermal annealing process.
    Type: Grant
    Filed: February 4, 2004
    Date of Patent: February 9, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Pravin K. Narwankar, Gary E. Miner, Arnaud Lepert
  • Patent number: 7659203
    Abstract: Embodiments as described herein provide methods for depositing a material on a substrate during electroless deposition processes, as well as compositions of the electroless deposition solutions. In one embodiment, the substrate contains a contact aperture having an exposed silicon contact surface. In another embodiment, the substrate contains a contact aperture having an exposed silicide contact surface. The apertures are filled with a metal contact material by exposing the substrate to an electroless deposition process. The metal contact material may contain a cobalt material, a nickel material, or alloys thereof. Prior to filling the apertures, the substrate may be exposed to a variety of pretreatment processes, such as preclean processes and activations processes. A preclean process may remove organic residues, native oxides, and other contaminants during a wet clean process or a plasma etch process. Embodiments of the process also provide the deposition of additional layers, such as a capping layer.
    Type: Grant
    Filed: March 20, 2006
    Date of Patent: February 9, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Michael P. Stewart, Timothy W. Weidman, Arulkumar Shanmugasundram, David J. Eaglesham
  • Patent number: 7659204
    Abstract: A method and resultant produce of forming barrier layer based on ruthenium tantalum in a via or other vertical interconnect structure through a dielectric layer in a multi-level metallization. The RuTa layer in a RuTa/RuTaN bilayer, which may form discontinuous islands, is actively oxidized, preferably in an oxygen plasma, to thereby bridge the gaps between the islands. Alternatively, ruthenium tantalum oxide is reactive sputtered onto the RuTaN or directly onto the underlying dielectric by plasma sputtering a RuTa target in the presence of oxygen.
    Type: Grant
    Filed: March 26, 2007
    Date of Patent: February 9, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Xianmin Tang, Hua Chung, Rongjun Wang, Praburam Gopalraja, Jick M. Yu, Jenn Yue Wang
  • Patent number: 7659506
    Abstract: A system and method for generating a thin sample, the method includes: milling an intermediate section of a thin sample such as to enable an upper portion of the thin sample to tilt in relation to a lower portion of the thin sample; wherein the lower portion is connected to a wafer from which the thin sample was formed. A system and method for inspecting a thin sample, the method includes: A method for inspecting a thin sample, the method comprising: illuminating, by a charged particle beam, a tilted upper portion of a thin sample that is connected, via a milled intermediate section, to a lower portion of the thin sample; wherein the lower portion is connected to a wafer from which the thin sample was formed; and collecting particles and photons resulting from the illumination.
    Type: Grant
    Filed: September 25, 2007
    Date of Patent: February 9, 2010
    Assignee: Applied Materials, Israel, Ltd.
    Inventors: Michal Avinun-Kalish, Jacob Levin, Dror Shemesh
  • Patent number: 7658969
    Abstract: A method and apparatus for process integration in manufacture of a ask are disclosed. In one embodiment, a cluster tool suitable for process integration in manufacture of a photomask including a vacuum transfer chamber having coupled thereto at least one hard mask deposition chamber and at least one plasma chamber configured for etching chromium. In another embodiment, a method for process integration in manufacture of a photomask includes depositing a hard mask on a substrate in a first processing chamber, depositing a resist layer on the substrate, patterning the resist layer, etching the hard mask through apertures formed in the patterned resist layer in a second chamber; and etching a chromium layer through apertures formed in the hard mask in a third chamber.
    Type: Grant
    Filed: November 29, 2006
    Date of Patent: February 9, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Ajay Kumar, Virinder Grewal, Wai-Fan Yau
  • Patent number: 7659158
    Abstract: Embodiments of the invention provide memory devices and methods for forming memory devices. In one embodiment, a memory device is provided which includes a floating gate polysilicon layer disposed over source/drain regions of a substrate, a silicon oxynitride layer disposed over the floating gate polysilicon layer, a first aluminum oxide layer disposed over the silicon oxynitride layer, a hafnium silicon oxynitride layer disposed over the first aluminum oxide layer, a second aluminum oxide layer disposed over the hafnium silicon oxynitride layer, and a control gate polysilicon layer disposed over the second aluminum oxide layer. In another embodiment, a memory device is provided which includes a control gate polysilicon layer disposed over an inter-poly dielectric stack disposed over a silicon oxide layer disposed over the floating gate polysilicon layer. The inter-poly dielectric stack contains two silicon oxynitride layers separated by a silicon nitride layer.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: February 9, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Yi Ma, Shreyas S. Kher, Khaled Ahmed, Tejal Goyani, Maitreyee Mahajani, Jallepally Ravi, Yi-Chiau Huang
  • Patent number: 7654885
    Abstract: A polishing pad has a polishing layer and a backing layer secured to the polishing layer. The polishing layer has a polishing surface, a first thickness, a first compressibility, and a hardness between about 40 to 80 Shore D. The backing layer has a second thickness greater than the first thickness and a second compressibility greater than the first compressibility. The first thickness, first compressibility, second thickness and second compressibility are such that the polishing surface deflects at least 2 mil under an applied pressure of 1 psi or less.
    Type: Grant
    Filed: October 1, 2004
    Date of Patent: February 2, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Stan D. Tsai, Shou-Sung Chang, Liang-Yuh Chen
  • Patent number: 7655565
    Abstract: A method and apparatus for electroprocessing a substrate is provided. In one embodiment, a method for electroprocessing a substrate includes the steps of biasing a first electrode to establish a first electroprocessing zone between the electrode and the substrate, and biasing a second electrode disposed radially outward of substrate with a polarity opposite the bias applied tot he first electrode.
    Type: Grant
    Filed: January 26, 2005
    Date of Patent: February 2, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Antoine P. Manens, Vladimir Galburt, Yan Wang, Alain Duboust, Donald J. K. Olgado, Liang-Yuh Chen
  • Patent number: 7654888
    Abstract: A carrier head that has a housing, a base assembly, a retaining ring, a carrier ring, and a flexible membrane is described. The base assembly is vertically movable relative to the housing. The retaining ring is connected to and vertically movable relative to the base assembly and has a lower surface configured to contact a polishing pad and an inner surface configured to circumferentially surround the edge of a substrate to retain the substrate. The carrier ring is connected to and vertically fixed relative to the base assembly, circumferentially surrounds the retaining ring to prevent lateral motion of the retaining ring, and has a bottom surface configured to contact a polishing pad.
    Type: Grant
    Filed: September 26, 2007
    Date of Patent: February 2, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Steven M. Zuniga, Andrew J. Nagengast, Jeonghoon Oh
  • Patent number: 7657390
    Abstract: Test substrates used to test semiconductor fabrication tools are reclaimed by reading from a database the process steps performed on each test substrate and selecting a reclamation process from a plurality of reclamation processes. The reclamation process can include crystal lattice defect or metallic contaminant reduction treatments for reclaiming each test substrate. Each test substrate is sorted and placed into a group of test substrates having a common defect or contaminant reduction treatment assigned to the test substrates of the group. Additional features are described and claimed.
    Type: Grant
    Filed: November 2, 2005
    Date of Patent: February 2, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Krishna Vepa, Yashraj Bhatnagar, Ronald Rayandayan, Hong Wang
  • Patent number: 7655924
    Abstract: The present invention relates to a front plate for an ion source that is suitable for an ion implanter. The front plate according to the invention comprises obverse and reverse sides, an exit aperture for allowing egress of ions from the ion source that extends substantially straight through the front plate between the obverse and reverse sides, and a slot penetrating through the front plate from obverse side to reverse side at a slant for at least part of its depth, the slot extending from a side of the front plate to join the exit aperture. The slot is slanted to occlude line of sight into the ion source when viewed from in front, yet provides an expansion gap.
    Type: Grant
    Filed: April 26, 2007
    Date of Patent: February 2, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Richard David Goldberg, Christopher Burgess
  • Patent number: 7657342
    Abstract: A computer program product that determines a polishing endpoint includes obtaining spectra from different zones on a substrate during different times in a polishing sequence, matches the spectra with indexes in a library and uses the indexes to determining a polishing rate for each of the different zones from the indexes. An adjusted polishing rate can be determined for one of the zones, which causes the substrate to have a desired profile when the polishing end time is reached.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: February 2, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Jeffrey Drue David, Dominic J. Benvegnu, Harry Q. Lee, Boguslaw A. Swedek, Lakshmanan Karuppiah
  • Patent number: 7655092
    Abstract: The present invention provides an apparatus for vacuum processing generally comprising an enclosure having a plurality of isolated chambers formed therein, a gas distribution assembly disposed in each processing chamber, a gas source connected to the plurality of isolated chambers, and a power supply connected to each gas distribution assembly.
    Type: Grant
    Filed: October 6, 2003
    Date of Patent: February 2, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Kevin Fairbairn, Jessica Barzilai, Hari K. Ponnekanti, W. N. (Nick) Taylor
  • Patent number: 7655542
    Abstract: Methods for depositing a microcrystalline silicon film layer with improved deposition rate and film quality are provided in the present invention. Also, photovoltaic (PV) cell having a microcrystalline silicon film is provided. In one embodiment, the method produces a microcrystalline silicon film on a substrate at a deposition rate greater than about 20 nm per minute, wherein the microcrystalline silicon film has a crystallized volume between about 20 percent to about 80 percent.
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: February 2, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Soo Young Choi, Takako Takehara, John M. White, Yong Kee Chae
  • Patent number: 7654221
    Abstract: An electroless deposition system and electroless deposition stations are provided. The system includes a processing mainframe, at least one substrate cleaning station positioned on the mainframe, and an electroless deposition station positioned on the mainframe. The electroless deposition station includes an environmentally controlled processing enclosure, a first processing station configured to clean and activate a surface of a substrate, a second processing station configured to electrolessly deposit a layer onto the surface of the substrate, and a substrate shuttle positioned to transfer substrates between the first and second processing stations. The electroless deposition station also includes various fluid delivery and substrate temperature controlling devices to perform a contamination free and uniform electroless deposition process.
    Type: Grant
    Filed: July 6, 2005
    Date of Patent: February 2, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Dmitry Lubomirsky, Arulkumar Shanmugasundram, Ian A. Pancham
  • Patent number: 7655571
    Abstract: A method and apparatus for removing volatile residues from a substrate are provided. In one embodiment, a method for volatile residues from a substrate includes providing a processing system having a load lock chamber and at least one processing chamber coupled to a transfer chamber, treating a substrate in the processing chamber with a chemistry comprising halogen, and removing volatile residues from the treated substrate in the load lock chamber.
    Type: Grant
    Filed: October 26, 2006
    Date of Patent: February 2, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Mark Naoshi Kawaguchi, Kin Pong Lo, Brett Christian Hoogensen, Sandy M. Wen, Steven M. Kim
  • Patent number: 7654224
    Abstract: The present invention is a method and apparatus for cleaning a chemical vapor deposition (CVD) chamber using cleaning gas energized to a plasma in a gas mixing volume separated by an electrode from a reaction volume of the chamber. In one embodiment, a source of RF power is coupled to a lid of the chamber, while a switch is used to couple a showerhead to ground terminals or the source of RF power.
    Type: Grant
    Filed: February 17, 2009
    Date of Patent: February 2, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Maosheng Zhao, Juan Carlos Rocha-Alvarez, Inna Shmurun, Soova Sen, Mao D. Lim, Shankar Venkataraman, Ju-Hyung Lee